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1.发明公开公开(公告)号：US20240290687A1
公开(公告)日：2024-08-29
申请号：US18114576
申请日：2023-02-27
Inventor： Feng Zhou , Tianzhu Fan , Yanghe Liu
IPC: H01L23/427 , H01L23/00 , H05K1/02 , H05K1/18
CPC classification number: H01L23/427 , H01L24/32 , H05K1/0203 , H05K1/185 , H01L2224/32221 , H01L2924/1011 , H05K2201/064 , H05K2201/10007
Abstract: A power device embedded printed circuit board (PCB) assembly includes a cold plate, a multi-layer PCB with at least one power device embedded therein bonded to and in thermal communication with the cold plate, and a chemical vapor deposition (CVD) dielectric layer disposed between the cold plate and the multi-layer PCB. The CVD dielectric layer can be applied to the cold plate and a bonding layer can be sandwiched between the CVD dielectric layer and the multi-layer PCB with at least one power device assembly embedded therein. In the alternative, CVD dielectric layer can be applied top the multi-layer PCB with at least one power device assembly embedded therein and bonding layer can be sandwiched between the CVD dielectric layer and the cold plate.
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2.发明授权公开(公告)号：US12238906B2
公开(公告)日：2025-02-25
申请号：US18155464
申请日：2023-01-17
Inventor： Feng Zhou , Tianzhu Fan
Abstract: Power electronics device assemblies, circuit board assemblies, and power electronics assemblies are disclosed. In one embodiment, a power electronics device assembly includes an S-cell including a first metal layer comprising a first surface having a recess, a first graphite layer bonded to the first metal layer, a second metal layer bonded to the first graphite layer, a solder layer disposed on the second metal layer, and an electrically insulating layer bonded to the solder layer. The power electronics device assembly may further include a power electronics device disposed within the recess of the first surface of the first metal layer.
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公开(公告)号：US20240292564A1
公开(公告)日：2024-08-29
申请号：US18114622
申请日：2023-02-27
Inventor： Feng Zhou , Tianzhu Fan , Yanghe Liu
CPC classification number: H05K7/20254 , H05K1/0272 , H05K7/20927
Abstract: A highly integrated power electronics embedded PCB-cold plate assembly includes a cold plate, a power electronics embedded printed circuit board (PCB), and a low thermal resistance dielectric layer sandwiched between the cold plate and the power electronics embedded PCB. The power electronics embedded PCB is bonded to the cold plate via the low thermal resistance dielectric layer to form highly integrated power electronics embedded PCB—cold plate assembly is formed. And in one example, the low thermal resistance dielectric layer sandwiched between and directly bonded to the cold plate and the power electronics embedded PCB.
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4.发明公开公开(公告)号：US20240244805A1
公开(公告)日：2024-07-18
申请号：US18155464
申请日：2023-01-17
Inventor： Feng Zhou , Tianzhu Fan
CPC classification number: H05K7/20927 , H05K1/0204 , H05K1/185 , H05K7/20254 , H05K7/20272
Abstract: Power electronics device assemblies, circuit board assemblies, and power electronics assemblies are disclosed. In one embodiment, a power electronics device assembly includes an S-cell including a first metal layer comprising a first surface having a recess, a first graphite layer bonded to the first metal layer, a second metal layer bonded to the first graphite layer, a solder layer disposed on the second metal layer, and an electrically insulating layer bonded to the solder layer. The power electronics device assembly may further include a power electronics device disposed within the recess of the first surface of the first metal layer.
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公开(公告)号：US12144158B2
公开(公告)日：2024-11-12
申请号：US17967425
申请日：2022-10-17
Inventor： Feng Zhou , Tianzhu Fan
IPC: H05K7/20 , H01L23/367 , H05K1/02 , H05K1/05 , H05K3/00
Abstract: A power electronics assembly includes a circuit board assembly including a first electrically insulating layer, an electrically insulating substrate, a laminate panel provided between the first electrically insulating layer and the electrically insulating substrate, and one or more electrically conductive layers provided within the electrically insulating substrate. The laminate panel includes a power electronics device assembly including an S-cell and a power electronics device. The S-cell includes a graphite layer and a metal layer encasing the graphite layer. A recess is formed in an outer surface of the metal layer and the power electronics device is disposed within the recess of the outer surface of the S-cell.
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Patent Agency Ranking
公开(公告)号：US20240260201A1
公开(公告)日：2024-08-01
申请号：US18162003
申请日：2023-01-31
Inventor： Tianzhu Fan , Feng Zhou , Ercan Mehmet Dede
IPC: H05K3/46 , B29C64/209 , B29C64/314 , B33Y10/00 , B33Y30/00 , B33Y70/10 , B33Y80/00
CPC classification number: H05K3/4664 , B29C64/209 , B29C64/314 , B33Y10/00 , B33Y30/00 , B33Y70/10 , B33Y80/00 , H05K3/4673 , B29K2033/04 , B29K2105/0002 , B29K2105/162 , B29K2505/14 , B29K2507/04 , B29K2509/02 , B29K2995/0005 , B29K2995/0006 , B29K2995/0012 , B29L2031/3425
Abstract: A 3D printing system includes a reservoir for a UV-curable dielectric material in communication with a first nozzle configured to print the UV-curable dielectric material onto a substrate and a reservoir for a low CTE filler in communication with a second nozzle configured to print the low CTE filler onto the substrate, and a reservoir for a conductive ink in communication with a third nozzle configured to print the conductive ink onto the substrate. The 3D printing system prints the UV-curable dielectric material and the low CTE filler such that the printed low CTE filler mixes with the printed UV-curable dielectric material and forms a UV-curable dielectric layer with the low CTE filler dispersed therein.
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7.发明授权公开(公告)号：US10556481B2
公开(公告)日：2020-02-11
申请号：US15633123
申请日：2017-06-26
Inventor： Feng Zhou , Tianzhu Fan , Shailesh N. Joshi , Ercan Mehmet Dede
IPC: B60H1/00
Abstract: Systems and methods for providing heating and cooling to a cabin of an autonomous or semiautonomous electric vehicle. A system includes one or more autonomous or semiautonomous electric vehicle components generating thermal energy as a byproduct of operation, a radiator fluidly coupled to the one or more vehicle components and positioned downstream from the one or more vehicle components such that the radiator receives at least a portion of the thermal energy, a thermoelectric cooler thermally coupled to and located downstream from the radiator, and one or more bypass valves that control fluid flow from the radiator such that fluid flows directly to a cabin of the vehicle or flows through the thermoelectric cooler before flowing into the cabin.
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公开(公告)号：US12249554B2
公开(公告)日：2025-03-11
申请号：US18162905
申请日：2023-02-01
Inventor： Feng Zhou , Tianzhu Fan
IPC: H01L23/36 , H01L23/367 , H01L23/373
Abstract: In one embodiment, a power electronics assembly includes a power device assembly further including an S-cell. The S-cell includes a first metal layer having a recess, a graphite layer bonded to the first metal layer, a second metal layer bonded to the graphite layer, and a ceramic layer, wherein the ceramic layer has a first metalized surface and a second metalized surface, and the first metalized surface is bonded to the second metal layer by a solder layer. The power electronics assembly further includes a power device disposed within the recess of the first metal layer, and a cold plate, wherein the second metalized surface of the ceramic layer is bonded to a surface of the cold plate.
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公开(公告)号：US20240341043A1
公开(公告)日：2024-10-10
申请号：US18130719
申请日：2023-04-04
Inventor： Feng Zhou , Tianzhu Fan , Ercan Mehmet Dede
CPC classification number: H05K3/4611 , H05K3/0047 , H05K3/30 , H05K3/423 , H05K7/20254 , H05K7/20272 , H05K7/20927 , B33Y10/00 , H05K2203/107
Abstract: A method for high volume manufacture of highly integrated power electronics embedded printed circuit board (PCB)-cold plate assemblies includes bonding a power device fabrication panel to a multi-layer PCB, drilling via passageways in the multi-layer PCB, and electroplating a conductive metal into the vias before bonding the power device fabrication panel to a plurality of cold plates and forming an IPEs embedded PCB-cold plate fabrication panel. The method also includes cutting the IPEs embedded PCB-cold plate fabrication panel into a plurality of highly IPEs embedded PCB-cold plate assemblies.
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10.发明授权公开(公告)号：US12096596B2
公开(公告)日：2024-09-17
申请号：US17968162
申请日：2022-10-18
Inventor： Tianzhu Fan , Feng Zhou
IPC: H05K7/20 , H01L23/367 , H05K1/02 , H05K1/05 , H05K3/00
CPC classification number: H05K7/20254 , H01L23/367 , H05K1/0204 , H05K1/0298 , H05K1/05 , H05K3/0061 , H05K7/209
Abstract: A power electronics assembly, power electronics device assemblies, and a cold plate incorporating power electronics device assemblies are disclosed. The power electronics assembly includes a cold plate including a power electronics device assembly including an S-cell and a power electronics device. The S-cell includes a first graphite layer a second graphite layer and a metal layer encasing the first graphite layer and the second graphite layer. A recess is formed in an outer surface of the metal layer. The power electronics device is disposed within the recess of the outer surface of the S-cell.
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