公开(公告)号：US3581303A

公开(公告)日：1971-05-25

申请号：US3581303D

申请日：1967-10-06

Applicant: TRW INC

Inventor： KELLY FRANKLIN G

IPC: H03M1/00 ,  H03K13/02 ,  H03K13/04

CPC classification number: H03M1/00 ,  H03M1/08

Abstract: A digital to analog converter includes a plurality of parallel connected circuits, each of which has a switching transistor in series with a calibrating or metering resistor. The metering resistors have resistance values that differ from each other by a multiple of two. The switching transistors each have an input terminal for reception of a digital input signal that switches the transistor on. When a transistor is switched on a current is produced that is proportional to the resistance value of the metering resistor in that particular circuit. The currents are summed in a summing transistor and a summing resistor that are connected in series with the parallel connected circuits. The summing transistor is provided with means for clamping its emitter voltage on the base thereof. The different currents flowing through the summing transistor and summing resistor produce changes in the voltage across the summing transistor that are compensated by changes in the voltage across the emitter-collector of the summing transistor, while maintaining constant the voltage across the metering resistors. The voltage across the summing resistor is thereby a function only of the resistance values of the metering resistors.

公开(公告)号：US3459999A

公开(公告)日：1969-08-05

申请号：US3459999D

申请日：1967-07-03

Applicant: TRW INC

Inventor： KELLY FRANKLIN G ,  ACTON DONALD J

IPC: H01R12/51 ,  H05K1/14 ,  H05K1/18 ,  H05K3/34 ,  H05K3/36 ,  H05K3/42 ,  H02B1/04 ,  H02B9/00 ,  H05K1/00

CPC classification number: H05K1/185 ,  H05K1/141 ,  H05K3/3447 ,  H05K3/366 ,  H05K3/429 ,  H05K2201/10287 ,  H05K2201/1034 ,  H05K2201/10689 ,  H05K2203/1316 ,  H05K2203/1469

公开(公告)号：US3566131A

公开(公告)日：1971-02-23

申请号：US3566131D

申请日：1967-10-06

Applicant: TRW INC

Inventor： KELLY FRANKLIN G

IPC: B64G1/42 ,  B64G1/44 ,  G01S3/784 ,  H03M1/00 ,  H01J39/12

CPC classification number: G01S3/784 ,  B64G1/428 ,  B64G1/443 ,  H03M1/74 ,  Y10S136/293

Abstract: A current sensing circuit for use in a satellite attitude detecting system employs an array of solar cell panels connected in parallel circuits. Each parallel circuit includes a solar cell panel connected in series with the input circuit of a transistor. The output circuit of the transistor provides a logic output current that is fed to a digital-to-analog converter. The output current remains constant for all values of solar intensity that exceed a predetermined threshold level.

公开(公告)号：US3493765A

公开(公告)日：1970-02-03

申请号：US3493765D

申请日：1967-01-05

Applicant: TRW INC

Inventor： KELLY FRANKLIN G ,  HORN HARRY J

IPC: B64G1/36 ,  G01S3/783 ,  H01J39/12 ,  G01J1/20 ,  H01J39/00

CPC classification number: G01S3/783 ,  B64G1/36 ,  B64G1/363 ,  B64G2700/00 ,  Y10S136/291

公开(公告)号：US3302703A

公开(公告)日：1967-02-07

申请号：US38013664

申请日：1964-07-03

Applicant: TRW INC

Inventor： KELLY FRANKLIN G

IPC: F25D19/00 ,  G05D23/01 ,  G05D23/22 ,  G05D23/275

CPC classification number: F28F13/00 ,  F25D19/006 ,  F28F2013/008 ,  G05D23/01 ,  G05D23/192 ,  G05D23/22 ,  G05D23/275