公开(公告)号：US20230386951A1

公开(公告)日：2023-11-30

申请号：US17828691

申请日：2022-05-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Sheng Lin ,  Chien-Tung Yu ,  Chia-Hsiang Lin ,  Chin-Hua Wang ,  Shin-Puu Jeng

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

CPC classification number: H01L23/3135 ,  H01L25/0655 ,  H01L24/16 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L21/6835 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/563 ,  H01L21/565 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2224/16227 ,  H01L2924/18161 ,  H01L2924/351

Abstract: In an embodiment, a package including: a redistribution structure including a first dielectric layer and a first conductive element disposed in the first dielectric layer; a first semiconductor device bonded to the redistribution structure, wherein the first semiconductor device includes a first corner; and an underfill disposed over the redistribution structure and including a first protrusion extending into the first dielectric layer of the redistribution structure, wherein the first protrusion of the underfill overlaps the first corner of the first semiconductor device in a plan view.

公开(公告)号：US20230307338A1

公开(公告)日：2023-09-28

申请号：US17706313

申请日：2022-03-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Tung Yu ,  Chia-Hsiang Lin ,  Chi-Pu Lin ,  Shin-Puu Jeng

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L21/48

CPC classification number: H01L23/49822 ,  H01L24/73 ,  H01L24/16 ,  H01L24/32 ,  H01L25/0655 ,  H01L25/105 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/24 ,  H01L2224/24226 ,  H01L2224/73204 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/0651 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L23/49816

Abstract: A method includes forming a redistribution structure, wherein forming the redistribution structure includes forming a first conductive material on a portion of a first seed layer, forming a mask over the first seed layer and the first conductive material, wherein an opening in the mask at least partially exposes the first conductive material, forming a first conductive via in the opening, etching portions of the first seed layer using the first conductive material as an etching mask, depositing a first insulating layer over the first conductive via, the first conductive material and remaining portions of the first seed layer, and etching the first insulating layer such that a portion of the first conductive via protrudes above a top surface of the first insulating layer, and attaching a first die to the redistribution structure using first electrical connectors.