公开(公告)号：US10790164B1

公开(公告)日：2020-09-29

申请号：US16439944

申请日：2019-06-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Yi Lin ,  Che-Chia Yang ,  Kuang-Chun Lee ,  Yu-Sheng Lin ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/373 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/522 ,  H01L25/065 ,  H01L23/29

Abstract: A method for forming a package structure is provided. The method includes forming a first die over a first substrate, and injecting a molding compound material from a first side of the first die to a second side of the first die. The molding compound material includes a plurality of first fillers, each of the first fillers has a length along a longitudinal axis and a width along a transverse direction, and the length is greater than the width. The method further includes heating the molding compound material to form a package layer over the first die, and the first fillers are substantially parallel to each other.

公开(公告)号：US20230411234A1

公开(公告)日：2023-12-21

申请号：US17825748

申请日：2022-05-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shu-Shen Yeh ,  Yu Chen Lee ,  Po-Chen Lai ,  Po-Yao Lin ,  Shin-Puu Jeng ,  Yu-Sheng Lin ,  Chien-Hung Chen

IPC: H01L23/367 ,  H01L23/538 ,  H01L23/00

CPC classification number: H01L23/3675 ,  H01L23/5385 ,  H01L2224/32245 ,  H01L24/83 ,  H01L24/32

Abstract: A device includes a package substrate, an interposer having a first side bonded to the package substrate, a first die bonded to a second side of the interposer, the second side being opposite the first side, a ring on the package substrate, wherein the ring surrounds the first die and the interposer; and a heat spreader over and coupled to the ring and the first die, wherein a first coefficient of thermal expansion of a first material of the ring and a second coefficient of thermal expansion of a second material of the heat spreader are different, and wherein in a cross-sectional view a combined structure of the heat spreader and the ring have a H-shaped profile.

公开(公告)号：US20230386951A1

公开(公告)日：2023-11-30

申请号：US17828691

申请日：2022-05-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Sheng Lin ,  Chien-Tung Yu ,  Chia-Hsiang Lin ,  Chin-Hua Wang ,  Shin-Puu Jeng

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

CPC classification number: H01L23/3135 ,  H01L25/0655 ,  H01L24/16 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L21/6835 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/563 ,  H01L21/565 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2224/16227 ,  H01L2924/18161 ,  H01L2924/351

Abstract: In an embodiment, a package including: a redistribution structure including a first dielectric layer and a first conductive element disposed in the first dielectric layer; a first semiconductor device bonded to the redistribution structure, wherein the first semiconductor device includes a first corner; and an underfill disposed over the redistribution structure and including a first protrusion extending into the first dielectric layer of the redistribution structure, wherein the first protrusion of the underfill overlaps the first corner of the first semiconductor device in a plan view.

公开(公告)号：US20210090906A1

公开(公告)日：2021-03-25

申请号：US17099180

申请日：2020-11-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Yu Tsai ,  Tsung-Shang Wei ,  Yu-Sheng Lin ,  Wen-Chih Chiou ,  Shin-Puu Jeng

IPC: H01L21/56 ,  H01L25/065 ,  H01L25/00 ,  H01L23/60 ,  H01L21/48 ,  H01L23/538 ,  H01L23/00 ,  H01L21/683 ,  H01L23/16 ,  H01L23/31 ,  H01L23/29 ,  H01L23/498

Abstract: A method of manufacturing a semiconductor device includes bonding a first semiconductor die and a second semiconductor die to a first substrate, forming a conductive layer over the first semiconductor die, the second semiconductor die, and the first substrate, applying an encapsulant over the conductive layer, and removing a portion of the encapsulant, wherein the removing the portion of the encapsulant exposes the conductive layer.

公开(公告)号：US20230387063A1

公开(公告)日：2023-11-30

申请号：US17664689

申请日：2022-05-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Sheng Lin ,  Shu-Shen Yeh ,  Ming-Chih Yew ,  Chin-Hua Wang ,  Shin-Puu Jeng

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/498

CPC classification number: H01L24/32 ,  H01L24/27 ,  H01L25/0655 ,  H01L23/49833 ,  H01L2924/3511 ,  H01L2924/35121 ,  H01L2924/37001 ,  H01L24/16 ,  H01L24/73 ,  H01L2224/73204 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/26155 ,  H01L2224/3201 ,  H01L2224/27013 ,  H01L2924/1436 ,  H01L2924/1431 ,  H01L23/49838 ,  H01L23/49822 ,  H01L23/49816

Abstract: A package includes a package substrate, the package substrate having a first side and a second side opposite to the first side, a package component bonded to the first side of the package substrate, a front-side warpage control structure attached to the first side of the package substrate, and a backside warpage control structure embedded in the package substrate from the second side of the package substrate. The front-side warpage control structure includes a first disconnected structure and a second disconnected structure laterally separated from each other by a gap. The backside warpage control structure includes a third disconnected structure and a fourth disconnected structure laterally separated from each other.

公开(公告)号：US20230378092A1

公开(公告)日：2023-11-23

申请号：US17663692

申请日：2022-05-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Chen Lai ,  Ming-Chih Yew ,  Shin-Puu Jeng ,  Yu-Sheng Lin

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L23/562 ,  H01L25/0655 ,  H01L24/73 ,  H01L24/32 ,  H01L24/16 ,  H01L25/50 ,  H01L2924/1434 ,  H01L2924/1431 ,  H01L2924/3511 ,  H01L2924/35121 ,  H01L2224/73204 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2924/1711 ,  H01L2924/172

Abstract: A semiconductor package including a recessed stiffener ring and a method of forming are provided. The semiconductor package may include a substrate, a semiconductor die bonded to the substrate, an underfill between the semiconductor die and the substrate, and a stiffener ring attached to the substrate, wherein the stiffener ring encircles the semiconductor die in a top view. The stiffener ring may include a recess that faces the semiconductor die.