-
公开(公告)号:US20230215853A1
公开(公告)日:2023-07-06
申请号:US18182477
申请日:2023-03-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Chieh Chang , Chung-Hao Tsai , Chuei-Tang Wang , Hsing-Kuo Hsia , Chen-Hua Yu
IPC: H01L25/16 , H01L23/48 , H01L21/768 , H01L23/522
CPC classification number: H01L25/167 , H01L23/481 , H01L21/76898 , H01L23/5226 , H01L2224/0401 , H01L23/5283
Abstract: A method includes forming multiple photonic devices in a semiconductor wafer, forming a v-shaped groove in a first side of the semiconductor wafer, forming an opening extending through the semiconductor wafer, forming multiple conductive features within the opening, wherein the conductive features extend from the first side of the semiconductor wafer to a second side of the semiconductor wafer, forming a polymer material over the v-shaped groove, depositing a molding material within the opening, wherein the multiple conductive features are separated by the molding material, after depositing the molding material, removing the polymer material to expose the v-shaped groove, and placing an optical fiber within the v-shaped groove.
-
公开(公告)号:US11605622B2
公开(公告)日:2023-03-14
申请号:US17806527
申请日:2022-06-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Chieh Chang , Chung-Hao Tsai , Chuei-Tang Wang , Hsing-Kuo Hsia , Chen-Hua Yu
IPC: H01L25/16 , H01L23/48 , H01L21/768 , H01L23/522 , H01L23/528 , H01L23/31 , H01L21/56 , G02B6/12 , G02B6/122
Abstract: A method includes forming multiple photonic devices in a semiconductor wafer, forming a v-shaped groove in a first side of the semiconductor wafer, forming an opening extending through the semiconductor wafer, forming multiple conductive features within the opening, wherein the conductive features extend from the first side of the semiconductor wafer to a second side of the semiconductor wafer, forming a polymer material over the v-shaped groove, depositing a molding material within the opening, wherein the multiple conductive features are separated by the molding material, after depositing the molding material, removing the polymer material to expose the v-shaped groove, and placing an optical fiber within the v-shaped groove.
-
3.
公开(公告)号:US11854872B2
公开(公告)日:2023-12-26
申请号:US17869560
申请日:2022-07-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Hao Kung , Chih-Chieh Chang , Kao-Feng Liao , Hui-Chi Huang , Kei-Wei Chen
IPC: H01L21/768 , H01L29/66 , H01L21/02
CPC classification number: H01L21/76831 , H01L21/7684 , H01L21/76814 , H01L21/76877 , H01L21/02211 , H01L21/76843 , H01L29/66795
Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.
-
公开(公告)号:US20220328466A1
公开(公告)日:2022-10-13
申请号:US17806527
申请日:2022-06-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Chieh Chang , Chung-Hao Tsai , Chuei-Tang Wang , Hsing-Kuo Hsia , Chen-Hua Yu
IPC: H01L25/16 , H01L23/48 , H01L21/768 , H01L23/522
Abstract: A method includes forming multiple photonic devices in a semiconductor wafer, forming a v-shaped groove in a first side of the semiconductor wafer, forming an opening extending through the semiconductor wafer, forming multiple conductive features within the opening, wherein the conductive features extend from the first side of the semiconductor wafer to a second side of the semiconductor wafer, forming a polymer material over the v-shaped groove, depositing a molding material within the opening, wherein the multiple conductive features are separated by the molding material, after depositing the molding material, removing the polymer material to expose the v-shaped groove, and placing an optical fiber within the v-shaped groove.
-
公开(公告)号:US20200174187A1
公开(公告)日:2020-06-04
申请号:US16569673
申请日:2019-09-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Chieh Chang , Chung-Hao Tsai , Chen-Hua Yu , Chuei-Tang Wang
Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a photonic die, an encapsulant and a wave guide structure. The photonic die includes a substrate and a dielectric layer. The substrate has a wave guide pattern. The dielectric layer is disposed over the substrate. The photonic die is encapsulated by the encapsulant. The wave guide structure spans over the front side of the photonic die and a top surface of the encapsulant, and penetrates the dielectric layer to be optically coupled with the wave guide pattern.
-
公开(公告)号:US20240395562A1
公开(公告)日:2024-11-28
申请号:US18790908
申请日:2024-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Hao Kung , Tung-Kai Chen , Chih-Chieh Chang , Kao-Feng Liao , Hui-Chi Huang , Kei-Wei Chen
IPC: H01L21/321 , C09G1/02 , C09G1/04 , H01L21/306 , H01L21/768
Abstract: Methods of manufacturing a chemical-mechanical polishing (CMP) slurry and methods of performing CMP process on a substrate comprising metal features are described herein. The CMP slurry may be manufactured using a balanced concentration ratio of chelator additives to inhibitor additives, the ratio being determined based on an electro potential (Ev) value of a metal material of the substrate. The CMP process may be performed on the substrate based on the balanced concentration ratio of chelator additives to inhibitor additives of the CMP slurry.
-
公开(公告)号:US11841541B2
公开(公告)日:2023-12-12
申请号:US16882773
申请日:2020-05-26
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Chieh Chang , Chung-Hao Tsai , Chen-Hua Yu , Chuei-Tang Wang
IPC: G02B6/42 , H01L21/48 , H01L21/56 , H01L23/538 , H01L25/16 , G02B6/43 , H01L23/31 , H01L23/00 , H01L23/498 , H01L21/683
CPC classification number: G02B6/4274 , G02B6/4202 , G02B6/4239 , H01L21/4853 , H01L21/4857 , H01L21/565 , H01L23/3128 , H01L23/5383 , H01L23/5386 , H01L23/5389 , H01L24/09 , H01L24/20 , H01L25/167 , H01L2224/214
Abstract: A package assembly and a manufacturing method thereof are provided. The package assembly includes a first package component and an optical signal port disposed aside the first package component. The first package component includes a first die including an electronic integrated circuit, a first insulating encapsulation laterally covering the first die, a redistribution structure disposed on the first die and the first insulating encapsulation, and a second die including a photonic integrated circuit and electrically coupled to the first die through the redistribution structure. The optical signal port is optically coupled to an edge facet of the second die of the first package component.
-
8.
公开(公告)号:US20220367257A1
公开(公告)日:2022-11-17
申请号:US17869560
申请日:2022-07-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Hao Kung , Chih-Chieh Chang , Kao-Feng Liao , Hui-Chi Huang , Kei-Wei Chen
IPC: H01L21/768
Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.
-
公开(公告)号:US20210313190A1
公开(公告)日:2021-10-07
申请号:US17353222
申请日:2021-06-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Hao Kung , Tung-Kai Chen , Chih-Chieh Chang , Kao-Feng Liao , Hui-Chi Huang , Kei-Wei Chen
IPC: H01L21/321 , H01L21/768 , C09G1/02 , C09G1/04 , H01L21/306
Abstract: Methods of manufacturing a chemical-mechanical polishing (CMP) slurry and methods of performing CMP process on a substrate comprising metal features are described herein. The CMP slurry may be manufactured using a balanced concentration ratio of chelator additives to inhibitor additives, the ratio being determined based on an electro potential (Ev) value of a metal material of the substrate. The CMP process may be performed on the substrate based on the balanced concentration ratio of chelator additives to inhibitor additives of the CMP slurry.
-
公开(公告)号:US20210202453A1
公开(公告)日:2021-07-01
申请号:US17181279
申请日:2021-02-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Chieh Chang , Chung-Hao Tsai , Chuei-Tang Wang , Hsing-Kuo Hsia , Chen-Hua Yu
IPC: H01L25/16 , H01L23/48 , H01L21/768 , H01L23/522
Abstract: A method includes forming multiple photonic devices in a semiconductor wafer, forming a v-shaped groove in a first side of the semiconductor wafer, forming an opening extending through the semiconductor wafer, forming multiple conductive features within the opening, wherein the conductive features extend from the first side of the semiconductor wafer to a second side of the semiconductor wafer, forming a polymer material over the v-shaped groove, depositing a molding material within the opening, wherein the multiple conductive features are separated by the molding material, after depositing the molding material, removing the polymer material to expose the v-shaped groove, and placing an optical fiber within the v-shaped groove.
-
-
-
-
-
-
-
-
-