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公开(公告)号:US20240329336A1
公开(公告)日:2024-10-03
申请号:US18190223
申请日:2023-03-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tung-Liang Shao , Hsing-Kuo Hsia , Chen-Hua Yu , Chih-Ming Ke , Chih-Wei Tseng , You-Rong Shaw
IPC: G02B6/42
CPC classification number: G02B6/4214
Abstract: In some embodiments, a photonic device includes a photonic interconnect structure that includes a first cladding layer; a waveguide over the first cladding layer; a second cladding layer disposed over the waveguide; a transparent material in the first cladding layer and the second cladding layer, the transparent material includes a first sidewall adjacent to the waveguide and a second sidewall tilted with respect to the first sidewall of the transparent material; and a first reflective film over the second sidewall of the transparent material. In some embodiments, the photonic device also includes a light-receiving structure that includes a transparent protrusion above the transparent material, the transparent protrusion including a first sidewall and a second sidewall opposite to the second sidewall of the transparent protrusion; and a second reflective film over the second sidewall of the transparent protrusion and horizontally overlapping the first reflective film.
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公开(公告)号:US20240162109A1
公开(公告)日:2024-05-16
申请号:US18152615
申请日:2023-01-10
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hung-Yi Kuo , Chen-Hua Yu , Kuo-Chung Yee , Yu-Jen Lien , Ke-Han Shen , Wei-Kong Sheng , Chung-Shi Liu , Szu-Wei Lu , Tsung-Fu Tsai , Chung-Ju Lee , Chih-Ming Ke
IPC: H01L23/367 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/373 , H10B80/00
CPC classification number: H01L23/3677 , H01L21/56 , H01L23/3128 , H01L23/3736 , H01L24/16 , H01L24/32 , H01L24/33 , H01L24/73 , H10B80/00 , H01L2224/16225 , H01L2224/29124 , H01L2224/29147 , H01L2224/29155 , H01L2224/29166 , H01L2224/29172 , H01L2224/32245 , H01L2224/33181 , H01L2224/73204 , H01L2224/73253
Abstract: In an embodiment, a package includes an integrated circuit device attached to a substrate; an encapsulant disposed over the substrate and laterally around the integrated circuit device, wherein a top surface of the encapsulant is coplanar with the top surface of the integrated circuit device; and a heat dissipation structure disposed over the integrated circuit device and the encapsulant, wherein the heat dissipation structure includes a spreading layer disposed over the encapsulant and the integrated circuit device, wherein the spreading layer includes a plurality of islands, wherein at least a portion of the islands are arranged as lines extending in a first direction in a plan view; a plurality of pillars disposed over the islands of the spreading layer; and nanostructures disposed over the pillars.
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公开(公告)号:US11656391B2
公开(公告)日:2023-05-23
申请号:US16882094
申请日:2020-05-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hung-Chih Hsieh , Kai Wu , Yen-Liang Chen , Kai-Hsiung Chen , Po-Chung Cheng , Chih-Ming Ke
CPC classification number: G02B5/1866 , G02B5/18 , G02F1/31 , G03F1/44 , G03F7/2024 , G03F7/70616 , G03F7/70633 , G03H1/26 , G02B5/1861
Abstract: A method for performing DBO measurements utilizing apertures having a single pole includes using a first aperture plate to measure X-axis diffraction of a composite grating. In some embodiments, the first aperture plate has a first pair of radiation-transmitting regions disposed along a first diametrical axis and on opposite sides of an optical axis that is aligned with a center of the first aperture plate. Thereafter, in some embodiments, a second aperture plate, which is complementary to the first aperture plate, is used to measure Y-axis diffraction of the composite grating. By way of example, the second aperture plate has a second pair of radiation-transmitting regions disposed along a second diametrical axis and on opposite sides of the optical axis. In some cases, the second diametrical axis is substantially perpendicular to the first diametrical axis.
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公开(公告)号:US20200284954A1
公开(公告)日:2020-09-10
申请号:US16882094
申请日:2020-05-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hung-Chih Hsieh , Kai Wu , Yem-Liang Chen , Kai-Hsiung Chen , Po-Chung Cheng , Chih-Ming Ke
Abstract: A method for performing DBO measurements utilizing apertures having a single pole includes using a first aperture plate to measure X-axis diffraction of a composite grating. In some embodiments, the first aperture plate has a first pair of radiation-transmitting regions disposed along a first diametrical axis and on opposite sides of an optical axis that is aligned with a center of the first aperture plate. Thereafter, in some embodiments, a second aperture plate, which is complementary to the first aperture plate, is used to measure Y-axis diffraction of the composite grating. By way of example, the second aperture plate has a second pair of radiation-transmitting regions disposed along a second diametrical axis and on opposite sides of the optical axis. In some cases, the second diametrical axis is substantially perpendicular to the first diametrical axis.
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公开(公告)号:US10684556B2
公开(公告)日:2020-06-16
申请号:US16402828
申请日:2019-05-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Weimin Hu , Yang-Hung Chang , Kai-Hsiung Chen , Chun-Ming Hu , Chih-Ming Ke
IPC: G03F7/20
Abstract: The present disclosure provides a method. The method includes patterning a substrate by a patterning tool; collecting a plurality of overlay errors from a plurality of fields on the substrate; identifying noise from the plurality of overlay errors by applying a first filtering operation and a second filtering operation that is different from the first filtering operation. The method further includes grouping the plurality of overlay errors that are not identified as noise into a set of filtered overlay errors; calculating an overlay compensation based on the set of filtered overlay errors; and performing a compensation process to the patterning tool according to the overlay compensation.
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公开(公告)号:US10521548B2
公开(公告)日:2019-12-31
申请号:US16042468
申请日:2018-07-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yang-Hung Chang , Che-Yuan Sun , Chih-Ming Ke , Chun-Ming Hu
IPC: G06F17/50 , G01R31/28 , G01R31/307 , G06T7/00
Abstract: Defect information obtained from a test wafer is received. The test wafer was fabricated according to an Integrated Circuit (IC) design layout. A plurality of first regions of interest (ROIs) is received based on the defect information. The first ROIs each correspond to a region of the IC design layout where a wafer defect has occurred. A frequency domain analysis is performed for the first ROIs. A wafer defect probability is forecast for the IC design layout based at least in part on the frequency domain analysis.
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公开(公告)号:US20180173110A1
公开(公告)日:2018-06-21
申请号:US15644126
申请日:2017-07-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Weimin Hu , Yang-Hung Chang , Kai-Hsiung Chen , Chun-Ming Hu , Chih-Ming Ke
IPC: G03F7/20
CPC classification number: G03F7/70633 , G03F7/705
Abstract: The present disclosure provides a method. The method includes patterning a substrate by a patterning tool; collecting a plurality of overlay errors from a plurality of fields on the substrate; identifying noise from the plurality of overlay errors by applying a first filtering operation and a second filtering operation that is different from the first filtering operation. The method further includes grouping the plurality of overlay errors that are not identified as noise into a set of filtered overlay errors; calculating an overlay compensation based on the set of filtered overlay errors; and performing a compensation process to the patterning tool according to the overlay compensation.
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公开(公告)号:US12062582B2
公开(公告)日:2024-08-13
申请号:US17084628
申请日:2020-10-30
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Li-Chao Yin , Hung-Bin Lin , Hsin-Hsien Wu , Chih-Ming Ke , Chyi Shyuan Chern , Ming-Hua Lo
IPC: H01L21/66 , G03F7/00 , H01L21/30 , H01L21/322
CPC classification number: H01L22/12 , G03F7/70033 , G03F7/70616 , G03F7/70783 , H01L21/30 , H01L21/3228 , H01L22/20
Abstract: In a method, a structure including two or more materials having different coefficients of thermal expansion is prepared, and the structure is subjected to a cryogenic treatment. In one or more of the foregoing and following embodiments, the structure includes a semiconductor wafer and one or more layers are formed on the semiconductor wafer.
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公开(公告)号:US10663633B2
公开(公告)日:2020-05-26
申请号:US15637910
申请日:2017-06-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hung-Chih Hsieh , Kai Wu , Yen-Liang Chen , Kai-Hsiung Chen , Po-Chung Cheng , Chih-Ming Ke
Abstract: A method for performing DBO measurements utilizing apertures having a single pole includes using a first aperture plate to measure X-axis diffraction of a composite grating. In some embodiments, the first aperture plate has a first pair of radiation-transmitting regions disposed along a first diametrical axis and on opposite sides of an optical axis that is aligned with a center of the first aperture plate. Thereafter, in some embodiments, a second aperture plate, which is complementary to the first aperture plate, is used to measure Y-axis diffraction of the composite grating. By way of example, the second aperture plate has a second pair of radiation-transmitting regions disposed along a second diametrical axis and on opposite sides of the optical axis. In some cases, the second diametrical axis is substantially perpendicular to the first diametrical axis.
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公开(公告)号:US10281827B2
公开(公告)日:2019-05-07
申请号:US15644126
申请日:2017-07-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Weimin Hu , Yang-Hung Chang , Kai-Hsiung Chen , Chun-Ming Hu , Chih-Ming Ke
IPC: G03F7/20
Abstract: The present disclosure provides a method. The method includes patterning a substrate by a patterning tool; collecting a plurality of overlay errors from a plurality of fields on the substrate; identifying noise from the plurality of overlay errors by applying a first filtering operation and a second filtering operation that is different from the first filtering operation. The method further includes grouping the plurality of overlay errors that are not identified as noise into a set of filtered overlay errors; calculating an overlay compensation based on the set of filtered overlay errors; and performing a compensation process to the patterning tool according to the overlay compensation.
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