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公开(公告)号:US11942419B2
公开(公告)日:2024-03-26
申请号:US17809914
申请日:2022-06-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shiu-Ko JangJian , Tsung-Hsuan Hong , Chun Che Lin , Chih-Nan Wu
IPC: H01L23/522 , H01L21/768 , H01L23/532
CPC classification number: H01L23/5226 , H01L21/76802 , H01L21/76807 , H01L21/76826 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/76877 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L21/76849 , H01L2924/0002 , H01L2924/0002 , H01L2924/00
Abstract: An integrated circuit structure includes a dielectric layer and an etch stop layer. The etch stop layer includes a first sub layer including a metal nitride over the first dielectric layer, and a second sub layer overlying or underlying the first sub layer. The second sub layer includes a metal compound comprising an element selected from carbon and oxygen, and is in contact with the first sub layer.
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公开(公告)号:US20220336348A1
公开(公告)日:2022-10-20
申请号:US17809914
申请日:2022-06-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shiu-Ko JangJian , Tsung-Hsuan Hong , Chun Che Lin , Chih-Nan Wu
IPC: H01L23/522 , H01L21/768 , H01L23/532
Abstract: An integrated circuit structure includes a dielectric layer and an etch stop layer. The etch stop layer includes a first sub layer including a metal nitride over the first dielectric layer, and a second sub layer overlying or underlying the first sub layer. The second sub layer includes a metal compound comprising an element selected from carbon and oxygen, and is in contact with the first sub layer.
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公开(公告)号:US20200350244A1
公开(公告)日:2020-11-05
申请号:US16933551
申请日:2020-07-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shiu-Ko JangJian , Tsung-Hsuan Hong , Chun Che Lin , Chih-Nan Wu
IPC: H01L23/522 , H01L21/768 , H01L23/532
Abstract: An integrated circuit structure includes a dielectric layer and an etch stop layer. The etch stop layer includes a first sub layer including a metal nitride over the first dielectric layer, and a second sub layer overlying or underlying the first sub layer. The second sub layer includes a metal compound comprising an element selected from carbon and oxygen, and is in contact with the first sub layer.
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公开(公告)号:US09691766B1
公开(公告)日:2017-06-27
申请号:US15088117
申请日:2016-04-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jia-Ming Lin , Chun Che Lin , Shiu-Ko JangJian , Wei Ken Lin , Kuang Yao Lo
IPC: H01L27/088 , H01L21/8234 , H01L21/3105 , H01L21/311 , H01L21/3115 , H01L29/06 , H01L29/66
CPC classification number: H01L27/0886 , H01L21/31111 , H01L21/31116 , H01L21/31155 , H01L21/823431 , H01L21/823481 , H01L29/0649 , H01L29/66545 , H01L29/66795 , H01L29/66803
Abstract: A fin field effect transistor (FinFET) including a substrate, a plurality of insulators, and a gate stack is provided. The substrate includes a plurality of trenches and at least one semiconductor fin between the trenches. The insulators are disposed in the trenches and include doped regions distributed therein. The gate stack partially covers the at least one semiconductor fin and the insulators. A method for fabricating the aforesaid FinFET is also discussed.
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