公开(公告)号：US20180308797A1

公开(公告)日：2018-10-25

申请号：US15496067

申请日：2017-04-25

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wen-Che Tsai ,  Min-Yann Hsieh ,  Hua-Feng Chen ,  Kuo-Hua Pan

IPC: H01L23/535 ,  H01L23/528 ,  H01L29/08 ,  H01L21/768 ,  H01L29/78

CPC classification number: H01L23/535 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76895 ,  H01L23/5283 ,  H01L29/0847 ,  H01L29/7848 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate, an inter-layer dielectric layer, a contact plug, and a contact hole liner. The substrate has a source/drain region. The inter-layer dielectric layer is over the substrate and has a contact hole therein. The contact plug is electrically connected to the source/drain region through the contact hole of the inter-layer dielectric layer. The contact hole liner extends between the contact plug and a sidewall of a first portion of the contact hole. The contact hole liner terminates prior to reaching a second portion of the contact hole. The first portion is between the second portion and the source/drain region.

公开(公告)号：US11721763B2

公开(公告)日：2023-08-08

申请号：US17124994

申请日：2020-12-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wen-Che Tsai ,  Min-Yann Hsieh ,  Hua-Feng Chen ,  Kuo-Hua Pan

IPC: H01L29/78 ,  H01L21/768 ,  H01L29/66 ,  H01L29/417 ,  H01L23/522 ,  H01L23/528 ,  H01L29/165 ,  H01L23/485

CPC classification number: H01L29/7851 ,  H01L21/76804 ,  H01L21/76831 ,  H01L21/76897 ,  H01L23/5226 ,  H01L23/5283 ,  H01L29/41766 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795 ,  H01L23/485 ,  H01L29/165 ,  H01L29/7848 ,  H01L2029/7858

Abstract: A method comprises forming a source/drain region on a substrate; forming a dielectric layer over the source/drain region; forming a contact hole in the dielectric layer; forming a contact hole liner in the contact hole; removing a first portion of the contact hole liner to expose a sidewall of the contact hole; etching the exposed sidewall of the contact hole to laterally expand the contact hole; and forming a contact plug in the laterally expanded contact hole.

公开(公告)号：US10332786B2

公开(公告)日：2019-06-25

申请号：US15619595

申请日：2017-06-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wen-Che Tsai ,  Min-Yann Hsieh ,  Hua-Feng Chen ,  Kuo-Hua Pan

IPC: H01L21/768 ,  H01L21/28 ,  H01L21/283

Abstract: A method for manufacturing a semiconductor device includes forming a gate stack over a substrate; forming an interlayer dielectric over the substrate to cover the gate stack; forming an opening in the interlayer dielectric to expose to the gate stack; forming a glue layer over the interlayer dielectric and in the opening; partially removing the glue layer, in which a portion of the glue layer remain in the opening; and tuning a profile of the remained portion of the glue layer.

公开(公告)号：US12288822B2

公开(公告)日：2025-04-29

申请号：US18338736

申请日：2023-06-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wen-Che Tsai ,  Min-Yann Hsieh ,  Hua-Feng Chen ,  Kuo-Hua Pan

IPC: H01L29/78 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/528 ,  H01L29/165 ,  H01L29/417 ,  H01L29/66

Abstract: A semiconductor device includes a substrate, an epitaxial structure over the substrate, a conductive structure, and a dielectric liner. The conductive structure extends from within the epitaxial structure to above the epitaxial structure. The dielectric liner extends along a sidewall of the conductive structure. The dielectric liner has a top end capped by the conductive structure.

公开(公告)号：US10074558B1

公开(公告)日：2018-09-11

申请号：US15800359

申请日：2017-11-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Che Tsai ,  Min-Yann Hsieh ,  Hua-Feng Chen ,  Kuo-Hua Pan

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/8234 ,  H01L21/285 ,  H01L21/311 ,  H01L23/528

CPC classification number: H01L21/7682 ,  H01L21/28568 ,  H01L21/31116 ,  H01L21/764 ,  H01L21/76843 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76897 ,  H01L21/823431 ,  H01L21/823475 ,  H01L21/823481 ,  H01L23/485 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53295

Abstract: The present disclosure provides a method that includes forming an isolation feature in a semiconductor substrate; forming a first fin and a second fin on the semiconductor substrate, wherein the first and second fins are laterally separated by the isolation feature; and forming an elongated contact feature landing on the first and second fins. The elongated contact feature is further embedded in the isolation feature, enclosing an air gap vertically between the contact feature and the isolation feature.