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    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20210210616A1

    公开(公告)日：2021-07-08

    申请号：US17157180

    申请日：2021-01-25

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： I-Chih CHEN ,  Ru-Shang HSIAO ,  Ching-Pin LIN ,  Chih-Mu HUANG ,  Fu-Tsun TSAI

    IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/423

    Abstract: A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

    METHOD OF FORMING SEMICONDUCTOR DEVICE WITH GATE
    3.
    发明申请
    METHOD OF FORMING SEMICONDUCTOR DEVICE WITH GATE 审中-公开

    公开(公告)号：US20200295188A1

    公开(公告)日：2020-09-17

    申请号：US16892458

    申请日：2020-06-04

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Jung-Chi JENG ,  I-Chih CHEN ,  Wen-Chang KUO ,  Ying-Hao CHEN ,  Ru-Shang HSIAO ,  Chih-Mu HUANG

    IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66

    Abstract: A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate. The method includes forming a gate over the semiconductor substrate. The method includes forming a support film over the isolation structure. The support film is a continuous film which continuously covers the isolation structure and the gate over the isolation structure, the support film conformally covers a first portion of a top surface and a second portion of a first sidewall of the gate, the top surface faces away from the semiconductor substrate, the support film and a topmost surface of the active region do not overlap with each other, and the topmost surface faces the gate. The method includes after forming the support film, forming lightly doped regions in the semiconductor substrate and at two opposite sides of the gate.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20250072082A1

    公开(公告)日：2025-02-27

    申请号：US18938087

    申请日：2024-11-05

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： I-Chih CHEN ,  Ru-Shang HSIAO ,  Ching-Pin LIN ,  Chih-Mu HUANG ,  Fu-Tsun TSAI

    IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/423

    Abstract: A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

    MECHANISM FOR FORMING SEMICONDUCTOR DEVICE WITH GATE
    7.
    发明申请
    MECHANISM FOR FORMING SEMICONDUCTOR DEVICE WITH GATE 有权
    用于形成具有盖的半导体器件的机构

    公开(公告)号：US20150129987A1

    公开(公告)日：2015-05-14

    申请号：US14080313

    申请日：2013-11-14

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Jung-Chi JENG ,  I-Chih CHEN ,  Wen-Chang KUO ,  Ying-Hao CHEN ,  Ru-Shang HSIAO ,  Chih-Mu HUANG

    IPC: H01L29/78 ,  H01L29/06 ,  H01L21/02 ,  H01L29/66

    CPC classification number: H01L29/7833 ,  H01L29/0649 ,  H01L29/6659

    Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and an isolation structure in the semiconductor substrate and surrounding an active region of the semiconductor substrate. The semiconductor device also includes a gate over the semiconductor substrate, and the gate has an intermediate portion over the active region and two end portions connected to the intermediate portion, and the end portions are over the isolation structure. The semiconductor device further includes a support film over the isolation structure and covering the isolation structure and at least one of the end portions of the gate. The support film exposes the active region and the intermediate portion of the gate.

    Abstract translation: 提供了用于形成半导体器件的机构的实施例。 半导体器件包括半导体衬底和半导体衬底中的隔离结构，并围绕半导体衬底的有源区。 半导体器件还包括半导体衬底上的栅极，并且栅极具有在有源区上方的中间部分和连接到中间部分的两个端部，并且端部在隔离结构上方。 半导体器件还包括隔离结构上的支撑膜，并覆盖隔离结构和栅极的至少一个端部。 支撑膜暴露栅极的有源区域和中间部分。

    ISOLATION STRUCTURES IN SEMICONDUCTOR DEVICES
    8.
    发明申请
    ISOLATION STRUCTURES IN SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20220406917A1

    公开(公告)日：2022-12-22

    申请号：US17738955

    申请日：2022-05-06

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Jian-Shian CHEN ,  Ru-Shang HSIAO

    IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234

    Abstract: A semiconductor device with different isolation structures and a method of fabricating the same are disclosed. The a method includes forming first and second fin structures on a substrate, forming a dummy fin structure on the substrate and between the first and second fin structures, forming a polysilicon structure on the dummy fin structure, forming source/drain regions on the first and second fin structures, and replacing the polysilicon structure with a dummy gate structure. A top portion of the dummy gate structure is formed wider than a bottom portion of the dummy gate structure.

    SOURCE/DRAIN EPITAXIAL STRUCTURES FOR HIGH VOLTAGE TRANSISTORS
    9.
    发明申请
    SOURCE/DRAIN EPITAXIAL STRUCTURES FOR HIGH VOLTAGE TRANSISTORS 有权

    公开(公告)号：US20210343596A1

    公开(公告)日：2021-11-04

    申请号：US17107091

    申请日：2020-11-30

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Sung-Hsin YANG ,  Jung-Chi JENG ,  Ru-Shang HSIAO

    IPC: H01L21/8234

    Abstract: The present disclosure describes a method for the formation of n-type and p-type epitaxial source/drain structures with substantially co-planar top surfaces and different depths across input/output (I/O) and non-I/O regions of a substrate. In some embodiments, the method includes forming fin structures and a planar portion on a substrate. The method also includes forming first gate structures on the fin structures and second gate structures on the planar portion. The method also includes etching the fin structures between the first gate structures to form first openings and etching the planar portion between the second gate structures to form second openings. Further, the method includes forming first epitaxial structures in the first openings and second epitaxial structures in the second openings, where top surfaces of the first and second epitaxial structures are substantially co-planar and bottom surfaces of the first and second epitaxial structures are not co-planar.

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