公开(公告)号：US11521858B2

公开(公告)日：2022-12-06

申请号：US17174990

申请日：2021-02-12

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Huan-Chieh Su ,  Zhi-Chang Lin ,  Ting-Hung Hsu ,  Jia-Ni Yu ,  Wei-Hao Wu ,  Yu-Ming Lin ,  Chih-Hao Wang

IPC分类号： H01L21/28 ,  H01L27/092 ,  H01L29/51 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/308

摘要： A semiconductor device includes a first transistor and a second transistor. The first transistor includes: a first source and a first drain separated by a first distance, a first semiconductor structure disposed between the first source and first drain, a first gate electrode disposed over the first semiconductor structure, and a first dielectric structure disposed over the first gate electrode. The first dielectric structure has a lower portion and an upper portion disposed over the lower portion and wider than the lower portion. The second transistor includes: a second source and a second drain separated by a second distance greater than the first distance, a second semiconductor structure disposed between the second source and second drain, a second gate electrode disposed over the second semiconductor structure, and a second dielectric structure disposed over the second gate electrode. The second dielectric structure and the first dielectric structure have different material compositions.

公开(公告)号：US11309396B2

公开(公告)日：2022-04-19

申请号：US16683486

申请日：2019-11-14

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wei-Hao Wu ,  Zhi-Chang Lin ,  Ting-Hung Hsu ,  Kuan-Lun Cheng

IPC分类号： H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  H01L27/092 ,  B82Y10/00 ,  H01L21/762 ,  H01L21/8238 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/775 ,  H01L21/822 ,  H01L27/06 ,  H01L27/12 ,  H01L29/08 ,  H01L27/088

摘要： A semiconductor device includes a first device formed over a substrate. The first device includes a first gate stack encircling a first nanostructure, and the first device is a logic circuit device. The semiconductor device includes a second device formed over the first device. The second device includes a second gate stack encircling a second nanostructure, and the second device is a static random access memory (SRAM).

公开(公告)号：US11205594B2

公开(公告)日：2021-12-21

申请号：US16895345

申请日：2020-06-08

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Kuo-Cheng Chiang ,  Ting-Hung Hsu ,  Chao-Hsiung Wang ,  Chi-Wen Liu

IPC分类号： H01L29/165 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/8238 ,  H01L21/84 ,  H01L29/66 ,  H01L27/092 ,  H01L27/12 ,  H01L29/78 ,  H01L21/02 ,  H01L21/306 ,  H01L21/311 ,  H01L21/762

摘要： A method includes forming Shallow Trench Isolation (STI) regions in a semiconductor substrate and a semiconductor strip between the STI regions. The method also include replacing a top portion of the semiconductor strip with a first semiconductor layer and a second semiconductor layer over the first semiconductor layer. The first semiconductor layer has a first germanium percentage higher than a second germanium percentage of the second semiconductor layer. The method also includes recessing the STI regions to form semiconductor fins, forming a gate stack over a middle portion of the semiconductor fin, and forming gate spacers on sidewalls of the gate stack. The method further includes forming fin spacers on sidewalls of an end portion of the semiconductor fin, recessing the end portion of the semiconductor fin, and growing an epitaxial region over the end portion of the semiconductor fin.

公开(公告)号：US11133394B2

公开(公告)日：2021-09-28

申请号：US16373988

申请日：2019-04-03

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Wei-Hao Wu ,  Zhi-Chang Lin ,  Ting-Hung Hsu ,  Kuan-Lun Cheng

IPC分类号： H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  H01L27/092 ,  B82Y10/00 ,  H01L21/762 ,  H01L21/8238 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/775 ,  H01L21/822 ,  H01L27/06 ,  H01L27/12 ,  H01L29/08 ,  H01L27/088

摘要： A method for manufacturing a semiconductor device includes forming a semiconductor strip over a substrate. The semiconductor strip includes a first semiconductor stack and a second semiconductor stack over the first semiconductor stack. A dummy gate stack is formed to cross the semiconductor strip. The dummy gate stack is replaced with a first metal gate stack and a second metal gate stack. The first metal gate stack is in contact with the first semiconductor layer of the first semiconductor stack and the second metal gate stack is in contact with the first semiconductor layer of the second semiconductor stack.

公开(公告)号：US20210202719A1

公开(公告)日：2021-07-01

申请号：US17194967

申请日：2021-03-08

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Zhi-Chang Lin ,  Wei-Hao Wu ,  Jia-Ni Yu ,  Huan-Chieh Su ,  Ting-Hung Hsu ,  Chih-Hao Wang

IPC分类号： H01L29/66 ,  H01L27/092 ,  H01L29/423 ,  H01L29/78 ,  H01L21/311 ,  H01L21/8238 ,  H01L21/768 ,  H01L21/8234

摘要： A mask layer is formed over a semiconductor device. The semiconductor device includes: a gate structure, a first layer disposed over the gate structure, and an interlayer dielectric (ILD) disposed on sidewalls of the first layer. The mask layer includes an opening that exposes a portion of the first layer and a portion of the ILD. A first etching process is performed to etch the opening partially into the first layer and partially into the ILD. A liner layer is formed in the opening after the first etching process has been performed. A second etching process is performed after the liner layer has been formed. The second etching process extends the opening downwardly through the first layer and through the gate structure. The opening is filled with a second layer after the second etching process has been performed.

公开(公告)号：US10950713B2

公开(公告)日：2021-03-16

申请号：US16544196

申请日：2019-08-19

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Zhi-Chang Lin ,  Wei-Hao Wu ,  Jia-Ni Yu ,  Huan-Chieh Su ,  Ting-Hung Hsu ,  Chih-Hao Wang

IPC分类号： H01L29/66 ,  H01L27/092 ,  H01L29/423 ,  H01L29/78 ,  H01L21/311 ,  H01L21/8238 ,  H01L21/768 ,  H01L21/8234

摘要： A mask layer is formed over a semiconductor device. The semiconductor device includes: a gate structure, a first layer disposed over the gate structure, and an interlayer dielectric (ILD) disposed on sidewalls of the first layer. The mask layer includes an opening that exposes a portion of the first layer and a portion of the ILD. A first etching process is performed to etch the opening partially into the first layer and partially into the ILD. A liner layer is formed in the opening after the first etching process has been performed. A second etching process is performed after the liner layer has been formed. The second etching process extends the opening downwardly through the first layer and through the gate structure. The opening is filled with a second layer after the second etching process has been performed.

公开(公告)号：US10374058B2

公开(公告)日：2019-08-06

申请号：US15706456

申请日：2017-09-15

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Huan-Chieh Su ,  Zhi-Chang Lin ,  Ting-Hung Hsu ,  Jia-Ni Yu ,  Wei-Hao Wu ,  Chih-Hao Wang

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L29/66 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/092

摘要： A method for manufacturing a semiconductor device is provided. The method for manufacturing a semiconductor device includes forming a gate electrode layer in a gate trench; filling a recess in the gate electrode layer with a dielectric feature; and etching back the gate electrode layer from top end surfaces of the gate electrode layer while leaving a portion of the gate electrode layer under the dielectric feature.

公开(公告)号：US20210167193A1

公开(公告)日：2021-06-03

申请号：US17174990

申请日：2021-02-12

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Huan-Chieh Su ,  Zhi-Chang Lin ,  Ting-Hung Hsu ,  Jia-Ni Yu ,  Wei-Hao Wu ,  Yu-Ming Lin ,  Chih-Hao Wang

IPC分类号： H01L29/66 ,  H01L27/092 ,  H01L29/51 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/28 ,  H01L21/308

摘要： A semiconductor device includes a first transistor and a second transistor. The first transistor includes: a first source and a first drain separated by a first distance, a first semiconductor structure disposed between the first source and first drain, a first gate electrode disposed over the first semiconductor structure, and a first dielectric structure disposed over the first gate electrode. The first dielectric structure has a lower portion and an upper portion disposed over the lower portion and wider than the lower portion. The second transistor includes: a second source and a second drain separated by a second distance greater than the first distance, a second semiconductor structure disposed between the second source and second drain, a second gate electrode disposed over the second semiconductor structure, and a second dielectric structure disposed over the second gate electrode. The second dielectric structure and the first dielectric structure have different material compositions.

公开(公告)号：US20200303258A1

公开(公告)日：2020-09-24

申请号：US16895345

申请日：2020-06-08

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Kuo-Cheng Chiang ,  Ting-Hung Hsu ,  Chao-Hsiung Wang ,  Chi-Wen Liu

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L29/165 ,  H01L21/8238 ,  H01L21/84 ,  H01L29/66 ,  H01L27/092 ,  H01L27/12 ,  H01L29/78 ,  H01L21/02 ,  H01L21/306 ,  H01L21/311 ,  H01L21/762

摘要： A method includes forming Shallow Trench Isolation (STI) regions in a semiconductor substrate and a semiconductor strip between the STI regions. The method also include replacing a top portion of the semiconductor strip with a first semiconductor layer and a second semiconductor layer over the first semiconductor layer. The first semiconductor layer has a first germanium percentage higher than a second germanium percentage of the second semiconductor layer. The method also includes recessing the STI regions to form semiconductor fins, forming a gate stack over a middle portion of the semiconductor fin, and forming gate spacers on sidewalls of the gate stack. The method further includes forming fin spacers on sidewalls of an end portion of the semiconductor fin, recessing the end portion of the semiconductor fin, and growing an epitaxial region over the end portion of the semiconductor fin.

公开(公告)号：US20200098759A1

公开(公告)日：2020-03-26

申请号：US16370258

申请日：2019-03-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Huan-Chieh Su ,  Zhi-Chang Lin ,  Ting-Hung Hsu ,  Jia-Ni Yu ,  Wei-Hao Wu ,  Yu-Ming Lin ,  Chih-Hao Wang

IPC分类号： H01L27/092 ,  H01L29/51 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/308 ,  H01L21/28

摘要： A semiconductor device includes a first transistor and a second transistor. The first transistor includes: a first source and a first drain separated by a first distance, a first semiconductor structure disposed between the first source and first drain, a first gate electrode disposed over the first semiconductor structure, and a first dielectric structure disposed over the first gate electrode. The first dielectric structure has a lower portion and an upper portion disposed over the lower portion and wider than the lower portion. The second transistor includes: a second source and a second drain separated by a second distance greater than the first distance, a second semiconductor structure disposed between the second source and second drain, a second gate electrode disposed over the second semiconductor structure, and a second dielectric structure disposed over the second gate electrode. The second dielectric structure and the first dielectric structure have different material compositions.