公开(公告)号：US20170243957A1

公开(公告)日：2017-08-24

申请号：US15590301

申请日：2017-05-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hung LO ,  Tzu-Hsiang HSU ,  Chia-Jung HSU ,  Feng-Cheng YANG ,  Teng-Chun TSAI ,  Ying-Ho CHEN

IPC: H01L29/66 ,  H01L21/8238 ,  H01L21/762

CPC classification number: H01L29/66795 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823878 ,  H01L21/845 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/1054 ,  H01L29/785

Abstract: A semiconductor device includes a fin structure for a fin field effect transistor (FET). The fin structure includes a base layer protruding from a substrate, an intermediate layer disposed over the base layer and an upper layer disposed over the intermediate layer. The fin structure further includes a first protective layer and a second protective layer made of a different material than the first protective layer. The intermediate layer includes a first semiconductor layer disposed over the base layer, the first protective layer covers at least side walls of the first semiconductor layer and the second protective layer covers at least side walls of the first protective layer.

公开(公告)号：US20160181414A1

公开(公告)日：2016-06-23

申请号：US14579708

申请日：2014-12-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Gin-Chen HUANG ,  Tzu-Hsiang HSU ,  Chia-Jung HSU ,  Feng-Cheng YANG ,  Teng-Chun TSAI

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/66 ,  H01L29/12

CPC classification number: H01L29/66795 ,  H01L21/762 ,  H01L29/12 ,  H01L29/165 ,  H01L29/511 ,  H01L29/6681 ,  H01L29/785

Abstract: A semiconductor device includes a first fin structure for a first fin field effect transistor (FET). The first fin structure includes a first base layer protruding from a substrate, a first intermediate layer disposed over the first base layer and a first channel layer disposed over the first intermediate layer. The first fin structure further includes a first protective layer made of a material that prevents an underlying layer from oxidation. The first channel layer is made of SiGe, the first intermediate layer includes a first semiconductor (e.g., SiGe) layer disposed over the first base layer and a second semiconductor layer (e.g., Si) disposed over the first semiconductor layer. The first protective layer covers side walls of the first base layer, side walls of the first semiconductor layer and side walls of the second semiconductor layer.

Abstract translation: 半导体器件包括用于第一鳍式场效应晶体管（FET）的第一鳍结构。 第一鳍结构包括从基板突出的第一基底层，设置在第一基底层上的第一中间层和设置在第一中间层上的第一沟道层。 第一翅片结构还包括由防止下层氧化的材料制成的第一保护层。 第一沟道层由SiGe制成，第一中间层包括设置在第一基极层上的第一半导体（例如，SiGe）层和设置在第一半导体层上的第二半导体层（例如Si）。 第一保护层覆盖第一基底层的侧壁，第一半导体层的侧壁和第二半导体层的侧壁。

公开(公告)号：US20170365707A1

公开(公告)日：2017-12-21

申请号：US15693171

申请日：2017-08-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Gin-Chen HUANG ,  Tzu-Hsiang HSU ,  Chia-Jung HSU ,  Feng-Cheng YANG ,  Teng-Chun TSAI

IPC: H01L29/78 ,  H01L29/12 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/66795 ,  H01L21/762 ,  H01L29/12 ,  H01L29/165 ,  H01L29/511 ,  H01L29/6681 ,  H01L29/785

Abstract: A semiconductor device includes a first fin structure for a first fin field effect transistor (PET). The first fin structure includes a first base layer protruding from a substrate, a first intermediate layer disposed over the first base layer and a first channel layer disposed over the first intermediate layer. The first fin structure further includes a first protective layer made of a material that prevents an underlying layer from oxidation. The first channel layer is made of SiGe, the first intermediate layer includes a first semiconductor (e.g., SiGe) layer disposed over the first base layer and a second semiconductor layer (e.g., Si) disposed over the first semiconductor layer. The first protective layer covers side walls of the first base layer, side walls of the first semiconductor layer and side walls of the second semiconductor layer.

公开(公告)号：US20170077300A1

公开(公告)日：2017-03-16

申请号：US14852441

申请日：2015-09-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Heng-Wen TING ,  Tzu-Hsiang HSU ,  Chih-Yun CHIN

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate, at least one first isolation structure, at least two second isolation structures, and a plurality of epitaxy structures. The substrate has a plurality of semiconductor fins therein. The first isolation structure is disposed between the semiconductor fins. The semiconductor fins are disposed between the second isolation structures, and the second isolation structures extend into the substrate further than the first isolation structure. The epitaxy structures are respectively disposed on the semiconductor fins. The epitaxy structures are separated from each other, and at least one of the epitaxy structures has a substantially round profile.

Abstract translation: 半导体器件包括衬底，至少一个第一隔离结构，至少两个第二隔离结构和多个外延结构。 基板在其中具有多个半导体翅片。 第一隔离结构设置在半导体翅片之间。 半导体鳍片设置在第二隔离结构之间，并且第二隔离结构比第一隔离结构延伸到衬底中。 外延结构分别设置在半导体翅片上。 外延结构彼此分离，并且至少一个外延结构具有基本圆形的轮廓。

公开(公告)号：US20160322477A1

公开(公告)日：2016-11-03

申请号：US15208393

申请日：2016-07-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Gin-Chen HUANG ,  Tzu-Hsiang HSU ,  Chia-Jung HSU ,  Feng-Cheng YANG ,  Teng-Chun TSAI

IPC: H01L29/66 ,  H01L21/762

CPC classification number: H01L29/66795 ,  H01L21/762 ,  H01L29/12 ,  H01L29/165 ,  H01L29/511 ,  H01L29/6681 ,  H01L29/785

Abstract: A semiconductor device includes a first fin structure for a first fin field effect transistor (FET). The first fin structure includes a first base layer protruding from a substrate, a first intermediate layer disposed over the first base layer and a first channel layer disposed over the first intermediate layer. The first fin structure further includes a first protective layer made of a material that prevents an underlying layer from oxidation. The first channel layer is made of SiGe, the first intermediate layer includes a first semiconductor (e.g., SiGe) layer disposed over the first base layer and a second semiconductor layer (e.g., Si) disposed over the first semiconductor layer. The first protective layer covers side walls of the first base layer, side walls of the first semiconductor layer and side walls of the second semiconductor layer.

Abstract translation: 半导体器件包括用于第一鳍式场效应晶体管（FET）的第一鳍结构。 第一鳍结构包括从基板突出的第一基底层，设置在第一基底层上的第一中间层和设置在第一中间层上的第一沟道层。 第一翅片结构还包括由防止下层氧化的材料制成的第一保护层。 第一沟道层由SiGe制成，第一中间层包括设置在第一基极层上的第一半导体（例如，SiGe）层和设置在第一半导体层上的第二半导体层（例如Si）。 第一保护层覆盖第一基底层的侧壁，第一半导体层的侧壁和第二半导体层的侧壁。