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    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME 有权

    公开(公告)号：US20210351143A1

    公开(公告)日：2021-11-11

    申请号：US17383215

    申请日：2021-07-22

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    发明人： Wen-Hao CHENG ,  Yen-Yu CHEN ,  Chih-Wei LIN ,  Yi-Ming DAI

    IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/768 ,  H01L23/522

    摘要： A device includes an interconnect structure, a barrier multi-layer structure, an oxide layer, a pad metal layer, and a passivation layer. The barrier multi-layer structure is over the interconnect structure, the barrier multi-layer structure includes a first metal nitride layer and a second metal nitride layer over the first metal nitride layer. The oxide layer is over the barrier multi-layer structure, in which the oxide layer is an oxide of the second metal nitride layer of the barrier multi-layer structure. The pad metal layer is over the oxide layer. The passivation layer is in contact with the barrier multi-layer structure, the oxide layer, and the pad metal layer.

    METHOD AND SYSTEM FOR DETECTING HOTSPOTS IN SEMICONDUCTOR WAFER
    2.
    发明申请
    METHOD AND SYSTEM FOR DETECTING HOTSPOTS IN SEMICONDUCTOR WAFER 审中-公开

    公开(公告)号：US20180165803A1

    公开(公告)日：2018-06-14

    申请号：US15378482

    申请日：2016-12-14

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Wen-Hao CHENG ,  Peng-Ren CHEN ,  Chih-Chiang TU

    IPC分类号： G06T7/00

    CPC分类号： G06T7/0004 ,  G06T2207/30148

    摘要： Methods and system for detecting hotspots in semiconductor wafer are provided. At least one semiconductor wafer is inspected to detect a plurality of hotspots of each die in the semiconductor wafer, wherein each of the hotspots has defect coordinates in a layout of the die. The hotspots of the dies are stacked in the layout according to the defect coordinates of the hotspots. A common pattern is obtained according to the stacked hotspots corresponding to a location with specific coordinates in the layout. It is determined whether the common pattern is a known pattern having an individual identification (ID) code. A new ID code is assigned to the common pattern when the common pattern is an unknown pattern.

    LITHOGRAPHY SYSTEM AND METHODS
    6.
    发明申请
    LITHOGRAPHY SYSTEM AND METHODS 有权

    公开(公告)号：US20220075273A1

    公开(公告)日：2022-03-10

    申请号：US17209590

    申请日：2021-03-23

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Eng Hock LEE ,  Wen-Hao CHENG

    IPC分类号： G03F7/20

    摘要： A lithography exposure system includes a light source, a substrate stage, and a mask stage between the light source and the substrate stage along an optical path from the light source to the substrate stage. The lithography exposure system further comprises a reflector along the optical path. The reflector comprises: a first layer having a first material and a first thickness; a second layer having the first material and a second thickness different from the first thickness; and a third layer between the first layer and the second layer, and having a second material different from the first material.

    DEPOSITION SYSTEM AND METHOD
    7.
    发明申请
    DEPOSITION SYSTEM AND METHOD 有权

    公开(公告)号：US20220406583A1

    公开(公告)日：2022-12-22

    申请号：US17352133

    申请日：2021-06-18

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Wen-Hao CHENG ,  Hsuan-Chih CHU ,  Yen-Yu CHEN

    IPC分类号： H01J37/34 ,  C23C14/54 ,  C23C14/34

    摘要： A deposition system is provided capable of controlling an amount of a target material deposited on a substrate and/or direction of the target material that is deposited on the substrate. The deposition system in accordance with the present disclosure includes a substrate process chamber. The deposition includes a substrate pedestal in the substrate process chamber, the substrate pedestal configured to support a substrate, a target enclosing the substrate process chamber, and a collimator having a plurality of hollow structures disposed between the target and the substrate, wherein a length of at least one of the plurality of hollow structures is adjustable.

    METHOD AND SYSTEM OF MASK DATA PREPARATION FOR CURVILINEAR MASK PATTERNS FOR A DEVICE
    9.
    发明申请
    METHOD AND SYSTEM OF MASK DATA PREPARATION FOR CURVILINEAR MASK PATTERNS FOR A DEVICE 有权
    用于设备的CURVILINEAR掩模图案的掩模数据准备的方法和系统

    公开(公告)号：US20140189614A1

    公开(公告)日：2014-07-03

    申请号：US13732469

    申请日：2013-01-02

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    发明人： Ru-Gun LIU ,  Wen-Hao CHENG ,  Chih-Chiang TU ,  Shuo-Yen CHOU

    IPC分类号： G06F17/50

    CPC分类号： G03F1/70 ,  G03F1/36

    摘要： A method comprises: (a) transforming a layout of a layer of an integrated circuit (IC) or micro electro-mechanical system (MEMS) to a curvilinear mask layout; (b) replacing at least one pattern of the curvilinear mask layout with a previously stored fracturing template having approximately the same shape as the pattern, to form a fractured IC or MEMS layout; and (c) storing, in a non-transitory storage medium, an e-beam generation file including a representation of the fractured IC or MEMS layout, to be used for fabricating a photomask.

    摘要翻译： 一种方法包括：（a）将集成电路（IC）或微机电系统（MEMS）的层的布局变换为曲线掩模布局; （b）用具有与图案大致相同形状的先前存储的压裂模板代替曲线掩模布局的至少一个图案，以形成断裂的IC或MEMS布局; 以及（c）在非暂时性存储介质中存储用于制造光掩模的电子束生成文件，其包括断裂的IC或MEMS布局的表示。