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    Method for forming semiconductor device structure
    2.
    发明授权
    Method for forming semiconductor device structure 有权
    半导体器件结构形成方法

    公开(公告)号：US09583356B1

    公开(公告)日：2017-02-28

    申请号：US14871256

    申请日：2015-09-30

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

    Inventor： Keng-Ying Liao ,  Chung-Bin Tseng ,  Po-Zen Chen ,  Yi-Hung Chen ,  Yi-Jie Chen

    IPC: H01L21/311 ,  H01L21/3065 ,  H01L21/308

    CPC classification number: H01L21/3065 ,  H01L21/0276 ,  H01L21/0337 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/31127 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/32137 ,  H01L21/32139 ,  H01L29/66568 ,  H01L29/66575 ,  H01L29/78

    Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device structure includes forming a film over a substrate. The semiconductor device structure includes forming a first mask layer over the film. The semiconductor device structure includes forming a second mask layer over the first mask layer. The second mask layer exposes a first portion of the first mask layer. The semiconductor device structure includes performing a plasma etching and deposition process to remove the first portion of the first mask layer and to form a protection layer over a first sidewall of the second mask layer. The first mask layer exposes a second portion of the film after the plasma etching and deposition process. The semiconductor device structure includes removing the second portion using the first mask layer and the second mask layer as an etching mask.

    Abstract translation: 提供一种形成半导体器件结构的方法。 半导体器件结构包括在衬底上形成膜。 半导体器件结构包括在膜上形成第一掩模层。 半导体器件结构包括在第一掩模层上形成第二掩模层。 第二掩模层露出第一掩模层的第一部分。 半导体器件结构包括执行等离子体蚀刻和沉积工艺以去除第一掩模层的第一部分并在第二掩模层的第一侧壁上形成保护层。 在等离子体蚀刻和沉积工艺之后，第一掩模层暴露出膜的第二部分。 半导体器件结构包括使用第一掩模层和第二掩模层作为蚀刻掩模去除第二部分。

    Method for manufacturing CMOS image sensor
    3.
    发明授权
    Method for manufacturing CMOS image sensor 有权

    公开(公告)号：US10522585B2

    公开(公告)日：2019-12-31

    申请号：US15488658

    申请日：2017-04-17

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Yi-Fang Yang ,  Yi-Hung Chen ,  Keng-Ying Liao ,  Yi-Jie Chen ,  Shih-Hsun Hsu ,  Chun-Chi Lee

    IPC: H01L27/146

    Abstract: A semiconductor device includes a substrate, a conductive layer, a transparent layer, a transparent hard mask layer, a carrier, and a device layer. The substrate has a first surface and a second surface opposite to each other. The conductive layer is disposed on the first surface of the substrate. The transparent layer is disposed on the conductive layer. The transparent hard mask layer is disposed on the transparent layer, in which the substrate has an etch selectivity with respect to the transparent hard mask layer. The device layer is disposed between the carrier and the second surface of the substrate, in which various portions of the device layer are respectively exposed by various through holes which pass through the transparent hard mask layer, the transparent layer, the conductive layer, and the substrate.

    Semiconductor device having protection layer wrapping around conductive structure
    5.
    发明授权
    Semiconductor device having protection layer wrapping around conductive structure 有权

    公开(公告)号：US10141362B2

    公开(公告)日：2018-11-27

    申请号：US15917976

    申请日：2018-03-12

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Chih-Wei Sung ,  Yi-Hung Chen ,  Keng-Ying Liao ,  Yi-Fang Yang ,  Chih-Yu Wu

    IPC: H01L27/146

    Abstract: A semiconductor device having a protection layer wrapping around a conductive structure is provided. The semiconductor device comprises an image sensor device layer, an interconnect layer over the image sensor device layer, a first bonding layer over the interconnect layer, a second bonding layer bonded with the first bonding layer, a substrate over the second bonding layer, and a conductive via passing through the substrate, the second bonding layer, and the first bonding layer. The conductive via comprises a protection layer and a conductive material. The protection layer is peripherally enclosed by the substrate, the second bonding layer, and the first bonding layer. The protection layer covers a sidewall cut formed at an interface of the second bonding layer and the first bonding layer. The conductive material is peripherally enclosed by the protection layer.

    METHOD FOR MANUFACTURING CMOS IMAGE SENSOR
    6.
    发明申请
    METHOD FOR MANUFACTURING CMOS IMAGE SENSOR 审中-公开

    公开(公告)号：US20180301501A1

    公开(公告)日：2018-10-18

    申请号：US15488658

    申请日：2017-04-17

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Yi-Fang Yang ,  Yi-Hung Chen ,  Keng-Ying Liao ,  Yi-Jie Chen ,  Shih-Hsun Hsu ,  Chun-Chi Lee

    IPC: H01L27/146

    CPC classification number: H01L27/14685 ,  H01L27/1462 ,  H01L27/1464 ,  H01L27/14649

    Abstract: A semiconductor device includes a substrate, a conductive layer, a transparent layer, a transparent hard mask layer, a carrier, and a device layer. The substrate has a first surface and a second surface opposite to each other. The conductive layer is disposed on the first surface of the substrate. The transparent layer is disposed on the conductive layer. The transparent hard mask layer is disposed on the transparent layer, in which the substrate has an etch selectivity with respect to the transparent hard mask layer. The device layer is disposed between the carrier and the second surface of the substrate, in which various portions of the device layer are respectively exposed by various through holes which pass through the transparent hard mask layer, the transparent layer, the conductive layer, and the substrate.

    CMOS SENSORS AND METHODS OF FORMING THE SAME
    8.
    发明申请
    CMOS SENSORS AND METHODS OF FORMING THE SAME 审中-公开

    公开(公告)号：US20190259800A1

    公开(公告)日：2019-08-22

    申请号：US16403638

    申请日：2019-05-06

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yu-Chien Ku ,  Huai-Jen Tung ,  Keng-Ying Liao ,  Yi-Hung Chen ,  Shih-Hsun Hsu ,  Yi-Fang Yang

    IPC: H01L27/146 ,  H01L23/00

    Abstract: CMOS sensors and methods of forming the same are disclosed. The CMOS sensor includes a semiconductor substrate, a plurality of dielectric patterns, a first conductive element and a second conductive element. The semiconductor substrate has a pixel region and a circuit region. The dielectric patterns are disposed between the first portion and the second portion, wherein top surfaces of the plurality of dielectric patterns are lower than top surfaces of the first and second portions. The first conductive element is disposed below the plurality of dielectric patterns. The second conductive element inserts between the plurality of dielectric patterns to electrically connect the first conductive element.

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