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    Method for forming semiconductor device structure
    5.
    发明授权
    Method for forming semiconductor device structure 有权
    半导体器件结构形成方法

    公开(公告)号：US09583356B1

    公开(公告)日：2017-02-28

    申请号：US14871256

    申请日：2015-09-30

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd

    发明人： Keng-Ying Liao ,  Chung-Bin Tseng ,  Po-Zen Chen ,  Yi-Hung Chen ,  Yi-Jie Chen

    IPC分类号： H01L21/311 ,  H01L21/3065 ,  H01L21/308

    CPC分类号： H01L21/3065 ,  H01L21/0276 ,  H01L21/0337 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/31127 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/32137 ,  H01L21/32139 ,  H01L29/66568 ,  H01L29/66575 ,  H01L29/78

    摘要： A method for forming a semiconductor device structure is provided. The semiconductor device structure includes forming a film over a substrate. The semiconductor device structure includes forming a first mask layer over the film. The semiconductor device structure includes forming a second mask layer over the first mask layer. The second mask layer exposes a first portion of the first mask layer. The semiconductor device structure includes performing a plasma etching and deposition process to remove the first portion of the first mask layer and to form a protection layer over a first sidewall of the second mask layer. The first mask layer exposes a second portion of the film after the plasma etching and deposition process. The semiconductor device structure includes removing the second portion using the first mask layer and the second mask layer as an etching mask.

    摘要翻译： 提供一种形成半导体器件结构的方法。 半导体器件结构包括在衬底上形成膜。 半导体器件结构包括在膜上形成第一掩模层。 半导体器件结构包括在第一掩模层上形成第二掩模层。 第二掩模层露出第一掩模层的第一部分。 半导体器件结构包括执行等离子体蚀刻和沉积工艺以去除第一掩模层的第一部分并在第二掩模层的第一侧壁上形成保护层。 在等离子体蚀刻和沉积工艺之后，第一掩模层暴露出膜的第二部分。 半导体器件结构包括使用第一掩模层和第二掩模层作为蚀刻掩模去除第二部分。

    Method for manufacturing CMOS image sensor
    6.
    发明授权
    Method for manufacturing CMOS image sensor 有权

    公开(公告)号：US10522585B2

    公开(公告)日：2019-12-31

    申请号：US15488658

    申请日：2017-04-17

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    发明人： Yi-Fang Yang ,  Yi-Hung Chen ,  Keng-Ying Liao ,  Yi-Jie Chen ,  Shih-Hsun Hsu ,  Chun-Chi Lee

    IPC分类号： H01L27/146

    摘要： A semiconductor device includes a substrate, a conductive layer, a transparent layer, a transparent hard mask layer, a carrier, and a device layer. The substrate has a first surface and a second surface opposite to each other. The conductive layer is disposed on the first surface of the substrate. The transparent layer is disposed on the conductive layer. The transparent hard mask layer is disposed on the transparent layer, in which the substrate has an etch selectivity with respect to the transparent hard mask layer. The device layer is disposed between the carrier and the second surface of the substrate, in which various portions of the device layer are respectively exposed by various through holes which pass through the transparent hard mask layer, the transparent layer, the conductive layer, and the substrate.

    METHOD FOR MANUFACTURING CMOS IMAGE SENSOR
    8.
    发明申请
    METHOD FOR MANUFACTURING CMOS IMAGE SENSOR 审中-公开

    公开(公告)号：US20180301501A1

    公开(公告)日：2018-10-18

    申请号：US15488658

    申请日：2017-04-17

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    发明人： Yi-Fang Yang ,  Yi-Hung Chen ,  Keng-Ying Liao ,  Yi-Jie Chen ,  Shih-Hsun Hsu ,  Chun-Chi Lee

    IPC分类号： H01L27/146

    CPC分类号： H01L27/14685 ,  H01L27/1462 ,  H01L27/1464 ,  H01L27/14649

    摘要： A semiconductor device includes a substrate, a conductive layer, a transparent layer, a transparent hard mask layer, a carrier, and a device layer. The substrate has a first surface and a second surface opposite to each other. The conductive layer is disposed on the first surface of the substrate. The transparent layer is disposed on the conductive layer. The transparent hard mask layer is disposed on the transparent layer, in which the substrate has an etch selectivity with respect to the transparent hard mask layer. The device layer is disposed between the carrier and the second surface of the substrate, in which various portions of the device layer are respectively exposed by various through holes which pass through the transparent hard mask layer, the transparent layer, the conductive layer, and the substrate.

    3D image profiling techniques for lithography
    9.
    发明授权
    3D image profiling techniques for lithography 有权
    用于光刻的3D图像分析技术

    公开(公告)号：US08952329B1

    公开(公告)日：2015-02-10

    申请号：US14045138

    申请日：2013-10-03

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： I-Chang Shih ,  Yi-Jie Chen ,  Chia-Cheng Chang ,  Feng-Yuan Chiu ,  Ying-Chou Cheng ,  Chiu Hsiu Chen ,  Bing-Syun Yeh ,  Ru-Gun Liu

    IPC分类号： G01N23/00 ,  G21K7/00 ,  G01B15/04

    CPC分类号： H01L22/12 ,  G01B2210/56 ,  G03F7/70433 ,  G03F7/705

    摘要： A method for characterizing a three-dimensional surface profile of a semiconductor workpiece is provided. In this method, the three-dimensional surface profile is imaged from a normal angle to measure widths of various surfaces in a first image. The three-dimensional surface is also imaged from a first oblique angle to re-measure the widths of the various surfaces in a second image. Based on differences in widths of corresponding surfaces for first and second images, a feature height and sidewall angle are determined for the three-dimensional profile.

    摘要翻译： 提供了一种用于表征半导体工件的三维表面轮廓的方法。 在该方法中，从正常角度对三维表面轮廓进行成像，以测量第一图像中的各种表面的宽度。 三维表面也从第一倾斜角度成像，以重新测量第二图像中各种表面的宽度。 基于第一和第二图像的相应表面的宽度差异，确定三维轮廓的特征高度和侧壁角度。