公开(公告)号：US20220367200A1

公开(公告)日：2022-11-17

申请号：US17844563

申请日：2022-06-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Lun Chang ,  Pin-Chuan Su ,  Hsin-Chieh Huang ,  Ming-Yuan Wu ,  Tzu kai Lin ,  Yu-Wen Wang ,  Che-Yuan Hsu

IPC: H01L21/306 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3065 ,  H01L21/02

Abstract: A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.

公开(公告)号：US11424347B2

公开(公告)日：2022-08-23

申请号：US16899119

申请日：2020-06-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ssu-Yu Liao ,  Tsu-Hui Su ,  Chun-Hsiang Fan ,  Yu-Wen Wang ,  Ming-Hsi Yeh ,  Kuo-Bin Huang

IPC: H01L29/66 ,  H01L29/165 ,  H01L29/78 ,  H01L29/161 ,  H01L21/02 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/786

Abstract: Methods for improving profiles of channel regions in semiconductor devices and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a semiconductor fin over a semiconductor substrate, the semiconductor fin including germanium, a germanium concentration of a first portion of the semiconductor fin being greater than a germanium concentration of a second portion of the semiconductor fin, a first distance between the first portion and a major surface of the semiconductor substrate being less than a second distance between the second portion and the major surface of the semiconductor substrate; and trimming the semiconductor fin, the first portion of the semiconductor fin being trimmed at a greater rate than the second portion of the semiconductor fin.

公开(公告)号：US20210035809A1

公开(公告)日：2021-02-04

申请号：US17075875

申请日：2020-10-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wen Wang ,  Kuo-Chyuan Tzeng

IPC: H01L21/308 ,  H01L21/768 ,  H01L21/311

Abstract: A method for fabrication of a semiconductor structure according to some embodiments of the present disclosure comprises following steps. A first mandrel is formed over a target layer over a substrate, wherein the first mandrel comprises a mandrel island connecting a first mandrel strip and a second mandrel strip. A first spacer is formed along first and second sidewalls of the mandrel island, the first mandrel strip, and the second mandrel strip. The first mandrel is then removed, and the target layer is patterned with the first spacer remains over the target layer. The first mandrel strip and the second mandrel strip are misaligned from one another.

公开(公告)号：US20250056823A1

公开(公告)日：2025-02-13

申请号：US18931886

申请日：2024-10-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsu-Hui Su ,  Chun-Hsiang Fan ,  Yu-Wen Wang ,  Ming-Hsi Yeh ,  Kuo-Bin Huang

IPC: H01L29/66 ,  H01L21/306 ,  H01L21/66 ,  H01L21/762 ,  H01L21/8238

Abstract: A method includes forming isolation regions extending into a semiconductor substrate. A semiconductor strip is between the isolation regions. The method further includes recessing the isolation regions so that a top portion of the semiconductor strip protrudes higher than top surfaces of the isolation regions to form a semiconductor fin, measuring a fin width of the semiconductor fin, generating an etch recipe based on the fin width, and performing a thinning process on the semiconductor fin using the etching recipe.

公开(公告)号：US20230387263A1

公开(公告)日：2023-11-30

申请号：US18361540

申请日：2023-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsu-Hui Su ,  Chun-Hsiang Fan ,  Yu-Wen Wang ,  Ming-Hsi Yeh ,  Kuo-Bin Huang

IPC: H01L29/66 ,  H01L21/306 ,  H01L21/8238 ,  H01L21/762 ,  H01L21/66

CPC classification number: H01L29/66795 ,  H01L29/66545 ,  H01L21/30604 ,  H01L21/823878 ,  H01L21/76224 ,  H01L21/823821 ,  H01L22/12

Abstract: A method includes forming isolation regions extending into a semiconductor substrate. A semiconductor strip is between the isolation regions. The method further includes recessing the isolation regions so that a top portion of the semiconductor strip protrudes higher than top surfaces of the isolation regions to form a semiconductor fin, measuring a fin width of the semiconductor fin, generating an etch recipe based on the fin width, and performing a thinning process on the semiconductor fin using the etching recipe.

公开(公告)号：US11676822B2

公开(公告)日：2023-06-13

申请号：US17075875

申请日：2020-10-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wen Wang ,  Kuo-Chyuan Tzeng

IPC: H01L23/528 ,  H01L21/3213 ,  H01L21/308 ,  H01L21/768 ,  H01L21/311

CPC classification number: H01L21/3086 ,  H01L21/3081 ,  H01L21/3088 ,  H01L21/31144 ,  H01L21/76816

Abstract: A method for fabrication of a semiconductor structure according to some embodiments of the present disclosure comprises following steps. A first mandrel is formed over a target layer over a substrate, wherein the first mandrel comprises a mandrel island connecting a first mandrel strip and a second mandrel strip. A first spacer is formed along first and second sidewalls of the mandrel island, the first mandrel strip, and the second mandrel strip. The first mandrel is then removed, and the target layer is patterned with the first spacer remains over the target layer. The first mandrel strip and the second mandrel strip are misaligned from one another.

公开(公告)号：US20220359734A1

公开(公告)日：2022-11-10

申请号：US17814185

申请日：2022-07-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ssu-Yu Liao ,  Tsu-Hui Su ,  Chun-Hsiang Fan ,  Yu-Wen Wang ,  Ming-Hsi Yeh ,  Kuo-Bin Huang

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/161 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

Abstract: Methods for improving profiles of channel regions in semiconductor devices and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a semiconductor fin over a semiconductor substrate, the semiconductor fin including germanium, a germanium concentration of a first portion of the semiconductor fin being greater than a germanium concentration of a second portion of the semiconductor fin, a first distance between the first portion and a major surface of the semiconductor substrate being less than a second distance between the second portion and the major surface of the semiconductor substrate; and trimming the semiconductor fin, the first portion of the semiconductor fin being trimmed at a greater rate than the second portion of the semiconductor fin.

公开(公告)号：US20240371649A1

公开(公告)日：2024-11-07

申请号：US18775109

申请日：2024-07-17

Applicant: Taiwan Semiconductor Manufacturing Co, Ltd.

Inventor： Che-Lun Chang ,  Pin-Chuan Su ,  Hsin-Chieh Huang ,  Ming-Yuan Wu ,  Tzu kai Lin ,  Yu-Wen Wang ,  Che-Yuan Hsu

IPC: H01L21/306 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/311 ,  H01L29/66

Abstract: A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.

公开(公告)号：US11923437B2

公开(公告)日：2024-03-05

申请号：US17452178

申请日：2021-10-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsu-Hui Su ,  Chun-Hsiang Fan ,  Yu-Wen Wang ,  Ming-Hsi Yeh ,  Kuo-Bin Huang

IPC: H01L29/66 ,  H01L21/306 ,  H01L21/66 ,  H01L21/762 ,  H01L21/8238

CPC classification number: H01L29/66795 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/823821 ,  H01L21/823878 ,  H01L22/12 ,  H01L29/66545

Abstract: A method includes forming isolation regions extending into a semiconductor substrate. A semiconductor strip is between the isolation regions. The method further includes recessing the isolation regions so that a top portion of the semiconductor strip protrudes higher than top surfaces of the isolation regions to form a semiconductor fin, measuring a fin width of the semiconductor fin, generating an etch recipe based on the fin width, and performing a thinning process on the semiconductor fin using the etching recipe.

公开(公告)号：US11616133B2

公开(公告)日：2023-03-28

申请号：US17728633

申请日：2022-04-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Lun Chang ,  Shiao-Shin Cheng ,  Ji-Yin Tsai ,  Yu-Lin Tsai ,  Hsin-Chieh Huang ,  Ming-Yuan Wu ,  Jiun-Ming Kuo ,  Ming-Jie Huang ,  Yu-Wen Wang ,  Che-Yuan Hsu

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  H01L29/165 ,  H01L29/08

Abstract: A method includes forming a doped region on a top portion of a substrate, forming a first epitaxial layer over the substrate, forming a recess in the first epitaxial layer, the recess being aligned to the doped region, performing a surface clean treatment in the recess, the surface clean treatment includes: oxidizing surfaces of the recess to form an oxide layer in the recess, and removing the oxide layer from the surfaces of the recess, and forming a second epitaxial layer in the recess.