公开(公告)号：US08587793B2

公开(公告)日：2013-11-19

申请号：US12912278

申请日：2010-10-26

申请人： Takao Naito ,  Kazuo Yamada

发明人： Takao Naito ,  Kazuo Yamada

IPC分类号： G06F3/12 ,  G06K9/54

CPC分类号： G06F3/1215 ,  G06F3/124 ,  G06F3/1247 ,  G06F3/1279 ,  G06F3/1282 ,  G06K15/1823 ,  G06K15/1849 ,  G06K15/1851 ,  G06K15/1857

摘要： A print image processing apparatus, includes N image processing circuits; a selection unit that estimates, every N pages, a necessary time corresponding to each of (i) a page-based parallel method for allocating image processing of the N pages to the image processing circuits in units of pages to perform the image processing of the N pages in parallel, and (ii) a paginal-object-based parallel method for allocating image processing of each single page to the image processing circuits in units of objects to perform the image processing of the objects of each single page in parallel, and selects one of the page-based parallel method and the paginal-object-based parallel method such that the estimated necessary time corresponding to the selected one of the parallel methods is shorter than the estimated necessary time; and an allocation unit that allocates image processing of the N pages to the N image processing circuit, respectively.

摘要翻译： 一种打印图像处理装置，包括N个图像处理电路; 每个N页面估计每个N页面所需的时间的必要时间，所述必要时间对应于（i）用于以页为单位将N页的图像处理分配给图像处理电路的基于页的并行方法，以执行图像处理 N页并行，以及（ii）基于对象的并行方法，用于以对象为单位将每个单页的图像处理分配给图像处理电路，以并行地执行每个单页的对象的图像处理;以及 选择基于页面的并行方法和基于对象的并行方法之一，使得与所选择的并行方法中的一个并行方法相对应的估计必要时间短于估计的必要时间; 以及分配单元，其将N个页面的图像处理分别分配给N个图像处理电路。

公开(公告)号：US08554003B2

公开(公告)日：2013-10-08

申请号：US13295405

申请日：2011-11-14

申请人： Takao Naito ,  Kazuo Yamada

发明人： Takao Naito ,  Kazuo Yamada

IPC分类号： G06K9/36 ,  G06K9/46

CPC分类号： G06T1/20

摘要： An image data processing apparatus includes the following elements. A lossless compression device performs lossless compression. A configuration controller performs control so that a first configuration including a first line memory set and a decompression circuit set and a second configuration including a second line memory set are selectively set in a reconfigurable circuit. A maximum size determining device determines the maximum size of lines of the compressed image data. An output controller performs control so that, when the maximum size is equal to or smaller than a predetermined threshold, the first configuration is set and the compressed image data is output to an image processing circuit via the first line memory set, and so that, when the maximum size is greater than the predetermined threshold, the second configuration is set and the non-compressed image data is output to the image processing circuit via the second line memory set.

摘要翻译： 图像数据处理装置包括以下要素。 无损压缩装置执行无损压缩。 配置控制器执行控制，使得在可重新配置的电路中选择性地设置包括第一行存储器组和解压缩电路组的第一配置以及包括第二行存储器组的第二配置。 最大尺寸确定装置确定压缩图像数据的行的最大尺寸。 输出控制器执行控制，使得当最大尺寸等于或小于预定阈值时，设置第一配置，并且经由第一行存储器将经压缩的图像数据输出到图像处理电路， 当最大尺寸大于预定阈值时，设置第二配置，并且经由第二行存储器组将非压缩图像数据输出到图像处理电路。

公开(公告)号：US08299816B2

公开(公告)日：2012-10-30

申请号：US12891352

申请日：2010-09-27

申请人： Kazuo Yamada ,  Takao Naito

发明人： Kazuo Yamada ,  Takao Naito

IPC分类号： H03K19/173 ,  G06F15/00

CPC分类号： G06F15/7878 ,  H03K19/17752

摘要： A data processing apparatus includes a reconfigurable circuit capable of reconfigurating partially a circuit configuration: and a reconfiguration controlling unit that controls a reconfiguration of the circuit configuration of the reconfigurable circuit. The reconfiguration controlling unit reconfigurates a plurality of partial circuits, which constitute one pipeline and are reconfigurated simultaneously on the reconfigurable circuit, on the reconfigurable circuit in sequence from a head partial circuit of the pipeline, and starts sequentially the reconfigurated partial circuits from a head.

摘要翻译： 数据处理装置包括能够部分地重新配置电路配置的可重新配置电路;以及重新配置控制单元，其控制可重新配置电路的电路配置的重新配置。 重新配置控制单元重新配置构成一个流水线的多个部分电路，并且在可重构电路上同时重新配置在可重新配置的电路上，从流水线的头部分电路依次重新配置，并从头开始依次重新配置部分电路。

公开(公告)号：US08719550B2

公开(公告)日：2014-05-06

申请号：US12869200

申请日：2010-08-26

申请人： Takao Naito ,  Kazuo Yamada

发明人： Takao Naito ,  Kazuo Yamada

IPC分类号： G06F15/00 ,  G06F15/76

CPC分类号： G06F15/7867 ,  G06F17/5054

摘要： Source code to be processed is analyzed and configuration data in implementing in accordance with each of plural implementation systems is created and is stored in a local memory of a DRP incorporating system. When execution of target processing is started, the implementation system determination processing calculates estimated processing time when the configuration of each of the implementation systems is adopted and determines the optimum one of the implementation systems based on a combination of the estimated processing time and the circuit scale of the configuration.

摘要翻译： 分析要处理的源代码，并且根据多个实现系统中的每一个实现的配置数据被创建并存储在DRP并入系统的本地存储器中。 当执行目标处理开始时，执行系统确定处理计算当采用每个实现系统的配置时的估计处理时间，并且基于估计的处理时间和电路规模的组合来确定实现系统中的最佳一个 的配置。

公开(公告)号：US08656140B2

公开(公告)日：2014-02-18

申请号：US12963072

申请日：2010-12-08

申请人： Kazuo Yamada ,  Takao Naito

发明人： Kazuo Yamada ,  Takao Naito

IPC分类号： G06F13/00

CPC分类号： G06F13/1663

摘要： An internal buffer is provided for a DRP core. A selector SEL switches input/output destination of the DRP core between external memory and an internal buffer. Control software executed by a CPU core receives information a pipeline of configurations for a sequence of target processing and generates combinations as to whether the processing result is transferred between the configurations via the external memory or via the internal buffer as transfer manners. Next, for each manner, bandwidth and performance of the external memory used by the DRP core in the manner are calculated. The manner of the best performance satisfying a previously specified bandwidth restriction is selected among the manners and the selector SEL is switched in accordance with the manner.

摘要翻译： 为DRP内核提供内部缓冲区。 选择器SEL在外部存储器和内部缓冲器之间切换DRP内核的输入/输出目的地。 由CPU核心执行的控制软件接收关于目标处理序列的配置流水线的信息，并且通过外部存储器或经由内部缓冲器作为传送方式生成关于处理结果是否在配置之间传送的组合。 接下来，对于每种方式，计算由DRP核心使用的外部存储器的带宽和性能。 以这种方式选择满足先前指定的带宽限制的最佳性能的方式，并且根据该方式切换选择器SEL。

公开(公告)号：US09171822B2

公开(公告)日：2015-10-27

申请号：US13643306

申请日：2011-05-17

申请人： Jarno Kangastupa ,  Tiina Amberla ,  Kazuo Yamada

发明人： Jarno Kangastupa ,  Tiina Amberla ,  Kazuo Yamada

IPC分类号： B23K26/24 ,  H01L23/00 ,  B23K26/00 ,  G02F1/1339 ,  G02F1/1345

CPC分类号： H01L24/91 ,  B23K26/0006 ,  B23K26/244 ,  B23K26/50 ,  B23K2103/56 ,  G02F1/1339 ,  G02F1/1345 ,  H01L23/562 ,  H01L24/80 ,  H01L24/83 ,  H01L2224/056 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29171 ,  H01L2224/2918 ,  H01L2224/80001 ,  H01L2224/80224 ,  H01L2224/80359 ,  H01L2224/80488 ,  H01L2224/83193 ,  H01L2224/83224 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83471 ,  H01L2224/8348 ,  H01L2224/9211 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01059 ,  H01L2924/01066 ,  H01L2924/01068 ,  H01L2924/0107 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01105 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00014 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2924/01014 ,  H01L2924/3512 ,  H01L2924/00

摘要： The invention concerns a method of fusing and electrically contacting a first insulating substrate (28A) having at least one first conductive layer (29A) thereon with at least one second insulating substrate (28B) having at least one second conductive layer (29B) thereon, the method comprising: stacking the first and second substrates (28A, 28B) such that an interface zone is formed between them, the interface zone comprising an electrical contacting zone where at least one first conductive layers (29A) faces and is at least partially aligned with at least one second conductive layer (29B), and a substrate fusing zone where the insulating substrates (28A, 28B) directly face each other; focusing to the interface zone of the substrates (28A, 28B) through one of the substrates (28A, 28B) a plurality of sequential focused laser pulses from a laser source, the pulse duration, pulse frequency and pulse power of the laser light being chosen to provide local melting the substrate (28A, 28B) materials and the conductive layers (29A, 29B); and moving the laser source and the substrate with respect to each other at a predetermined velocity and path so that a structurally modified zone is formed to the interface zone, the structurally modified zone overlapping with said electrical contacting zone and said substrate fusing zone. The invention provides a convenient way of manufacturing well-sealed joints and electrical contacts for multifunction electronic devices, for example.

摘要翻译： 本发明涉及一种将具有至少一个第一导电层（29A）的第一绝缘衬底（28A）熔合并电接触至少一个在其上具有至少一个第二导电层（29B）的第二绝缘衬底（28B）的方法， 所述方法包括：堆叠所述第一和第二基板（28A，28B），使得在它们之间形成界面区，所述界面区包括电接触区，其中至少一个第一导电层（29A）面对且至少部分对准 具有至少一个第二导电层（29B），以及绝缘基板（28A，28B）直接面对的基板熔合区域; 通过基板（28A，28B）中的一个基板（28A，28B）的界面区域聚焦来自激光源的多个连续聚焦的激光脉冲，选择激光的脉冲持续时间，脉冲频率和脉冲功率 以提供局部熔化基板（28A，28B）材料和导电层（29A，29B）; 并且以预定的速度和路径相对于彼此移动激光源和基板，使得结构上改性的区域形成到界面区域，所述结构改性区域与所述电接触区域和所述基板熔合区域重叠。 本发明提供了例如制造用于多功能电子设备的良好密封接头和电接点的方便方法。

公开(公告)号：US09013506B2

公开(公告)日：2015-04-21

申请号：US13304001

申请日：2011-11-23

申请人： Mitsuyuki Tamatani ,  Kazuo Yamada

发明人： Mitsuyuki Tamatani ,  Kazuo Yamada

IPC分类号： G09G5/00 ,  G06T11/60 ,  G06F3/12

CPC分类号： G06T11/60 ,  G06F3/1211 ,  G06F3/124 ,  G06F3/1247

摘要： An information processing apparatus includes a rendering processor that renders a plurality of objects on a page in a parallel process, an overlap determiner that determines a plurality of objects overlapping each other in accordance with coordinate information of each object on the page and acquires coordinate information of an overlap area between the objects, a timing controller that controls a timing of the rendering of each object in the parallel process of the rendering processor in accordance with the coordinate information of the overlap area, and a renderer that renders a lower-layer object in the overlap area in accordance with timing information generated by the timing controller prior to rendering an upper-layer object on the lower-layer object in a superimpose fashion.

摘要翻译： 一种信息处理装置，包括以并行处理在页面上呈现多个对象的渲染处理器，根据页面上的每个对象的坐标信息确定彼此重叠的多个对象的重叠确定器，并且获取坐标信息 对象之间的重叠区域，根据重叠区域的坐标信息来控制渲染处理器的并行处理中的每个对象的渲染的定时的定时控制器，以及呈现下层对象的渲染器 根据由定时控制器以叠加方式在下层对象上渲染上层对象之前产生的定时信息的重叠区域。

公开(公告)号：US08824804B2

公开(公告)日：2014-09-02

申请号：US13287497

申请日：2011-11-02

申请人： Mitsuyuki Tamatani ,  Kazuo Yamada

发明人： Mitsuyuki Tamatani ,  Kazuo Yamada

IPC分类号： G06K9/66 ,  G06T1/20

CPC分类号： G06T1/20

摘要： An image processing apparatus includes: a determining unit determining, in image data including packs each including pixels and serving as a unit, a monotonic pack including pixels equal to a precedently image-processed preceding pixel and a normal pack other than the monotonic pack; a pixel row forming unit forming a pixel row including aligned pixels of the normal pack, while deleting the pixels of the monotonic pack; a pixel row processing unit processing the formed pixel row by inputting the pixel row to an image processing unit; and a supplementing unit supplementing an image processing result of the pixel row output from the image processing unit with, as an image processing result of the deleted pixels of the monotonic pack, a result of image processing by the image processing unit on the preceding pixel of the normal pack, to thereby obtain an image processing result of the image data.

摘要翻译： 一种图像处理装置，包括：确定单元，确定包括每个包括像素并作为一个单元的包的包的图像数据，包括等于先前图像处理的先前像素的像素和除单调包之外的正常包的像素的单调包; 像素行形成单元，其形成包括所述正常包的对齐像素的像素行，同时删除所述单调包的像素; 像素行处理单元，通过将像素行输入到图像处理单元来处理所形成的像素行; 以及补充单元，其补充从图像处理单元输出的像素行的图像处理结果，作为单调包的已删除像素的图像处理结果，由图像处理单元在先前像素的图像处理单元的图像处理结果 正常包装，从而获得图像数据的图像处理结果。

公开(公告)号：US08669010B2

公开(公告)日：2014-03-11

申请号：US12989508

申请日：2009-04-23

申请人： Naoto Torata ,  Kazuo Yamada ,  Satoshi Okano ,  Naoto Nishimura

发明人： Naoto Torata ,  Kazuo Yamada ,  Satoshi Okano ,  Naoto Nishimura

IPC分类号： H01M4/66 ,  H01M2/16

CPC分类号： H01M4/668 ,  H01M2/1653 ,  H01M4/131 ,  H01M4/133 ,  H01M4/136 ,  H01M4/1391 ,  H01M4/1393 ,  H01M4/1397 ,  H01M10/0525 ,  H01M10/058

摘要： A nonaqueous secondary battery comprises a positive electrode, a negative electrode and a separator interposed between the positive electrode and the negative electrode, wherein at least one of the positive electrode and the negative electrode is provided with a current collector composed of a film-like or fibrous resin layer having a conductive layer on both sides, and the separator has a higher thermal deformation temperature than the resin layer.

摘要翻译： 非水二次电池包括正电极，负电极和置于正电极和负电极之间的隔膜，其中正电极和负电极中的至少一个设置有由膜状或 在两侧具有导电层的纤维状树脂层，隔板的热变形温度比树脂层高。

公开(公告)号：US20120328917A1

公开(公告)日：2012-12-27

申请号：US13530523

申请日：2012-06-22

申请人： Kazuya Sakashita ,  Kazuo Yamada ,  Yoshihiro Tsukuda ,  Yuki Watanabe

发明人： Kazuya Sakashita ,  Kazuo Yamada ,  Yoshihiro Tsukuda ,  Yuki Watanabe

IPC分类号： H01M2/12 ,  H01M10/04 ,  H01M2/36

CPC分类号： H01M2/0404 ,  H01M2/1229 ,  H01M2/361 ,  H01M10/0436 ,  H01M10/052 ,  H01M10/0585 ,  Y02T10/7011 ,  Y10T29/4911

摘要： In order to obtain a secondary battery and a method for producing same whereby, notwithstanding the large size of an electrode group of several tens of stacked layers of positive electrode plates, negative electrode plates, and separators, any residual air, gases, or the like present between layers can be effectively driven out, and the electrolyte can be induced to reliably penetrate into the interior of the electrode group, secondary batteries RB1 to RB4 and the method for producing same are configured such that, during creation of a vacuum in a vacuum injection step, a predetermined section of a battery can 10 opposing the vicinity of the center part of an electrode group 1 undergoes deformation by a predetermined amount or more, and a venting function of driving out residual air between the layers is exhibited.

摘要翻译： 为了获得二次电池及其制造方法，尽管正极板，负极板和隔板的数十层叠电极组的尺寸大，但是任何残留的空气，气体等 可以有效地驱除层之间的存在，并且可以诱发电解质可靠地渗透到电极组的内部，二次电池RB1至RB4及其制造方法被配置为使得在真空中产生真空期间 与电极组1的中心部附近相反的电池罐10的预定部分经受一定量以上的变形，并且显示出在各层之间排出残留空气的排气功能。