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公开(公告)号：US07605683B2
公开(公告)日：2009-10-20
申请号：US12029613
申请日：2008-02-12
申请人： Takashi Sawada , Kenjiro Hadano
发明人： Takashi Sawada , Kenjiro Hadano
IPC分类号： G01L1/22
CPC分类号： H01G4/30 , H01G4/232 , H01G4/2325
摘要： In a monolithic electronic component in which a resistive element is incorporated by forming a resistor film on a terminal electrode, a plating film can be formed on the terminal electrode having the resistor film via electroplating in an efficient manner and with a uniform film thickness. In order to form the terminal electrode, the resistor film is disposed directly on the surface of the component body, and a conductive resin film having a relatively low volume resistivity is disposed over the resistor film. The conductive resin film is preferably adapted to have a specific resistance of less than about 1×10−4 Ω·m, on which a plating film having a uniform film thickness can be formed efficiently via electroplating.
摘要翻译： 在通过在端子电极上形成电阻膜而并入电阻元件的单片电子元件中，可以通过电镀以具有均匀膜厚的电镀形成具有电阻膜的端子电极上的电镀膜。 为了形成端子电极，电阻膜直接配置在组件体的表面上，并且具有较低体积电阻率的导电树脂膜设置在电阻膜上。 导电树脂膜优选地具有小于约1×10 -4Ω·μm的电阻率，其上可以通过电镀有效地形成具有均匀膜厚度的镀膜。
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2.发明申请公开(公告)号：US20090134956A1
公开(公告)日：2009-05-28
申请号：US12351132
申请日：2009-01-09
IPC分类号： H03H7/00
CPC分类号： H01F17/0013 , H01G2/24 , H01G4/232 , H01G4/30 , H01G4/40
摘要： A multilayer array electronic component includes a multilayer composite including a helical coil and a capacitor that are defined by stacking a coil conductor, a capacitor conductor, and a ceramic sheet on one another. External electrodes are arranged on the surface of the multilayer composite and electrically connected to the helical coil or the capacitor. A direction identification mark is arranged on the upper surface of the multilayer composite and electrically connected to any of the external electrodes through the helical coil or the capacitor.
摘要翻译： 多层阵列电子部件包括通过层叠线圈导体，电容器导体和陶瓷片而彼此定义的包括螺旋线圈和电容器的多层复合体。 外部电极布置在多层复合材料的表面上并与螺旋线圈或电容器电连接。 方向识别标记布置在多层复合材料的上表面上，并通过螺旋线圈或电容器电连接到任何外部电极。
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公开(公告)号：US08675341B2
公开(公告)日：2014-03-18
申请号：US13357677
申请日：2012-01-25
摘要： In a multilayer ceramic electronic component, when a region of a ceramic body in layers where neither of a first internal electrode and a second internal electrode is provided as viewed in a direction in which a plurality of ceramic layers are stacked on one another is defined as a non-effective layer region, a dummy lead-through conductor is arranged in the non-effective layer region so as to lead to at least two locations on portions of superficies of the ceramic body and be electrically connected to a second external electrode. When a conductive medium is brought into contact with one of a plurality of exposed edges of the dummy lead-through conductor, a current is also applied to the other exposed edges.
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4.发明授权公开(公告)号：US07663453B2
公开(公告)日：2010-02-16
申请号：US12351132
申请日：2009-01-09
IPC分类号： H01G2/24
CPC分类号： H01F17/0013 , H01G2/24 , H01G4/232 , H01G4/30 , H01G4/40
摘要： A multilayer array electronic component includes a multilayer composite including a helical coil and a capacitor that are defined by stacking a coil conductor, a capacitor conductor, and a ceramic sheet on one another. External electrodes are arranged on the surface of the multilayer composite and electrically connected to the helical coil or the capacitor. A direction identification mark is arranged on the upper surface of the multilayer composite and electrically connected to any of the external electrodes through the helical coil or the capacitor.
摘要翻译： 多层阵列电子部件包括通过层叠线圈导体，电容器导体和陶瓷片而彼此定义的包括螺旋线圈和电容器的多层复合体。 外部电极布置在多层复合材料的表面上并与螺旋线圈或电容器电连接。 方向识别标记布置在多层复合材料的上表面上，并通过螺旋线圈或电容器电连接到任何外部电极。
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公开(公告)号：US6147587A
公开(公告)日：2000-11-14
申请号：US219616
申请日：1998-12-23
申请人： Kenjiro Hadano , Tsuyoshi Kawada , Iwao Fukutani , Kazutaka Nakamura , Kuzuhiro Kaneko , Ryouichi Urahara
发明人： Kenjiro Hadano , Tsuyoshi Kawada , Iwao Fukutani , Kazutaka Nakamura , Kuzuhiro Kaneko , Ryouichi Urahara
摘要： A laminated-type varistor includes a laminated structure and a pair of external electrodes disposed on a surface of the laminated structure. The laminated structure includes effective sintered body layers and internal electrodes. The internal electrodes are connected to the external electrodes and are disposed apart from each other in the direction perpendicular to lamination surfaces. Each of the internal electrodes has a multilayer electrode structure in which a plurality of electrode layers are arranged in layers while an ineffective sintered body layer is disposed therebetween. The laminated-type varistor has increased maximum peak current and maximum energy and reduction in clamping voltage.
摘要翻译： 叠层型变阻器包括层压结构和设置在层叠结构的表面上的一对外部电极。 层叠结构包括有效的烧结体层和内部电极。 内部电极与外部电极连接，并且在与层叠面垂直的方向上彼此分离。 每个内部电极具有多层电极结构，其中多个电极层被布置成层，而其间设置无效的烧结体层。 叠层型压敏电阻具有增加的最大峰值电流和最大能量以及钳位电压的降低。
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公开(公告)号：US08687344B2
公开(公告)日：2014-04-01
申请号：US13494042
申请日：2012-06-12
摘要： A laminated ceramic electronic component includes curved surface portions provided in an outer surface of a ceramic element assembly, and internal conductors provided within the ceramic element assembly that are exposed in the curved surface portions and principal surfaces to define starting points for plating deposition. A base layer, in an external conductor, which is defined by a plating film is arranged so as to directly cover the exposed portions of the internal conductors.
摘要翻译： 层叠陶瓷电子部件包括设置在陶瓷元件组件的外表面中的弯曲表面部分和设置在陶瓷元件组件内的内部导体，其暴露在弯曲表面部分和主表面中以限定电镀沉积的起始点。 在由镀膜限定的外部导体中的基底层被布置成直接覆盖内部导体的暴露部分。
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公开(公告)号：US07880564B2
公开(公告)日：2011-02-01
申请号：US12358318
申请日：2009-01-23
申请人： Tomohiro Sasaki , Kenjiro Hadano , Haruhiko Ueno
发明人： Tomohiro Sasaki , Kenjiro Hadano , Haruhiko Ueno
IPC分类号： H03H7/00
CPC分类号： H03H7/0115 , H01F2017/0026 , H01G4/35 , H01G4/40 , H03H1/00 , H03H7/1708 , H03H7/175 , H03H7/1758 , H03H7/1766 , H03H2001/0085
摘要： A noise filter array includes filter elements including an LC parallel resonant circuit and an LC series resonant circuit each of which includes a coil and a capacitor provided in proximity in an array and integrally provided with one another. The LC series resonant circuits include ground capacitors having signal-side electrodes. Inductance adjustment conductors are connected to signal-side electrodes of the capacitors defining the respective filter elements, and a ground electrode of the capacitors is commonly arranged so as to oppose the signal-side electrodes.
摘要翻译： 噪声滤波器阵列包括包括LC并联谐振电路和LC串联谐振电路的滤波器元件，每个LC串联谐振电路包括线圈和阵列附近设置并且彼此一体地设置的电容器。 LC串联谐振电路包括具有信号侧电极的接地电容器。 电感调节导体连接到限定各个滤波器元件的电容器的信号侧电极，并且电容器的接地电极通常布置成与信号侧电极相对。
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公开(公告)号：US07746197B2
公开(公告)日：2010-06-29
申请号：US12352027
申请日：2009-01-12
申请人： Kenjiro Hadano , Tomohiro Sasaki , Haruhiko Ueno
发明人： Kenjiro Hadano , Tomohiro Sasaki , Haruhiko Ueno
IPC分类号： H03H7/00
CPC分类号： H03H7/0115 , H01F2017/0026 , H01F2017/0073 , H01G4/35 , H01G4/40 , H03H7/1725 , H03H7/1758 , H03H7/1766 , H03H2001/0085
摘要： A noise filter array includes filter elements, each of which includes an LC parallel resonant circuit having a coil and a capacitor and an LC series resonant circuit having a coil and a capacitor, are arranged substantially parallel to one another in an array and integrally provided. Grounding capacitors that define the filter elements are arranged so that a common ground-side electrode faces signal-side electrodes and is connected to an inductance adjusting conductor that defines the LC series resonant circuits along with the capacitors through a via hole. The lengths of the inductance adjusting conductor from a connection location within the via hole to ground terminals are substantially equal in each of the filter elements.
摘要翻译： 噪声滤波器阵列包括滤波器元件，每个滤波器元件包括具有线圈和电容器的LC并联谐振电路和具有线圈和电容器的LC串联谐振电路，其基本上彼此平行地排列并且一体地设置。 限定滤波器元件的接地电容器被布置成使得公共接地侧电极面对信号侧电极并且连接到电感调节导体，其通过通孔与电容器一起限定LC串联谐振电路。 电感调节导体从通孔内的连接位置到接地端子的长度在每个滤波器元件中基本相等。
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公开(公告)号：US06184769B2
公开(公告)日：2001-02-06
申请号：US09276149
申请日：1999-03-26
IPC分类号： H01C710
CPC分类号： H01C7/112 , H01C17/06546 , H01C17/285
摘要： A monolithic varistor includes a sintered layered body and a pair of external electrodes disposed on opposite ends of the layered body. The layered body is composed of a plurality of varistor sheets and a plurality of valistor electrodes, which are layered on one another and integrally fired. T is defined as the distance between the varistor electrodes, and Ty is defined as the distance between an outermost varistor electrode and the upper surface of the sintered layered body. Further, Tx is defined as the distance between the external electrodes and the corresponding edges of the varistor electrodes. The varistor is designed in order to satisfy one of the following three conditions: Condition (A) 1.5≦(Tx/T)≦3.0 Condition (B) (Ty/T)≧1.0 Condition (C) 1.5≦(Tx/T)≦3.0 and (Ty/T)≧1.0
摘要翻译： 单片变阻器包括烧结层叠体和设置在层叠体的相对端的一对外部电极。 层叠体由多个压敏电阻片和多个彼此层叠并整体烧制的晶体管电极组成。 T定义为变阻器电极之间的距离，Ty被定义为最外面的变阻器电极与烧结层叠体的上表面之间的距离。 此外，Tx被定义为外部电极与压敏电阻电极的对应边缘之间的距离。 设计变阻器以满足以下三个条件之一：条件（A）1.5 <=（Tx / T）<= 3.0条件（B）（Ty / T）> = 1.0条件（C）1.5 <=（ Tx / T）<= 3.0和（Ty / T）> = 1.0
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