公开(公告)号：US20060244521A1

公开(公告)日：2006-11-02

申请号：US11390116

申请日：2006-03-28

申请人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Takayuki Mashimo ,  Yoshihiro Masui ,  Junji Nakatsuka

发明人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Takayuki Mashimo ,  Yoshihiro Masui ,  Junji Nakatsuka

IPC分类号： H03F1/02

CPC分类号： H03F3/45775 ,  H03F3/393

摘要： In a chopper amplifier circuit operable at a low voltage utilizing a switched operational amplifier, a chopper modulator chopper-modulates an input signal according to a predetermined control signal, and outputs a chopper-modulated signal. An amplifier circuit constituted by the switched operational amplifier amplifies the chopper-modulated signal outputted from the chopper modulator, and outputs an amplified chopper-modulated signal. A chopper-demodulator of the switched operational amplifier chopper-demodulates the amplified chopper-modulated signal outputted from the amplifier circuit according to the control signal, and outputs a demodulated output signal as a chopper-amplified output signal from an output terminal. A chopper modulator chopper-modulates a demodulated signal outputted from the chopper demodulator according to the control signal, and outputs a chopper-modulated signal to an input terminal of the amplifier circuit.

摘要翻译： 在利用开关式运算放大器在低电压工作的斩波放大器电路中，斩波调制器根据预定的控制信号对输入信号进行斩波调制，并输出斩波调制信号。 由开关运算放大器构成的放大电路放大从斩波调制器输出的斩波调制信号，并输出放大的斩波调制信号。 切换运算放大器的斩波解调器根据控制信号对从放大器电路输出的放大的斩波调制信号进行斩波，并从输出端子输出作为斩波放大输出信号的解调输出信号。 斩波调制器根据控制信号对从斩波解调器输出的解调信号进行斩波调制，并将斩波调制信号输出到放大电路的输入端。

公开(公告)号：US07336123B2

公开(公告)日：2008-02-26

申请号：US11390116

申请日：2006-03-28

申请人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Takayuki Mashimo ,  Yoshihiro Masui ,  Junji Nakatsuka

发明人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Takayuki Mashimo ,  Yoshihiro Masui ,  Junji Nakatsuka

IPC分类号： H03F1/02

CPC分类号： H03F3/45775 ,  H03F3/393

摘要： In a chopper amplifier circuit operable at a low voltage utilizing a switched operational amplifier, a chopper modulator chopper-modulates an input signal according to a predetermined control signal, and outputs a chopper-modulated signal. An amplifier circuit constituted by the switched operational amplifier amplifies the chopper-modulated signal outputted from the chopper modulator, and outputs an amplified chopper-modulated signal. A chopper-demodulator of the switched operational amplifier chopper-demodulates the amplified chopper-modulated signal outputted from the amplifier circuit according to the control signal, and outputs a demodulated output signal as a chopper-amplified output signal from an output terminal. A chopper modulator chopper-modulates a demodulated signal outputted from the chopper demodulator according to the control signal, and outputs a chopper-modulated signal to an input terminal of the amplifier circuit.

摘要翻译： 在利用开关式运算放大器在低电压工作的斩波放大器电路中，斩波调制器根据预定的控制信号对输入信号进行斩波调制，并输出斩波调制信号。 由开关运算放大器构成的放大电路放大从斩波调制器输出的斩波调制信号，并输出放大的斩波调制信号。 切换运算放大器的斩波解调器根据控制信号对从放大器电路输出的放大的斩波调制信号进行斩波，并从输出端子输出作为斩波放大输出信号的解调输出信号。 斩波调制器根据控制信号对从斩波解调器输出的解调信号进行斩波调制，并将斩波调制信号输出到放大电路的输入端。

公开(公告)号：US20080106330A1

公开(公告)日：2008-05-08

申请号：US11896899

申请日：2007-09-06

申请人： Takeshi Yoshida ,  Yoshihiro Masui ,  Atsushi Iwata ,  Kunihiko Gotoh

发明人： Takeshi Yoshida ,  Yoshihiro Masui ,  Atsushi Iwata ,  Kunihiko Gotoh

IPC分类号： H03F3/38

CPC分类号： H03F3/387 ,  H03F3/45475 ,  H03F3/45977 ,  H03F2200/261 ,  H03F2203/45136 ,  H03F2203/45212

摘要： In a feedback amplifier circuit, a first switching device executes an auto-zero operation by inputting a signal outputted from an amplifier to an input terminal of the amplifier during an auto-zero operation interval prior to an amplification interval. A first capacitor accumulates and holds an offset voltage at the output terminal of the amplifier during the auto-zero operation interval, and cancels an offset voltage at the input terminal of the amplifier by an accumulated and held offset voltage during an amplification interval subsequent to the auto-zero operation interval. A second switching device grounds the feedback point of the feedback circuit during the auto-zero operation interval. A second capacitor blocks a DC voltage, and accumulates and holds an offset voltage at an output terminal of the amplifier, and cancels an offset voltage at an input terminal of the amplifier by the accumulated and held offset voltage during an amplification interval.

摘要翻译： 在反馈放大器电路中，第一开关器件在放大间隔之前的自动归零操作间隔期间，通过将从放大器输出的信号输入到放大器的输入端子来执行自动归零操作。 第一电容器在自动归零操作间隔期间在放大器的输出端积累并保持偏移电压，并且在放大器的输出端之后的放大间隔期间通过累积和保持的偏移电压来消除放大器的输入端的偏移电压 自动归零运行间隔。 第二开关装置在自动归零操作间隔期间将反馈电路的反馈点接地。 第二电容器阻塞DC电压，并且在放大器的输出端累积并保持偏移电压，并且在放大间隔期间通过累积和保持的偏移电压来消除放大器输入端的偏移电压。

公开(公告)号：US07907076B2

公开(公告)日：2011-03-15

申请号：US12582305

申请日：2009-10-20

申请人： Takeshi Yoshida ,  Yoshihiro Masui ,  Atsushi Iwata ,  Kunihiko Gotoh

发明人： Takeshi Yoshida ,  Yoshihiro Masui ,  Atsushi Iwata ,  Kunihiko Gotoh

IPC分类号： H03M1/34

CPC分类号： H03F3/45475 ,  H03F3/387 ,  H03F2203/45512 ,  H03M1/0663 ,  H03M1/12

摘要： A differential amplifier circuit is provided with an operational amplifier and a modulator. The operational amplifier includes a feedback capacitance, and amplifies an analog input signal and outputs an amplified analog output signal. The modulator is connected to a virtual ground point of an input terminal of the operational amplifier, and the modulator switches between a pair of inputted analog differential signals to alternately select one of the analog differential signals based on a predetermined modulation control signal, and outputs a selected analog differential signal. The differential amplifier circuit alternately folds and amplifies the analog input signal within a predetermined input level limit range to generate a signal having different polarities sequentially so as to start from a voltage potential of the virtual ground point at a timing of the modulation control signal. In addition, an converter apparatus is provided with the differential amplifier circuit.

摘要翻译： 差分放大器电路具有运算放大器和调制器。 运算放大器包括反馈电容，并放大模拟输入信号并输出​​放大的模拟输出信号。 调制器连接到运算放大器的输入端的虚拟接地点，并且调制器在一对输入的模拟差分信号之间切换，以基于预定的调制控制信号交替地选择一个模拟差分信号，并输出 选择模拟差分信号。 差分放大器电路在预定输入电平限制范围内交替地折叠和放大模拟输入信号，以在调制控制信号的定时从顺序地产生具有不同极性的信号，以便从虚拟接地点的电压电位开始。 另外，转换器装置设置有差动放大电路。

公开(公告)号：US07589587B2

公开(公告)日：2009-09-15

申请号：US11896899

申请日：2007-09-06

申请人： Takeshi Yoshida ,  Yoshihiro Masui ,  Atsushi Iwata ,  Kunihiko Gotoh

发明人： Takeshi Yoshida ,  Yoshihiro Masui ,  Atsushi Iwata ,  Kunihiko Gotoh

IPC分类号： H03F1/02

CPC分类号： H03F3/387 ,  H03F3/45475 ,  H03F3/45977 ,  H03F2200/261 ,  H03F2203/45136 ,  H03F2203/45212

摘要： In a feedback amplifier circuit, a first switching device executes an auto-zero operation by inputting a signal outputted from an amplifier to an input terminal of the amplifier during an auto-zero operation interval prior to an amplification interval. A first capacitor accumulates and holds an offset voltage at the output terminal of the amplifier during the auto-zero operation interval, and cancels an offset voltage at the input terminal of the amplifier by an accumulated and held offset voltage during an amplification interval subsequent to the auto-zero operation interval. A second switching device grounds the feedback point of the feedback circuit during the auto-zero operation interval. A second capacitor blocks a DC voltage, and accumulates and holds an offset voltage at an output terminal of the amplifier, and cancels an offset voltage at an input terminal of the amplifier by the accumulated and held offset voltage during an amplification interval.

摘要翻译： 在反馈放大器电路中，第一开关器件在放大间隔之前的自动归零操作间隔期间，通过将从放大器输出的信号输入到放大器的输入端子来执行自动归零操作。 第一电容器在自动归零操作间隔期间在放大器的输出端积累并保持偏移电压，并且在放大器的输出端之后的放大间隔期间通过累积和保持的偏移电压来消除放大器的输入端的偏移电压 自动归零运行间隔。 第二开关装置在自动归零操作间隔期间将反馈电路的反馈点接地。 第二电容器阻塞DC电压，并且在放大器的输出端累积并保持偏移电压，并且在放大间隔期间通过累积和保持的偏移电压来消除放大器输入端的偏移电压。

公开(公告)号：US20060114061A1

公开(公告)日：2006-06-01

申请号：US11287469

申请日：2005-11-28

申请人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Kunihiko Gotoh

发明人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Kunihiko Gotoh

IPC分类号： H03F3/18

CPC分类号： H03F3/45183 ,  H03F3/3022 ,  H03F3/347 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2203/30015 ,  H03F2203/45366

摘要： In a class AB CMOS output circuit provided with a CMOS circuit including first P and N channel transistors and operating by a predetermined operating current Io, a replica circuit is formed on a semiconductor substrate of the CMOS circuit, and includes a second P channel transistor having a size equal or similar to that of the first P channel transistor, and a second N channel transistor having a size equal or similar to that of the first N channel transistor. A bias voltage supply allows the second P and N channel transistors to operate based on a reference current Iref corresponding to the operating current Io, applies a first bias voltage as applied to the second P channel transistor to the first P channel transistor, and applies a second bias voltage as applied to the second N channel transistor to the first N channel transistor.

摘要翻译： 在具有CMOS电路的AB类CMOS输出电路中，包括第一P和N沟道晶体管并通过预定的工作电流I O 2进行操作，复制电路形成在CMOS电路的半导体衬底上， 并且包括具有与第一P沟道晶体管相同或相似的尺寸的第二P沟道晶体管，以及具有与第一N沟道晶体管的尺寸相等或相似的尺寸的第二N沟道晶体管。 偏置电压电源允许第二P沟道晶体管和N沟道晶体管基于对应于工作电流I 的参考电流Iref工作，将施加到第二P沟道晶体管的第一偏置电压施加到 第一P沟道晶体管，并将施加到第二N沟道晶体管的第二偏置电压施加到第一N沟道晶体管。

公开(公告)号：US20050200510A1

公开(公告)日：2005-09-15

申请号：US11029492

申请日：2005-01-06

申请人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Miho Akagi ,  Kunihiko Goto

发明人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Miho Akagi ,  Kunihiko Goto

IPC分类号： H03M1/38 ,  H03M1/12 ,  H03M1/46 ,  H03M1/80

CPC分类号： H03M1/1245 ,  H03M1/466 ,  H03M1/804

摘要： In a sampling and holding, a control logic circuit connects another end of each capacitor of a DA converter to a ground potential, and outputs a sampled input analog signal from a switched amplifier to one end of a hold capacitor to hold. In a successive approximation, it controls a switched amplifier to set an output terminal thereof to a high-impedance state and the hold capacitor to connect the one end thereof to the ground potential. Then, it switches over connection of another end of each capacitor from the ground potential to a power supply voltage based on a digital value held by a successive approximation register to output an output voltage from another end of the hold capacitor to a comparator, and compares the output voltage from another end thereof with an intermediate reference voltage to obtain a digital value from the successive approximation register.

摘要翻译： 在采样和保持中，控制逻辑电路将DA转换器的每个电容器的另一端连接到地电位，并且将来自开关放大器的采样输入模拟信号输出到保持电容器的一端以保持。 在逐次逼近中，它控制开关放大器将其输出端子设置为高阻抗状态，并且保持电容器将其一端连接到地电位。 然后，基于由逐次逼近寄存器保持的数字值将每个电容器的另一端从地电位切换到电源电压，以将输出电压从保持电容器的另一端输出到比较器，并将其进行比较 来自其另一端的输出电压具有中间参考电压，以从逐次逼近寄存器获得数字值。

公开(公告)号：US07015841B2

公开(公告)日：2006-03-21

申请号：US11029492

申请日：2005-01-06

申请人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Miho Akagi ,  Kunihiko Goto

发明人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Miho Akagi ,  Kunihiko Goto

IPC分类号： H03M1/10

CPC分类号： H03M1/1245 ,  H03M1/466 ,  H03M1/804

摘要： In a sampling and holding, a control logic circuit connects another end of each capacitor of a DA converter to a ground potential, and outputs a sampled input analog signal from a switched amplifier to one end of a hold capacitor to hold. In a successive approximation, it controls a switched amplifier to set an output terminal thereof to a high-impedance state and the hold capacitor to connect the one end thereof to the ground potential. Then, it switches over connection of another end of each capacitor from the ground potential to a power supply voltage based on a digital value held by a successive approximation register to output an output voltage from another end of the hold capacitor to a comparator, and compares the output voltage from another end thereof with an intermediate reference voltage to obtain a digital value from the successive approximation register.

摘要翻译： 在采样和保持中，控制逻辑电路将DA转换器的每个电容器的另一端连接到地电位，并且将来自开关放大器的采样输入模拟信号输出到保持电容器的一端以保持。 在逐次逼近中，它控制开关放大器将其输出端子设置为高阻抗状态，并且保持电容器将其一端连接到地电位。 然后，基于由逐次逼近寄存器保持的数字值将每个电容器的另一端从地电位切换到电源电压，以将输出电压从保持电容器的另一端输出到比较器，并将其进行比较 来自其另一端的输出电压具有中间参考电压，以从逐次逼近寄存器获得数字值。

公开(公告)号：US07301399B2

公开(公告)日：2007-11-27

申请号：US11287469

申请日：2005-11-28

申请人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Kunihiko Gotoh

发明人： Takeshi Yoshida ,  Atsushi Iwata ,  Mamoru Sasaki ,  Kunihiko Gotoh

IPC分类号： H03F3/18

CPC分类号： H03F3/45183 ,  H03F3/3022 ,  H03F3/347 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2203/30015 ,  H03F2203/45366

摘要： In a class AB CMOS output circuit provided with a CMOS circuit including first P and N channel transistors and operating by a predetermined operating current Io, a replica circuit is formed on a semiconductor substrate of the CMOS circuit, and includes a second P channel transistor having a size equal or similar to that of the first P channel transistor, and a second N channel transistor having a size equal or similar to that of the first N channel transistor. A bias voltage supply allows the second P and N channel transistors to operate based on a reference current Iref corresponding to the operating current Io, applies a first bias voltage as applied to the second P channel transistor to the first P channel transistor, and applies a second bias voltage as applied to the second N channel transistor to the first N channel transistor.

摘要翻译： 在具有CMOS电路的AB类CMOS输出电路中，包括第一P和N沟道晶体管并通过预定的工作电流I O 2进行操作，复制电路形成在CMOS电路的半导体衬底上， 并且包括具有与第一P沟道晶体管相同或相似的尺寸的第二P沟道晶体管，以及具有与第一N沟道晶体管的尺寸相等或相似的尺寸的第二N沟道晶体管。 偏置电压电源允许第二P沟道晶体管和N沟道晶体管基于对应于工作电流I 的参考电流Iref工作，将施加到第二P沟道晶体管的第一偏置电压施加到 第一P沟道晶体管，并将施加到第二N沟道晶体管的第二偏置电压施加到第一N沟道晶体管。

公开(公告)号：US08930069B2

公开(公告)日：2015-01-06

申请号：US13443451

申请日：2012-04-10

申请人： Yuu Nagata ,  Takeshi Yoshida ,  Yuu Funakura ,  Yuichi Ochiai

发明人： Yuu Nagata ,  Takeshi Yoshida ,  Yuu Funakura ,  Yuichi Ochiai

IPC分类号： G06F19/00 ,  G06F1/24 ,  G01C21/26

CPC分类号： G06F1/24 ,  G01C21/265

摘要： An in-vehicle system according to an embodiment includes a detection unit, a reception unit, and a recovery unit. The detection unit detects a freeze state of a navigation apparatus. The reception unit receives a recovery operation from a user demanding recovery of the navigation apparatus. The recovery unit performs a recovery process for the navigation apparatus upon detection of the freeze state of the navigation apparatus by the detection unit and upon reception of the recovery operation by the reception unit.

摘要翻译： 根据实施例的车载系统包括检测单元，接收单元和恢复单元。 检测单元检测导航装置的冻结状态。 接收单元从要求恢复导航装置的用户接收恢复操作。 检测单元检测出导航装置的冻结状态，接收单元接收到恢复动作后，恢复单元对导航装置进行恢复处理。