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公开(公告)号:US08124974B2
公开(公告)日:2012-02-28
申请号:US12536097
申请日:2009-08-05
申请人: Takeshi Noda , Toshio Miyazawa , Takuo Kaitoh , Takumi Shigaki
发明人: Takeshi Noda , Toshio Miyazawa , Takuo Kaitoh , Takumi Shigaki
IPC分类号: H01L33/00
CPC分类号: G02F1/13624 , G02F2202/104
摘要: A display device is provided in which at least first and second thin film transistors are formed on a substrate, including a gate electrode formed on a semiconductor layer with a gate insulating film in between. The semiconductor layer is divided into individual regions for each film transistor, and is provided with a common region and LDD regions between a channel region and a drain region, as well as between the channel region and a source region. The gate electrode is formed as an integrated gate electrode for the first and second thin film transistors that faces the common region, the channel region and the LDD regions of the first thin film transistor and the channel region and the LDD regions of the second thin film transistor.
摘要翻译: 提供了一种显示装置,其中至少第一和第二薄膜晶体管形成在基板上,包括形成在其间具有栅极绝缘膜的半导体层上的栅电极。 半导体层被分成用于每个薄膜晶体管的单个区域,并且在沟道区域和漏极区域之间以及在沟道区域和源极区域之间设置有公共区域和LDD区域。 栅电极形成为第一和第二薄膜晶体管的集成栅电极,其面对公共区域,第一薄膜晶体管的沟道区域和LDD区域以及第二薄膜的沟道区域和LDD区域 晶体管。
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公开(公告)号:US20110024763A1
公开(公告)日:2011-02-03
申请号:US12844887
申请日:2010-07-28
申请人: Takeshi NODA , Toshio Miyazawa , Takuo Kaitoh , Daisuke Sonoda
发明人: Takeshi NODA , Toshio Miyazawa , Takuo Kaitoh , Daisuke Sonoda
IPC分类号: H01L33/16 , H01L21/336
CPC分类号: H01L29/78621 , G02F1/1368 , H01L29/66765 , H01L29/78627
摘要: A display device which has thin film transistors, wherein a semiconductor layer includes a first layer, second layers and third layers, the first layer has a channel region, the second layers are an impurity layer, the third layers are a low-concentration impurity layer, the second layers have connection portions connected with an electrodes, the third layers are formed to annularly surround the second layers, a channel-region-side edge portion out of edge portions of the third layer is in contact with the first layer, the edge portions of the third layer but the channel-region-side edge portion are in contact with an interlayer insulation film, the second layers have a first region where the second layer overlaps with a gate electrode and a second region where the second layer does not overlap with the gate electrode, and the connection portion is in the second region.
摘要翻译: 一种具有薄膜晶体管的显示装置,其中半导体层包括第一层,第二层和第三层,第一层具有沟道区,第二层是杂质层,第三层是低浓度杂质层 所述第二层具有与电极连接的连接部,所述第三层形成为环绕所述第二层,所述第三层的边缘部分之外的沟道区域侧边缘部与所述第一层接触,所述边缘 第三层的第二层与沟道区侧边缘部分接触层间绝缘膜,第二层具有第一区域,其中第二层与栅电极重叠,第二区与第二层不重叠 与栅电极连接,连接部位在第二区域。
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公开(公告)号:US20090065777A1
公开(公告)日:2009-03-12
申请号:US12208371
申请日:2008-09-11
申请人: Eiji Oue , Takuo Kaitoh , Hidekazu Miyake , Toshio Miyazawa , Yuichiro Takashina
发明人: Eiji Oue , Takuo Kaitoh , Hidekazu Miyake , Toshio Miyazawa , Yuichiro Takashina
CPC分类号: H01L27/1229 , H01L27/1214 , H01L27/1274 , H01L29/66765 , H01L29/78678
摘要: In a display device of the present invention which forms thin film transistors on a substrate, the thin film transistor comprises: a silicon nitride film which is formed on the substrate in a state that the silicon nitride film covers a gate electrode; a silicon oxide film which is selectively formed on the silicon nitride film; a semiconductor layer which is formed at least on an upper surface of the silicon oxide film and includes a pseudo single crystal layer or a polycrystalline layer; and a drain electrode and a source electrode which are formed on an upper surface of the semiconductor layer by way of a contact layer, wherein either one of the pseudo single crystal layer and the poly-crystalline layer is formed by crystallizing the amorphous silicon layer, and a peripheral-side wall surface of the pseudo single crystal layer or the polycrystalline layer is contiguously constituted with a peripheral-side wall surface of the silicon oxide film below the pseudo single crystal layer or the polycrystalline layer without a stepped portion.
摘要翻译: 在本发明的在基板上形成薄膜晶体管的显示装置中,薄膜晶体管包括:在氮化硅膜覆盖栅电极的状态下在基板上形成的氮化硅膜; 选择性地形成在氮化硅膜上的氧化硅膜; 形成在所述氧化硅膜的上表面上的半导体层,其包含伪单晶层或多晶层; 以及通过接触层形成在半导体层的上表面上的漏电极和源电极,其中通过使非晶硅层结晶来形成伪单晶层和多晶层中的任一个, 并且伪单晶层或多晶层的外围侧壁表面在不具有台阶部分的伪单晶层或多晶层下方的氧化硅膜的周向侧壁表面附近构成。
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公开(公告)号:US08310611B2
公开(公告)日:2012-11-13
申请号:US12536066
申请日:2009-08-05
申请人: Takuo Kaitoh , Toshio Miyazawa , Takeshi Sakai
发明人: Takuo Kaitoh , Toshio Miyazawa , Takeshi Sakai
IPC分类号: G02F1/136
CPC分类号: G02F1/1368 , H01L27/124 , H01L29/458 , H01L29/78618
摘要: Provided is a display device including: a gate electrode (GT); a semiconductor film (S) which controls a current flowing between a source electrode (ST) and a drain electrode (DT), the semiconductor film including a channel region and two impurity regions formed of regions which sandwich the channel region; two Ohmic contact layers (DS) being interposed between the source electrode and the like and the two impurity regions; and an insulating film laminated on a partial region of the semiconductor film, the partial region being around a position corresponding to a substantial center of the semiconductor film, in which: the semiconductor film is formed of one of microcrystalline-silicon and polycrystalline-silicon; the two impurity regions are formed in regions on which the insulating film is absent; the two Ohmic contact layers cover the two impurity regions therewith; and the source electrode and the like cover the Ohmic contact layers therewith.
摘要翻译: 提供一种显示装置,包括:栅电极(GT); 控制在源电极(ST)和漏电极(DT)之间流动的电流的半导体膜(S),所述半导体膜包括沟道区域和由夹着沟道区域的区域形成的两个杂质区域; 两个欧姆接触层(DS)插在源电极等和两个杂质区之间; 以及层叠在所述半导体膜的部分区域上的绝缘膜,所述部分区域围绕与所述半导体膜的大致中心对应的位置,其中:所述半导体膜由微晶硅和多晶硅中的一个形成; 在绝缘膜不存在的区域中形成两个杂质区域; 两个欧姆接触层覆盖其两个杂质区域; 源电极等覆盖欧姆接触层。
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公开(公告)号:US08049255B2
公开(公告)日:2011-11-01
申请号:US12155504
申请日:2008-06-05
申请人: Takeshi Sakai , Toshio Miyazawa , Takuo Kaitoh , Hidekazu Miyake
发明人: Takeshi Sakai , Toshio Miyazawa , Takuo Kaitoh , Hidekazu Miyake
IPC分类号: H01L31/062
CPC分类号: H01L27/1214 , H01L29/41733 , H01L29/458 , H01L29/66765 , H01L29/78618 , H01L29/78678
摘要: A semiconductor device includes an insulating substrate and a TFT element disposed on the substrate. The TFT element includes a gate electrode, a gate insulating film, a semiconductor layer, and a source electrode and a drain electrode arranged in that order on the insulating substrate. The semiconductor layer includes an active layer composed of polycrystalline semiconductor and a contact layer segment interposed between the active layer and the source electrode and another contact layer segment interposed between the active layer and the drain electrode. The source and drain electrodes each have a first face facing the opposite face of the active layer from the interface with the gate insulating layer and a second face facing an etched side face of the active layer. Each contact layer segment is disposed between the active layer and each of the first and second faces of the source or drain electrode.
摘要翻译: 半导体器件包括绝缘基板和设置在基板上的TFT元件。 TFT元件包括在绝缘基板上依次排列的栅电极,栅极绝缘膜,半导体层以及源电极和漏电极。 半导体层包括由多晶半导体构成的有源层和介于有源层与源电极之间的接触层段,以及介于有源层和漏电极之间的另一接触层段。 源极和漏极各自具有面对与有源层的界面相对的有源层的相对面的第一面和与有源层的蚀刻侧面对置的第二面。 每个接触层段设置在源极或漏极之间的有源层和第一和第二表面中的每一个之间。
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公开(公告)号:US20090218575A1
公开(公告)日:2009-09-03
申请号:US12379662
申请日:2009-02-26
申请人: Hidekazu Miyake , Eiji Oue , Takuo Kaitoh , Toshio Miyazawa
发明人: Hidekazu Miyake , Eiji Oue , Takuo Kaitoh , Toshio Miyazawa
IPC分类号: H01L33/00 , H01L21/336
CPC分类号: H01L27/12 , H01L27/124 , H01L27/1251 , H01L27/1288 , H01L29/458 , H01L29/66765
摘要: Provided is a display device including a p-type thin film transistor formed on a substrate, in which the p-type thin film transistor includes: a gate electrode; a drain electrode; a source electrode; an insulating film; a semiconductor layer formed on a top surface of the gate electrode through the insulating film; and diffusion layers of p-type impurities formed at each of an interface between the drain electrode and the semiconductor layer and an interface between the source electrode and the semiconductor layer, the drain electrode and the source electrode being formed so as to be opposed to each other with a clearance formed therebetween on a top surface of the semiconductor layer.
摘要翻译: 提供了一种显示装置,其包括形成在基板上的p型薄膜晶体管,其中p型薄膜晶体管包括:栅电极; 漏电极; 源电极; 绝缘膜; 通过绝缘膜形成在栅电极的顶表面上的半导体层; 以及在漏电极和半导体层之间的界面处形成的p型杂质的扩散层以及源电极和半导体层之间的界面,漏电极和源电极形成为与每个 另一个在半导体层的顶表面之间形成有间隙。
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公开(公告)号:US08058654B2
公开(公告)日:2011-11-15
申请号:US12379662
申请日:2009-02-26
申请人: Hidekazu Miyake , Eiji Oue , Takuo Kaitoh , Toshio Miyazawa
发明人: Hidekazu Miyake , Eiji Oue , Takuo Kaitoh , Toshio Miyazawa
IPC分类号: H01L27/14 , H01L29/04 , H01L29/15 , H01L31/036
CPC分类号: H01L27/12 , H01L27/124 , H01L27/1251 , H01L27/1288 , H01L29/458 , H01L29/66765
摘要: Provided is a display device including a p-type thin film transistor formed on a substrate, in which the p-type thin film transistor includes: a gate electrode; a drain electrode; a source electrode; an insulating film; a semiconductor layer formed on a top surface of the gate electrode through the insulating film; and diffusion layers of p-type impurities formed at each of an interface between the drain electrode and the semiconductor layer and an interface between the source electrode and the semiconductor layer, the drain electrode and the source electrode being formed so as to be opposed to each other with a clearance formed therebetween on a top surface of the semiconductor layer.
摘要翻译: 提供了一种显示装置,其包括形成在基板上的p型薄膜晶体管,其中p型薄膜晶体管包括:栅电极; 漏电极; 源电极; 绝缘膜; 通过绝缘膜形成在栅电极的顶表面上的半导体层; 以及在漏电极和半导体层之间的界面处形成的p型杂质的扩散层以及源极和半导体层之间的界面,漏电极和源电极被形成为与每个 另一个在半导体层的顶表面之间形成有间隙。
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公开(公告)号:US07952095B2
公开(公告)日:2011-05-31
申请号:US12208371
申请日:2008-09-11
申请人: Eiji Oue , Takuo Kaitoh , Hidekazu Miyake , Toshio Miyazawa , Yuichiro Takashina
发明人: Eiji Oue , Takuo Kaitoh , Hidekazu Miyake , Toshio Miyazawa , Yuichiro Takashina
CPC分类号: H01L27/1229 , H01L27/1214 , H01L27/1274 , H01L29/66765 , H01L29/78678
摘要: In a display device of the present invention which forms thin film transistors on a substrate, the thin film transistor comprises: a silicon nitride film which is formed on the substrate in a state that the silicon nitride film covers a gate electrode; a silicon oxide film which is selectively formed on the silicon nitride film; a semiconductor layer which is formed at least on an upper surface of the silicon oxide film and includes a pseudo single crystal layer or a polycrystalline layer; and a drain electrode and a source electrode which are formed on an upper surface of the semiconductor layer by way of a contact layer, wherein either one of the pseudo single crystal layer and the poly-crystalline layer is formed by crystallizing the amorphous silicon layer, and a peripheral-side wall surface of the pseudo single crystal layer or the polycrystalline layer is contiguously constituted with a peripheral-side wall surface of the silicon oxide film below the pseudo single crystal layer or the polycrystalline layer without a stepped portion.
摘要翻译: 在本发明的在基板上形成薄膜晶体管的显示装置中,薄膜晶体管包括:在氮化硅膜覆盖栅电极的状态下在基板上形成的氮化硅膜; 选择性地形成在氮化硅膜上的氧化硅膜; 形成在所述氧化硅膜的上表面上的半导体层,其包含伪单晶层或多晶层; 以及通过接触层形成在半导体层的上表面上的漏电极和源电极,其中通过使非晶硅层结晶来形成伪单晶层和多晶层中的任一个, 并且伪单晶层或多晶层的外围侧壁表面在不具有台阶部分的伪单晶层或多晶层下方的氧化硅膜的周向侧壁表面附近构成。
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公开(公告)号:US08222645B2
公开(公告)日:2012-07-17
申请号:US12702975
申请日:2010-02-09
申请人: Katsumi Matsumoto , Hideki Nakagawa , Yoshiharu Owaku , Terunori Saitou , Toshio Miyazawa , Takahiro Kamo , Takuo Kaitoh
发明人: Katsumi Matsumoto , Hideki Nakagawa , Yoshiharu Owaku , Terunori Saitou , Toshio Miyazawa , Takahiro Kamo , Takuo Kaitoh
IPC分类号: H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20
CPC分类号: G06F3/0412 , G02F1/1362 , G02F2001/13312 , G06F3/042 , H01L27/3227 , H01L27/323 , H01L27/3269
摘要: A display device having a photosensor which exhibits excellent photoelectric conversion efficiency is provided. In a display device which forms photosensors on a substrate thereof, the photosensor is formed by sequentially stacking a gate electrode, a gate insulation film and a semiconductor layer in such an order or in an opposite order from a substrate side, and electrodes are connected to both sides of the semiconductor layer respectively, the semiconductor layer is formed of a stacked body consisting of a crystalline semiconductor layer and an amorphous semiconductor layer, and the crystalline semiconductor layer is arranged on the gate insulation film side.
摘要翻译: 提供了具有优异的光电转换效率的光传感器的显示装置。 在其基板上形成光电传感器的显示装置中,光电传感器通过依次层叠栅电极,栅极绝缘膜和半导体层,从基板侧按顺序或相反的顺序形成,电极连接到 半导体层的两侧分别由由结晶半导体层和非晶半导体层组成的层叠体形成,并且在栅极绝缘膜侧配置结晶半导体层。
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公开(公告)号:US20100096645A1
公开(公告)日:2010-04-22
申请号:US12579428
申请日:2009-10-15
申请人: Daisuke Sonoda , Toshio Miyazawa , Takuo Kaitoh , Yasukazu Kimura , Takeshi Kuriyagawa , Takeshi Noda
发明人: Daisuke Sonoda , Toshio Miyazawa , Takuo Kaitoh , Yasukazu Kimura , Takeshi Kuriyagawa , Takeshi Noda
IPC分类号: H01L33/00
CPC分类号: H01L27/1288 , H01L27/1214 , H01L27/124 , H01L27/1248
摘要: A manufacturing method of a display device and a display device which can reduce the number of times that an insulation substrate is put into a CVD device and is taken out from the CVD device are provided. The manufacturing method of a display device includes the steps of forming a conductive layer including first electrode films and second electrode films, a first insulation layer, semiconductor films, a second insulation layer and a protective layer on an insulation substrate; forming first resist films having a predetermined thickness which are arranged in first regions above the semiconductor films, opening portions which are arranged in second regions above the second electrode films and second resist films having a large thickness which are arranged in regions other than the first regions and the second regions on the protective layer; etching portions below the second regions, removing the first resist films by ashing; forming first holes which reach the semiconductor films below the first regions and second holes which reach the second electrode films below the second regions; removing the second resist films, and forming lines which are connected to the semiconductor films and lines which are connected to the second electrode films.
摘要翻译: 提供了可以减少将绝缘基板放入CVD装置并从CVD装置中取出的次数的显示装置和显示装置的制造方法。 显示装置的制造方法包括在绝缘基板上形成包括第一电极膜和第二电极膜的导电层,第一绝缘层,半导体膜,第二绝缘层和保护层的步骤; 形成具有预定厚度的第一抗蚀剂膜,其布置在半导体膜上方的第一区域中,布置在第二电极膜上方的第二区域中的开口部分和布置在除了第一区域之外的区域中的具有大厚度的第二抗蚀剂膜 和保护层上的第二区域; 蚀刻第二区域下方的部分,通过灰化去除第一抗蚀剂膜; 形成在第一区域下方到达半导体膜的第一孔和在第二区域下方到达第二电极膜的第二孔; 去除第二抗蚀剂膜,以及形成连接到半导体膜的线和连接到第二电极膜的线。
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