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    Semiconductor device and method of manufacturing the semiconductor device
    2.
    发明授权
    Semiconductor device and method of manufacturing the semiconductor device 有权
    半导体装置及其制造方法

    公开(公告)号：US07365386B2

    公开(公告)日：2008-04-29

    申请号：US10649667

    申请日：2003-08-28

    申请人： Tatsuya Arao ,  Hideomi Suzawa

    发明人： Tatsuya Arao ,  Hideomi Suzawa

    IPC分类号： H01L29/76

    CPC分类号： G02F1/13454 ,  G02F1/136213 ,  H01L27/124 ,  H01L27/1255

    摘要： A semiconductor device having improved reliability is provided. The semiconductor device has a pixel portion. The pixel portion has a TFT and a storage capacitor. The TFT and the storage capacitor has a semiconductor layer which includes first and second regions formed continuously. The TFT has the first region of the semiconductor layer including a channel forming region, a source region and a drain region located outside the channel forming region, a gate insulating film adjacent to the first region of the semiconductor layer, and a gate electrode formed on the gate insulating film. The storage capacitor has the second region of the semiconductor layer, an insulating film formed adjacent to the second region of the semiconductor layer, and a capacitor wiring formed on the insulating film. The second region of the semiconductor layer contains an impurity element for imparting n-type or p-type conductivity. The thickness of the insulating film adjacent to the second region of the semiconductor layer is thinner than that of the film on the region in which the TFT is formed.

    摘要翻译： 提供了具有可靠性提高的半导体器件。 半导体器件具有像素部分。 像素部分具有TFT和存储电容器。 TFT和存储电容器具有包括连续形成的第一和第二区域的半导体层。 TFT具有半导体层的第一区域，包括位于沟道形成区域外的沟道形成区域，源区域和漏极区域，与半导体层的第一区域相邻的栅极绝缘膜，以及形成在 栅极绝缘膜。 存储电容器具有半导体层的第二区域，与半导体层的第二区域相邻形成的绝缘膜，以及形成在绝缘膜上的电容器布线。 半导体层的第二区域包含用于赋予n型或p型导电性的杂质元素。 与半导体层的第二区域相邻的绝缘膜的厚度比形成TFT的区域的膜的厚度薄。

    Semiconductor device with tapered gate and insulating film
    3.
    发明授权
    Semiconductor device with tapered gate and insulating film 有权
    具有锥形栅极和绝缘膜的半导体器件

    公开(公告)号：US06646287B1

    公开(公告)日：2003-11-11

    申请号：US09714891

    申请日：2000-11-17

    申请人： Koji Ono ,  Hideomi Suzawa ,  Tatsuya Arao

    发明人： Koji Ono ,  Hideomi Suzawa ,  Tatsuya Arao

    IPC分类号： H01L29786

    CPC分类号： H01L27/1222 ,  G02F1/13624 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/127 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L33/08 ,  H01L33/62 ,  H01L2029/7863 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In a semiconductor device, typically an active matrix display device, the structure of TFTs arranged in the respective circuits are made suitable in accordance with the function of the circuit, and along with improving the operating characteristics and the reliability of the semiconductor device, the manufacturing cost is reduced and the yield is increased by reducing the number of process steps. A semiconductor device has a semiconductor layer, an insulating film formed contacting the semiconductor layer, and a gate electrode having a tapered portion on the insulating film, in the semiconductor device, the semiconductor layer has a channel forming region, a first impurity region for forming a source region or a drain region and containing a single conductivity type impurity element, and a second impurity region for forming an LDD region contacting the channel forming region, a portion of the second impurity region is formed overlapping a gate electrode, and the concentration of the single conductivity type impurity element contained in the second impurity region becomes larger with distance from the channel forming region.

    摘要翻译： 在半导体器件（通常为有源矩阵显示器件）中，根据电路的功能，布置在各个电路中的TFT的结构是合适的，并且随着半导体器件的工作特性和可靠性的提高，制造 降低成本，并通过减少工艺步骤的数量来提高产量。 半导体器件具有半导体层，与半导体层接触形成的绝缘膜和在绝缘膜上具有锥形部分的栅电极，在半导体器件中，半导体层具有沟道形成区，形成第一杂质区 源极区域或漏极区域，并且包含单一导电型杂质元素，以及用于形成与沟道形成区域接触的LDD区域的第二杂质区域，第二杂质区域的一部分与栅电极重叠，并且浓度 包含在第二杂质区域中的单一导电型杂质元素随着与沟道形成区域的距离而变大。

    Semiconductor device and manufacturing method thereof
    5.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US08470647B2

    公开(公告)日：2013-06-25

    申请号：US11620576

    申请日：2007-01-05

    申请人： Hideomi Suzawa ,  Koji Ono ,  Toru Takayama ,  Tatsuya Arao ,  Shunpei Yamazaki

    发明人： Hideomi Suzawa ,  Koji Ono ,  Toru Takayama ,  Tatsuya Arao ,  Shunpei Yamazaki

    IPC分类号： H01L21/84

    CPC分类号： H01L27/124 ,  H01L21/32136 ,  H01L27/1214 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78684 ,  H01L2029/7863

    摘要： There has been a problem that the manufacturing process is complicated and the number of processes is increased when a TFT with an LDD structure or a TFT with a GOLD structure is formed. In a method of manufacturing a semiconductor device, after low concentration impurity regions (24, 25) are formed in a second doping process, a width of the low concentration impurity region which is overlapped with the third electrode (18c) and a width of the low concentration impurity region which is not overlapped with the third electrode can be freely controlled by a fourth etching process. Thus, in a region overlapped with the third electrode, a relaxation of electric field concentration is achieved and then a hot carrier injection can be prevented. And, in the region which is not overlapped with the third electrode, the off-current value can be suppressed.

    摘要翻译： 当形成具有LDD结构的TFT或具有GOLD结构的TFT时，存在制造过程复杂并且处理次数增加的问题。 在制造半导体器件的方法中，在第二掺杂工艺中形成低浓度杂质区（24,25）之后，与第三电极（18c）重叠的低浓度杂质区的宽度和 不与第三电极重叠的低浓度杂质区域可以通过第四蚀刻工艺自由地控制。 因此，在与第三电极重叠的区域中，实现电场浓度的松弛，然后可以防止热载流子注入。 并且，在不与第三电极重叠的区域中，可以抑制截止电流值。

    Semiconductor device and method of manufacturing the same
    8.
    发明申请
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US20060270123A1

    公开(公告)日：2006-11-30

    申请号：US11498168

    申请日：2006-08-03

    申请人： Tatsuya Arao ,  Hideomi Suzawa

    发明人： Tatsuya Arao ,  Hideomi Suzawa

    IPC分类号： H01L21/84 ,  H01L21/00

    CPC分类号： H01L29/4908 ,  G02F1/13458 ,  G02F1/136213 ,  G02F1/136286 ,  G02F2001/136231 ,  H01L27/124 ,  H01L27/1288

    摘要： To realize the reduction of a manufacturing cost and the enhancement of yield by reducing the number of steps of a TFT in an electro-optical device typified by an active matrix liquid crystal display device. A semiconductor device of the present invention is characterized by including a first wiring and a second wiring formed of a first conductive film on the same insulating surface, a first semiconductor film of one conductivity type formed on the first and second wirings so as to correspond thereto, a second semiconductor film formed on an upper layer of the first semiconductor film of one conductivity type across the first wiring and the second wiring, an insulating film formed on the second semiconductor film, and a third conductive film formed on the insulating film.

    摘要翻译： 通过减少以有源矩阵液晶显示装置为代表的电光装置中的TFT的台阶数来实现制造成本的降低和产量的提高。 本发明的半导体器件的特征在于，在同一绝缘表面上包括由第一导电膜形成的第一布线和第二布线，形成在第一布线和第二布线上的一种导电类型的第一半导体膜，以便与其对应 形成在第一布线和第二布线上的一种导电类型的第一半导体膜的上层上的第二半导体膜，形成在第二半导体膜上的绝缘膜和形成在绝缘膜上的第三导电膜。

    Method of manufacturing semiconductor device
    9.
    发明授权
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US06933184B2

    公开(公告)日：2005-08-23

    申请号：US10622584

    申请日：2003-07-21

    申请人： Tatsuya Arao ,  Hideomi Suzawa ,  Koji Ono ,  Toru Takayama

    发明人： Tatsuya Arao ,  Hideomi Suzawa ,  Koji Ono ,  Toru Takayama

    IPC分类号： H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/423 ,  H01L29/786

    CPC分类号： H01L27/1259 ,  H01L27/1214 ,  H01L27/127 ,  H01L29/42384 ,  H01L29/78621 ,  H01L29/78627 ,  H01L2029/7863

    摘要： Conventionally, when a TFT provided with an LDD structure or a TFT provided with a GOLD structure is to be formed, there is a problem in that the manufacturing process becomes complicated, which leads to the increase in the number of steps. An electrode formed of a lamination of a first conductive layer (18b) and a second conductive layer (17c), which have different widths from each other, is formed. After the first conductive layer (18b) is selectively etched to form a first conductive layer (18c), a low concentration impurity region (25a) overlapping the first conductive layer (18c) and a low concentration impurity region (25b) not overlapping the first conductive layer 18c are formed by doping an impurity element at a low concentration.

    摘要翻译： 通常，当形成设置有LDD结构的TFT或具有GOLD结构的TFT时，存在制造过程变得复杂的问题，导致步骤数增加。 形成由彼此具有不同宽度的第一导电层（18b）和第二导电层（17c）的叠层形成的电极。 在选择性蚀刻第一导电层（18b）以形成第一导电层（18c）之后，与第一导电层（18c）和低浓度杂质区域（25b）重叠的低浓度杂质区域（25a） ）不是通过以低浓度掺杂杂质元素形成第一导电层18c。

    Semiconductor device
    10.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US06774397B2

    公开(公告)日：2004-08-10

    申请号：US09826416

    申请日：2001-04-05

    申请人： Tatsuya Arao ,  Hideomi Suzawa

    发明人： Tatsuya Arao ,  Hideomi Suzawa

    IPC分类号： H01L2904

    CPC分类号： H01L29/4908 ,  G02F1/13458 ,  G02F1/136213 ,  G02F1/136286 ,  G02F2001/136231 ,  H01L27/124 ,  H01L27/1288

    摘要： To realize the reduction of a manufacturing cost and the enhancement of yield by reducing the number of steps of a TFT in an electro-optical device typified by an active matrix liquid crystal display device. A semiconductor device of the present invention is characterized by including a first wiring and a second wiring formed of a first conductive film on the same insulating surface, a first semiconductor film of one conductivity type formed on the first and second wirings so as to correspond thereto, a second semiconductor film formed on an upper layer of the first semiconductor film of one conductivity type across the first wiring and the second wiring, an insulating film formed on the second semiconductor film, and a third conductive film formed on the insulating film.

    摘要翻译： 通过减少以有源矩阵液晶显示装置为代表的电光装置中的TFT的台阶数来实现制造成本的降低和产量的提高。 本发明的半导体器件的特征在于，在同一绝缘表面上包括由第一导电膜形成的第一布线和第二布线，形成在第一布线和第二布线上的一种导电类型的第一半导体膜，以便与其对应 形成在第一布线和第二布线上的一种导电类型的第一半导体膜的上层上的第二半导体膜，形成在第二半导体膜上的绝缘膜和形成在绝缘膜上的第三导电膜。