公开(公告)号：US20110303969A1

公开(公告)日：2011-12-15

申请号：US13052177

申请日：2011-03-21

申请人： Tetsuya KAI ,  Yoshio Ozawa ,  Ryota Fujitsuka ,  Yoshitaka Tsunashima

发明人： Tetsuya KAI ,  Yoshio Ozawa ,  Ryota Fujitsuka ,  Yoshitaka Tsunashima

IPC分类号： H01L29/792 ,  H01L21/20

CPC分类号： H01L29/66666 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： According to one embodiment, a semiconductor memory device with memory cells each composed of a vertical transistor, comprises a silicon layer formed into a columnar shape on a silicon substrate, a gate insulating film part in which a tunnel insulating film, a charge storage layer, and a block insulating film are formed to surround the sidewall surface of the silicon layer, and a stacked structure part formed to surround the sidewall surface of the gate insulating film part and in which a plurality of interlayer insulating films and a plurality of control gate electrode layers are stacked alternately. The silicon layer, gate insulating film part, and control gate electrode layer constitute the vertical transistor. The charge storage layer has a region lower in trap level than a region facing the control gate electrode layer between the vertical transistors.

摘要翻译： 根据一个实施例，具有每个由垂直晶体管组成的存储单元的半导体存储器件包括在硅衬底上形成为柱状的硅层，其中隧道绝缘膜，电荷存储层， 并且形成块状绝缘膜以包围硅层的侧壁表面，以及堆叠结构部分，其形成为围绕栅极绝缘膜部分的侧壁表面，并且其中多个层间绝缘膜和多个控制栅电极 层交替堆叠。 硅层，栅极绝缘膜部分和控制栅极电极层构成垂直晶体管。 电荷存储层的陷阱水平低于垂直晶体管之间的面对控制栅极电极层的区域。

公开(公告)号：US08796757B2

公开(公告)日：2014-08-05

申请号：US13052177

申请日：2011-03-21

申请人： Tetsuya Kai ,  Yoshio Ozawa ,  Ryota Fujitsuka ,  Yoshitaka Tsunashima

发明人： Tetsuya Kai ,  Yoshio Ozawa ,  Ryota Fujitsuka ,  Yoshitaka Tsunashima

IPC分类号： H01L29/792

CPC分类号： H01L29/66666 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： According to one embodiment, a semiconductor memory device with memory cells each composed of a vertical transistor, comprises a silicon layer formed into a columnar shape on a silicon substrate, a gate insulating film part in which a tunnel insulating film, a charge storage layer, and a block insulating film are formed to surround the sidewall surface of the silicon layer, and a stacked structure part formed to surround the sidewall surface of the gate insulating film part and in which a plurality of interlayer insulating films and a plurality of control gate electrode layers are stacked alternately. The silicon layer, gate insulating film part, and control gate electrode layer constitute the vertical transistor. The charge storage layer has a region lower in trap level than a region facing the control gate electrode layer between the vertical transistors.

摘要翻译： 根据一个实施例，具有每个由垂直晶体管组成的存储单元的半导体存储器件包括在硅衬底上形成为柱状的硅层，其中隧道绝缘膜，电荷存储层， 并且形成块状绝缘膜以包围硅层的侧壁表面，以及堆叠结构部分，其形成为围绕栅极绝缘膜部分的侧壁表面，并且其中多个层间绝缘膜和多个控制栅电极 层交替堆叠。 硅层，栅极绝缘膜部分和控制栅极电极层构成垂直晶体管。 电荷存储层的陷阱水平低于垂直晶体管之间的面对控制栅极电极层的区域。

公开(公告)号：US08450715B2

公开(公告)日：2013-05-28

申请号：US12884000

申请日：2010-09-16

申请人： Kensuke Takano ,  Katsuyuki Sekine ,  Yoshio Ozawa ,  Ryota Fujitsuka ,  Mitsuru Sato

发明人： Kensuke Takano ,  Katsuyuki Sekine ,  Yoshio Ozawa ,  Ryota Fujitsuka ,  Mitsuru Sato

IPC分类号： H01L45/00

CPC分类号： H01L45/08 ,  G11C13/0007 ,  G11C2213/32 ,  G11C2213/71 ,  G11C2213/72 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/165 ,  H01L45/1675

摘要： According to one embodiment, a nonvolatile memory device includes a plurality of nonvolatile memory elements each of that includes a resistance change film. The resistance change film is capable of recording information by transitioning between a plurality of states having different resistances in response to at least one of a voltage applied to the resistance change film or a current passed through the resistance change film, and the resistance change film includes an oxide containing at least one element selected from the group consisting of Hf, Zr, Ni, Ta, W, Co, Al, Fe, Mn, Cr, and Nb. An impurity element contained in the resistance change film is at least one element selected from the group consisting of Mg, Ca, Sr, Ba, Sc, Y, La, V, Ta, B, Ga, In, Tl, C, Si, Ge, Sn, Pb, N, P, As, Sb, Bi, S, Se, and Te, and the impurity element has an absolute value of standard Gibbs energy of oxide formation larger than an absolute value of standard Gibbs energy of oxide formation of the element contained in the oxide.

摘要翻译： 根据一个实施例，非易失性存储器件包括多个非易失性存储元件，每个非易失性存储元件包括电阻变化膜。 电阻变化膜能够响应于施加到电阻变化膜的电压或通过电阻变化膜的电流中的至少一个而在具有不同电阻的多个状态之间进行转换来记录信息，并且电阻变化膜包括 包含选自Hf，Zr，Ni，Ta，W，Co，Al，Fe，Mn，Cr和Nb中的至少一种元素的氧化物。 包含在电阻变化膜中的杂质元素是选自Mg，Ca，Sr，Ba，Sc，Y，La，V，Ta，B，Ga，In，Tl，C，Si中的至少一种元素， Ge，Sn，Pb，N，P，As，Sb，Bi，S，Se和Te，并且杂质元素的氧化物形成的标准吉布斯能量的绝对值大于氧化物形成的标准吉布斯能量的绝对值 的氧化物中所含的元素。

公开(公告)号：US08411486B2

公开(公告)日：2013-04-02

申请号：US12823467

申请日：2010-06-25

申请人： Katsuyuki Sekine ,  Ryota Fujitsuka ,  Yoshio Ozawa

发明人： Katsuyuki Sekine ,  Ryota Fujitsuka ,  Yoshio Ozawa

IPC分类号： G11C11/00

CPC分类号： G11C13/0069 ,  G11C11/005 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/0064 ,  G11C2013/0083 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/72 ,  H01L27/101

摘要： According to one embodiment, there is provided a method of manufacturing a nonvolatile memory device. In this method, a first voltage may be applied to a variable resistive element having a resistance value which is electrically rewritable in a high resistance and in a low resistance. In this method, a second voltage may be applied to the variable resistive element in a case where the resistance value of the variable resistive element to which the first voltage has been applied is greater than a resistance value of the low resistance and is not greater than a resistance value of the high resistance. Further, in this method, the applying of the second voltage to the variable resistive element may be repeated until the resistance value of the variable resistive element to which the second voltage has been applied falls within a range of the resistance value of the low resistance.

摘要翻译： 根据一个实施例，提供了一种制造非易失性存储器件的方法。 在该方法中，可以将第一电压施加到具有电阻可变的电阻值的高电阻和低电阻的可变电阻元件。 在该方法中，在施加了第一电压的可变电阻元件的电阻值大于低电阻的电阻值的情况下，可以向可变电阻元件施加第二电压，并且不大于 电阻值为高电阻。 此外，在该方法中，可以重复向可变电阻元件施加第二电压，直到施加了第二电压的可变电阻元件的电阻值落在低电阻的电阻值的范围内。

公开(公告)号：US08278696B2

公开(公告)日：2012-10-02

申请号：US12425077

申请日：2009-04-16

申请人： Yoshio Ozawa ,  Ryota Fujitsuka

发明人： Yoshio Ozawa ,  Ryota Fujitsuka

IPC分类号： H01L29/788

CPC分类号： H01L27/11568 ,  H01L29/513 ,  H01L29/78

摘要： A semiconductor device includes a tunnel insulating film formed on a semiconductor substrate, a charge storage insulating film formed on the tunnel insulating film and including at least two separated low oxygen concentration portions and a high oxygen concentration portion positioned between the adjacent low oxygen concentration portions and having a higher oxygen concentration than the low oxygen concentration portions, a charge block insulating film formed on the charge storage insulating film, and control gate electrodes formed on the charge block insulating film and above the low oxygen concentration portions.

摘要翻译： 半导体器件包括形成在半导体衬底上的隧道绝缘膜，形成在隧道绝缘膜上的电荷存储绝缘膜，并且包括至少两个分离的低氧浓度部分和位于相邻低氧浓度部分之间的高氧浓度部分，以及 具有比低氧浓度部分更高的氧浓度，形成在电荷存储绝缘膜上的电荷块绝缘膜，以及形成在充电块绝缘膜上和低氧浓度部分上方的控制栅电极。

公开(公告)号：US20120112263A1

公开(公告)日：2012-05-10

申请号：US13351965

申请日：2012-01-17

申请人： Masayuki Tanaka ,  Daikuse Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

发明人： Masayuki Tanaka ,  Daikuse Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

IPC分类号： H01L29/788

CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/7883

摘要： A semiconductor device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, the second insulating film including a lower silicon nitride film, a lower silicon oxide film formed on the lower silicon nitride film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, an upper silicon oxide film formed on the intermediate insulating film, and an upper silicon nitride film formed on the upper silicon oxide film.

摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极 ，所述第二绝缘膜包括下氮化硅膜，形成在所述下氮化硅膜上的下氧化硅膜，形成在所述下氧化硅膜上并含有金属元素的中间绝缘膜，所述中间绝缘膜具有相对电介质 大于7的常数，形成在中间绝缘膜上的上部氧化硅膜和形成在上部氧化硅膜上的上部氮化硅膜。

公开(公告)号：US20110068316A1

公开(公告)日：2011-03-24

申请号：US12884000

申请日：2010-09-16

申请人： Kensuke TAKANO ,  Katsuyuki Sekine ,  Yoshio Ozawa ,  Ryota Fujitsuka ,  Mitsuru Sato

发明人： Kensuke TAKANO ,  Katsuyuki Sekine ,  Yoshio Ozawa ,  Ryota Fujitsuka ,  Mitsuru Sato

IPC分类号： H01L45/00

CPC分类号： H01L45/08 ,  G11C13/0007 ,  G11C2213/32 ,  G11C2213/71 ,  G11C2213/72 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/165 ,  H01L45/1675

摘要： According to one embodiment, a nonvolatile memory device includes a plurality of nonvolatile memory elements each of that includes a resistance change film. The resistance change film is capable of recording information by transitioning between a plurality of states having different resistances in response to at least one of a voltage applied to the resistance change film or a current passed through the resistance change film, and the resistance change film includes an oxide containing at least one element selected from the group consisting of Hf, Zr, Ni, Ta, W, Co, Al, Fe, Mn, Cr, and Nb. An impurity element contained in the resistance change film is at least one element selected from the group consisting of Mg, Ca, Sr, Ba, Sc, Y, La, V, Ta, B, Ga, In, Tl, C, Si, Ge, Sn, Pb, N, P, As, Sb, Bi, S, Se, and Te, and the impurity element has an absolute value of standard Gibbs energy of oxide formation larger than an absolute value of standard Gibbs energy of oxide formation of the element contained in the oxide.

摘要翻译： 根据一个实施例，非易失性存储器件包括多个非易失性存储元件，每个非易失性存储元件包括电阻变化膜。 电阻变化膜能够响应于施加到电阻变化膜的电压或通过电阻变化膜的电流中的至少一个而在具有不同电阻的多个状态之间进行转换来记录信息，并且电阻变化膜包括 包含选自Hf，Zr，Ni，Ta，W，Co，Al，Fe，Mn，Cr和Nb中的至少一种元素的氧化物。 包含在电阻变化膜中的杂质元素是选自Mg，Ca，Sr，Ba，Sc，Y，La，V，Ta，B，Ga，In，Tl，C，Si中的至少一种元素， Ge，Sn，Pb，N，P，As，Sb，Bi，S，Se和Te，并且杂质元素的氧化物形成的标准吉布斯能量的绝对值大于氧化物形成的标准吉布斯能量的绝对值 的氧化物中所含的元素。

公开(公告)号：US07635890B2

公开(公告)日：2009-12-22

申请号：US11783934

申请日：2007-04-13

申请人： Yoshio Ozawa ,  Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka

发明人： Yoshio Ozawa ,  Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka

IPC分类号： H01L29/76

CPC分类号： H01L29/7883 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

摘要： A semiconductor device includes a semiconductor substrate, a plurality of nonvolatile memory cells provided on the semiconductor substrate, each of the plurality of nonvolatile memory cells comprising a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a control gate electrode provided above the charge storage layer, a second insulating film provided between the control gate electrode and the charge storage layer, the second insulating film between adjacent charge storage layers including a first region having permittivity lower than that of the second insulating film on a top surface of the charge storage layer in a cross-section view of a channel width direction of the nonvolatile memory cell, and the first region having composition differing from that of the second insulating film on the top surface of the charge storage layer.

摘要翻译： 半导体器件包括半导体衬底，设置在半导体衬底上的多个非易失性存储单元，所述多个非易失性存储单元中的每一个包括设置在所述半导体衬底上的第一绝缘膜，设置在所述第一绝缘膜上的电荷存储层， 设置在所述电荷存储层上方的控制栅电极，设置在所述控制栅电极和所述电荷存储层之间的第二绝缘膜，所述相邻电荷存储层之间的所述第二绝缘膜包括具有低于所述第二绝缘膜的介电常数的第一区域 在电荷存储层的顶表面上，以非易失性存储单元的沟道宽度方向的横截面视图，并且第一区域具有与电荷存储层的顶表面上的第二绝缘膜不同的组成。

公开(公告)号：US20080197403A1

公开(公告)日：2008-08-21

申请号：US12026942

申请日：2008-02-06

申请人： Yoshio OZAWA ,  Akihito Yamamoto ,  Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka

发明人： Yoshio OZAWA ,  Akihito Yamamoto ,  Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka

IPC分类号： H01L27/115

CPC分类号： H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/512 ,  H01L29/513 ,  H01L29/66825 ,  H01L29/7881

摘要： A semiconductor device includes a semiconductor substrate, and nonvolatile memory cells, each of the cells including a channel region having a channel length and a channel width, a tunnel insulating film, a floating gate electrode, a control gate electrode, an inter-electrode insulating film between the floating and control gate electrodes, and an electrode side-wall insulating film on side-wall surfaces of the floating and control gate electrodes, the electrode side-wall insulating film including first and second insulating films having first and second dielectric constants, the first dielectric constant being higher than the second dielectric constant, the second dielectric constant being higher than a dielectric constant of a silicon nitride film, the first insulating film being in a central region of a facing region between the floating and control gate electrodes, the second insulating region being in the both end regions of the facing region and protruding from the both end portions.

摘要翻译： 半导体器件包括半导体衬底和非易失性存储单元，每个单元包括具有沟道长度和沟道宽度的沟道区，隧道绝缘膜，浮栅电极，控制栅电极，电极间绝缘 在浮置控制栅电极和控制栅极电极的侧壁表面之间的电极侧壁绝缘膜，电极侧壁绝缘膜包括具有第一和第二介电常数的第一和第二绝缘膜， 所述第一介电常数高于所述第二介电常数，所述第二介电常数高于氮化硅膜的介电常数，所述第一绝缘膜位于所述浮动栅极和控制栅电极之间的面对区域的中心区域中， 第二绝缘区域位于面对区域的两端区域中并从两端口突出 ons。

公开(公告)号：US20080014745A1

公开(公告)日：2008-01-17

申请号：US11727981

申请日：2007-03-29

申请人： Ryota Fujitsuka ,  Katsuaki Natori ,  Daisuke Nishida ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Yoshio Ozawa ,  Akihito Yamamoto

发明人： Ryota Fujitsuka ,  Katsuaki Natori ,  Daisuke Nishida ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Yoshio Ozawa ,  Akihito Yamamoto

IPC分类号： H01L21/44

CPC分类号： H01L21/31608 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28273 ,  H01L21/3141 ,  H01L21/3162 ,  H01L21/31641 ,  H01L21/31645 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/66825

摘要： A method of manufacturing a semiconductor device comprising a first insulating film formed on a semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, forming the second insulating film comprises forming a lower insulating film containing oxygen and a metal element, thermally treating the lower insulating film in an atmosphere containing oxidizing gas, and forming an upper insulating film on the thermally treated lower insulating film using film forming gas containing at least one of hydrogen and chlorine.

摘要翻译： 一种制造半导体器件的方法，包括形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极 形成第二绝缘膜包括形成含有氧和金属元素的下绝缘膜，在含氧化气体的气氛中对下绝缘膜进行热处理，并且在热处理的下绝缘膜上形成上绝缘膜，使用含有 氢和氯中的至少一种。