公开(公告)号：US08623681B2

公开(公告)日：2014-01-07

申请号：US13808375

申请日：2011-07-01

申请人： Yoshiki Nakatani ,  Yuhichi Saitoh ,  Tetsuya Okamoto ,  Yohsuke Kanzaki ,  Yudai Takanishi

发明人： Yoshiki Nakatani ,  Yuhichi Saitoh ,  Tetsuya Okamoto ,  Yohsuke Kanzaki ,  Yudai Takanishi

IPC分类号： H01L21/00

CPC分类号： H01L27/1255 ,  G02F1/136213 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/133397 ,  G02F2001/13606 ,  G02F2001/136236 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1288

摘要： An auxiliary capacitor (6a) includes a capacitor line (11ba), a gate insulating film (12) provided so as to cover the capacitor line (11ba), a semiconductor layer (13b) provided on the gate insulating film (12) so as to overlap with the capacitor line (11b), and a drain electrode (14ba) provided on the semiconductor layer (13b) and connected to a pixel electrode (16a). The semiconductor layer (13b) made of an oxide semiconductor and the pixel electrode (16a) made of an oxide conductor contact each other.

摘要翻译： 辅助电容器（6a）包括电容器线（11ba），设置为覆盖电容器线（11ba）的栅极绝缘膜（12），设置在栅极绝缘膜（12）上的半导体层（13b） 与电容器线（11b）重叠，以及设置在半导体层（13b）上并连接到像素电极（16a）的漏电极（14ba）。 由氧化物半导体构成的半导体层（13b）和由氧化物导体构成的像素电极（16a）彼此接触。

公开(公告)号：US09196742B2

公开(公告)日：2015-11-24

申请号：US13813839

申请日：2011-07-28

申请人： Yohsuke Kanzaki ,  Yuhichi Saitoh ,  Yoshiki Nakatani ,  Tetsuya Okamoto ,  Yudai Takanishi

发明人： Yohsuke Kanzaki ,  Yuhichi Saitoh ,  Yoshiki Nakatani ,  Tetsuya Okamoto ,  Yudai Takanishi

IPC分类号： H01L29/786 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/66

CPC分类号： H01L29/7869 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1288 ,  H01L29/66742 ,  H01L29/66969

摘要： A TFT substrate (20a) includes a plurality of pixel electrodes (17a) provided in a matrix, a plurality of TFTs (5) each provided for a corresponding one of the pixel electrodes (17a), and a plurality of auxiliary capacitors (6a) each provided for a corresponding one of the pixel electrodes (17a). Each of the auxiliary capacitors (6a) includes a capacitor line (11b) made of a material identical to that of the gate electrode (11aa) of the TFT (5) and provided in a layer identical to that of the gate electrode (11aa) of the TFT (5), the gate insulating film (12) provided so as to cover the capacitor line (11b), and a corresponding one of the pixel electrodes (17a) provided on the gate insulating film (12) so as to overlap with the capacitor line (11b) and being in conduction with a drain electrode (14ca).

摘要翻译： TFT基板（20a）包括以矩阵形式设置的多个像素电极（17a），分别设置在相应的像素电极（17a）中的多个TFT（5）和多个辅助电容器（6a） 每个设置用于相应的一个像素电极（17a）。 每个辅助电容器（6a）包括由与TFT（5）的栅电极（11aa）相同的材料制成并且设置在与栅电极（11aa）相同的层中的电容器线（11b） 设置为覆盖电容线（11b）的TFT（5），栅极绝缘膜（12）和设置在栅极绝缘膜（12）上的相应的像素电极（17a）重叠 与电容器线（11b）并且与漏电极（14ca）导通。

公开(公告)号：US20130215370A1

公开(公告)日：2013-08-22

申请号：US13817246

申请日：2011-05-11

申请人： Yudai Takanishi ,  Yohsuke Kanzaki ,  Tetsuya Okamoto ,  Yuhichi Saitoh ,  Yoshiki Nakatani

发明人： Yudai Takanishi ,  Yohsuke Kanzaki ,  Tetsuya Okamoto ,  Yuhichi Saitoh ,  Yoshiki Nakatani

IPC分类号： G02F1/1362 ,  H01L33/00

CPC分类号： G02F1/136227 ,  G02F1/13458 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/45 ,  H01L29/7869 ,  H01L33/0041

摘要： A thin film transistor substrate (20) includes: an insulating substrate (10a); a gate insulating layer (12) provided on the insulating substrate (10a); a connection layer (25) provided on the gate insulating layer (12), and made of indium gallium zinc oxide (IGZO); a drain electrode (16b) provided on the connection layer (25), and made of titanium; a contact hole (Ca) formed in the connection layer (25) and the drain electrode (16b); and a pixel electrode (19a) provided on a surface of the contact hole (Ca), and contacting the connection layer (25). The drain electrode (16b) and the pixel electrode (19a) are electrically connected together through the connection layer (25).

摘要翻译： 薄膜晶体管基板（20）包括：绝缘基板（10a）; 设置在绝缘基板（10a）上的栅绝缘层（12）; 设置在所述栅极绝缘层（12）上并由铟镓锌氧化物（IGZO）制成的连接层（25）; 设置在所述连接层（25）上并由钛制成的漏电极（16b） 形成在连接层（25）和漏电极（16b）中的接触孔（Ca）; 以及设置在所述接触孔（Ca）的表面上并与所述连接层（25）接触的像素电极（19a）。 漏极电极（16b）和像素电极（19a）通过连接层（25）电连接在一起。

公开(公告)号：US20140028944A1

公开(公告)日：2014-01-30

申请号：US13813839

申请日：2011-07-28

申请人： Yohsuke Kanzaki ,  Yuhichi Saitoh ,  Yoshiki Nakatani ,  Tetsuya Okamoto ,  Yudai Takanishi

发明人： Yohsuke Kanzaki ,  Yuhichi Saitoh ,  Yoshiki Nakatani ,  Tetsuya Okamoto ,  Yudai Takanishi

IPC分类号： H01L29/786 ,  G02F1/1368 ,  H01L29/66

CPC分类号： H01L29/7869 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1288 ,  H01L29/66742 ,  H01L29/66969

摘要： A TFT substrate (20a) includes a plurality of pixel electrodes (17a) provided in a matrix, a plurality of TFTs (5) each provided for a corresponding one of the pixel electrodes (17a), and a plurality of auxiliary capacitors (6a) each provided for a corresponding one of the pixel electrodes (17a). Each of the auxiliary capacitors (6a) includes a capacitor line (11b) made of a material identical to that of the gate electrode (11aa) of the TFT (5) and provided in a layer identical to that of the gate electrode (11aa) of the TFT (5), the gate insulating film (12) provided so as to cover the capacitor line (11b), and a corresponding one of the pixel electrodes (17a) provided on the gate insulating film (12) so as to overlap with the capacitor line (11b) and being in conduction with a drain electrode (14ca).

摘要翻译： TFT基板（20a）包括以矩阵形式设置的多个像素电极（17a），分别设置在相应的像素电极（17a）中的多个TFT（5）和多个辅助电容器（6a） 每个设置用于相应的一个像素电极（17a）。 每个辅助电容器（6a）包括由与TFT（5）的栅电极（11aa）相同的材料制成并且设置在与栅电极（11aa）相同的层中的电容器线（11b） 设置为覆盖电容线（11b）的TFT（5），栅极绝缘膜（12）和设置在栅极绝缘膜（12）上的相应的像素电极（17a）重叠 与电容器线（11b）并且与漏电极（14ca）导通。

公开(公告)号：US20130214272A1

公开(公告)日：2013-08-22

申请号：US13808375

申请日：2011-07-01

申请人： Yoshiki Nakatani ,  Yuhichi Saitoh ,  Tetsuya Okamoto ,  Yohsuke Kanzaki ,  Yudai Takanishi

发明人： Yoshiki Nakatani ,  Yuhichi Saitoh ,  Tetsuya Okamoto ,  Yohsuke Kanzaki ,  Yudai Takanishi

IPC分类号： H01L27/12

CPC分类号： H01L27/1255 ,  G02F1/136213 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/133397 ,  G02F2001/13606 ,  G02F2001/136236 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1288

摘要： An auxiliary capacitor (6a) includes a capacitor line (11ba), a gate insulating film (12) provided so as to cover the capacitor line (11ba), a semiconductor layer (13b) provided on the gate insulating film (12) so as to overlap with the capacitor line (11b), and a drain electrode (14ba) provided on the semiconductor layer (13b) and connected to a pixel electrode (16a). The semiconductor layer (13b) made of an oxide semiconductor and the pixel electrode (16a) made of an oxide conductor contact each other.

摘要翻译： 辅助电容器（6a）包括电容器线（11ba），设置为覆盖电容器线（11ba）的栅极绝缘膜（12），设置在栅极绝缘膜（12）上的半导体层（13b） 与电容器线（11b）重叠，以及设置在半导体层（13b）上并连接到像素电极（16a）的漏电极（14ba）。 由氧化物半导体构成的半导体层（13b）和由氧化物导体构成的像素电极（16a）彼此接触。

公开(公告)号：US20130208207A1

公开(公告)日：2013-08-15

申请号：US13806235

申请日：2011-05-24

申请人： Tetsuya Okamoto ,  Yoshiki Nakatani ,  Yudai Takanishi ,  Yohsuke Kanzaki ,  Yuhichi Saitoh

发明人： Tetsuya Okamoto ,  Yoshiki Nakatani ,  Yudai Takanishi ,  Yohsuke Kanzaki ,  Yuhichi Saitoh

IPC分类号： H01L29/04 ,  G02F1/1368

CPC分类号： H01L29/04 ,  G02F1/13458 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869

摘要： An active matrix substrate (20) includes: a gate electrode (11) provided on an insulating substrate (10a); a gate insulating layer (12) covering the gate electrode (11); an oxide semiconductor layer (13) provided on the gate insulating layer (12); and a protective layer (17) covering the oxide semiconductor layer (13). The active matrix substrate (20) has a display region (D) where an image is displayed and a gate terminal region (Ts) located around the display region (D) and including a gate terminal (26) for connection to an external circuit. The gate terminal (26) includes a terminal line (21) provided on the insulating substrate (10a). The terminal line (26) is made of a conductive material different from a material constituting the oxide semiconductor layer (13).

摘要翻译： 有源矩阵基板（20）包括：设置在绝缘基板（10a）上的栅电极（11）; 覆盖所述栅电极的栅极绝缘层（12）; 设置在栅绝缘层（12）上的氧化物半导体层（13）; 和覆盖氧化物半导体层（13）的保护层（17）。 有源矩阵基板（20）具有显示图像的显示区域（D）和位于显示区域（D）周围的栅极端子区域（Ts），并且包括用于连接到外部电路的栅极端子（26）。 栅极端子（26）包括设置在绝缘基板（10a）上的端子线（21）。 端子线（26）由与构成氧化物半导体层（13）的材料不同的导电材料制成。

公开(公告)号：US20140151682A1

公开(公告)日：2014-06-05

申请号：US13810113

申请日：2011-04-13

申请人： Yuichi Saito ,  Yohsuke Kanzaki ,  Yudai Takanishi ,  Tetsuya Okamoto ,  Yoshiki Nakatani ,  Yoshimasa Chikama

发明人： Yuichi Saito ,  Yohsuke Kanzaki ,  Yudai Takanishi ,  Tetsuya Okamoto ,  Yoshiki Nakatani ,  Yoshimasa Chikama

IPC分类号： H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC分类号： H01L27/1225 ,  G02F1/133345 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133302 ,  G02F2001/136231 ,  G02F2001/136236 ,  G02F2001/136295 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/32134 ,  H01L21/44 ,  H01L21/465 ,  H01L21/47635 ,  H01L23/53233 ,  H01L23/53238 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a circuit board having excellent productivity, particularly a circuit board having excellent productivity with respect to a semiconductor layer and source layer forming step, a display device, and a process for producing a circuit board. The circuit board of the present invention is a circuit board including an oxide semiconductor layer and an electrode connected to the oxide semiconductor layer, wherein the electrode is formed by essentially laminating a layer made of a metal other than copper and a layer containing copper.

摘要翻译： 本发明提供一种具有优异生产率的电路板，特别是相对于半导体层和源层形成步骤具有优异的生产率的电路板，显示装置和用于制造电路板的工艺。 本发明的电路基板是包括氧化物半导体层和连接到氧化物半导体层的电极的电路板，其中电极通过基本上层压由铜以外的金属制成的层和含有铜的层而形成。

公开(公告)号：US08779478B2

公开(公告)日：2014-07-15

申请号：US13701028

申请日：2011-05-23

申请人： Masao Moriguchi ,  Michiko Takei ,  Yohsuke Kanzaki ,  Tsuyoshi Inoue ,  Tetsuo Fukaya ,  Yudai Takanishi ,  Takatsugu Kusumi ,  Yoshiki Nakatani ,  Tetsuya Okamoto ,  Kenji Nakanishi

发明人： Masao Moriguchi ,  Michiko Takei ,  Yohsuke Kanzaki ,  Tsuyoshi Inoue ,  Tetsuo Fukaya ,  Yudai Takanishi ,  Takatsugu Kusumi ,  Yoshiki Nakatani ,  Tetsuya Okamoto ,  Kenji Nakanishi

IPC分类号： H01L29/76 ,  H01L29/66 ,  H01L29/786 ,  H01L29/24

CPC分类号： H01L29/7869 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78696

摘要： A TFT 20 includes a gate electrode 21, a gate insulating film 22, a semiconductor layer 23, a source electrode 24, a drain electrode 25, etc. The semiconductor layer 23 is comprised of a metal oxide semiconductor (IGZO), and has a source portion 23a that contacts the source electrode 24, a drain electrode 23b that contacts the drain electrode 25, and a channel portion 23c that is located between the source and drain portions 23a, 23b. A reduced region 30 is formed at least in the channel portion 23c of the semiconductor layer 23, and the reduced region 30 has a higher content of a simple substance of a metal such as In than the remaining portion of the semiconductor layer 23.

摘要翻译： TFT20包括栅极电极21，栅极绝缘膜22，半导体层23，源极24，漏极电极25等。半导体层23由金属氧化物半导体（IGZO）构成，具有 与源电极24接触的源部23a，与漏电极25接触的漏电极23b和位于源极部23a，第二漏极23b之间的沟道部23c。 还原区域30至少形成在半导体层23的沟道部分23c中，并且还原区域30具有比半导体层23的其余部分中诸如In的金属的单质更高的含量。

公开(公告)号：US20130175521A1

公开(公告)日：2013-07-11

申请号：US13701028

申请日：2011-05-23

申请人： Masao Moriguchi ,  Michiko Takei ,  Yohsuke Kanzaki ,  Tsuyoshi Inoue ,  Tetsuo Fukaya ,  Yudai Takanishi ,  Takatsugu Kusumi ,  Yoshiki Nakatani ,  Tetsuya Okamoto ,  Kenji Nakanishi

发明人： Masao Moriguchi ,  Michiko Takei ,  Yohsuke Kanzaki ,  Tsuyoshi Inoue ,  Tetsuo Fukaya ,  Yudai Takanishi ,  Takatsugu Kusumi ,  Yoshiki Nakatani ,  Tetsuya Okamoto ,  Kenji Nakanishi

IPC分类号： H01L29/786 ,  H01L29/24

CPC分类号： H01L29/7869 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78696

摘要： A TFT 20 includes a gate electrode 21, a gate insulating film 22, a semiconductor layer 23, a source electrode 24, a drain electrode 25, etc. The semiconductor layer 23 is comprised of a metal oxide semiconductor (IGZO), and has a source portion 23a that contacts the source electrode 24, a drain electrode 23b that contacts the drain electrode 25, and a channel portion 23c that is located between the source and drain portions 23a, 23b. A reduced region 30 is formed at least in the channel portion 23c of the semiconductor layer 23, and the reduced region 30 has a higher content of a simple substance of a metal such as In than the remaining portion of the semiconductor layer 23.

摘要翻译： TFT20包括栅极电极21，栅极绝缘膜22，半导体层23，源极24，漏极电极25等。半导体层23由金属氧化物半导体（IGZO）构成，具有 与源电极24接触的源部23a，与漏电极25接触的漏电极23b和位于源极部23a，第二漏极23b之间的沟道部23c。 还原区域30至少形成在半导体层23的沟道部分23c中，并且还原区域30具有比半导体层23的其余部分中诸如In的金属的单质更高的含量。

公开(公告)号：US20120223316A1

公开(公告)日：2012-09-06

申请号：US13509367

申请日：2010-07-08

申请人： Yohsuke Kanzaki ,  Yudai Takanishi ,  Yoshiki Nakatani

发明人： Yohsuke Kanzaki ,  Yudai Takanishi ,  Yoshiki Nakatani

IPC分类号： H01L29/786

CPC分类号： H01L29/78618 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696

摘要： Disclosed is a thin film transistor wherein an ON current is increased and a leak current is reduced. The channel layer 60 of the TFT 10 is formed of a crystalline silicon, and the lower surface of one end of the channel layer 60 is electrically connected to the surface of an n+ silicon layer 40a, and the lower surface of the other end is electrically connected to the surface of an n+ silicon layer 40b. Furthermore, the side surface of said end of the channel layer 60 is electrically connected to a source electrode 50a, and the side surface of the other end is electrically connected to a drain electrode 50b. Thus, a barrier that makes electrons, which act as carriers, not easily transferred is formed on the boundary between the source electrode 50a and the channel layer 60. As a result, the ON current that flows when the TFT 10 is in the ON state can be increased, and the leak current that flows when the TFT is in the OFF state can be reduced.

摘要翻译： 公开了一种薄膜晶体管，其中导通电流增加并且漏电流减小。 TFT10的沟道层60由结晶硅形成，沟道层60的一端的下表面与n +硅层40a的表面电连接，另一端的下表面电气 连接到n +硅层40b的表面。 此外，沟道层60的端部的侧表面电连接到源电极50a，另一端的侧表面电连接到漏电极50b。 因此，在源电极50a和沟道层60之间的边界上形成有作为载流子的电子不容易转移的势垒。其结果是，当TFT10处于导通状态时导通的导通电流 可以降低当TFT处于OFF状态时流过的漏电流。