摘要:
A computer peripheral system including a mobile vehicle, a two-way wireless link to a host computer and software residing on the host computer for providing control and guidance is disclosed. The system is installed on an existing host computer as an add-on peripheral device whose function is to perform some automatic task (e.g. floor cleaning) in a working environment (e.g. a home or business). The mobile vehicle is equipped with a plurality of sensors, data from which is conveyed to the host system over the wireless link. Software on the host computer communicates control and movement commands to the mobile system. A method and apparatus for sensing the position of the mobile vehicle in a working environment is also disclosed. Software installed on the host computer can use data from the sensing apparatus to automatically construct and maintain a map of the operating environment and to guide the mobile vehicle through the environment in order to carry out its task. Also disclosed are methods and apparatus for providing entertainment for onlookers as the vehicle carries out its task.
摘要:
Methods and apparatus are provided for allowing efficient clock domain crossing management in programmable chip systems. Components associated with different clock domains can be analyzed. Clock domain crossing components are automatically selected from a library of clock domain crossing components to allow connection between disparate clock domains. Clock domain crossing components can be shared, chained, and intelligently selected for increased efficiency.
摘要:
Methods and apparatus are provided for allowing a master component such as a processor on a programmable chip to access memory using unaligned addresses. An adapter connected to a master component determines if a master component memory access request is aligned. If the access request is aligned, the request is forwarded to memory and a response is provided to the master component. If the access request is unaligned, the adapter sends multiple access requests to memory and processes the responses in order to provide a correct response to the master component.
摘要:
A proximity sensor system includes a sensor matrix array having a characteristic capacitance on horizontal and vertical conductors connected to sensor pads. The capacitance changes as a function of the proximity of an object or objects to the sensor matrix. The change in capacitance of each node in both the X and Y directions of the matrix due to the approach of an object is converted to a set of voltages in the X and Y directions. These voltages are processed by analog circuitry to develop electrical signals representative of the centroid of the profile of the object, i.e, its position in the X and Y dimensions. The profile of position may also be integrated to provide Z-axis (pressure) information.
摘要:
A proximity sensor system includes a touch-sensor pad with a sensor matrix array having a characteristic capacitance on horizontal and vertical conductors connected to sensor pads. The capacitance changes as a function of the proximity of an object or objects to the sensor matrix. The change in capacitance of each node in both the X and Y directions of the matrix due to the approach of an object is converted to a set of voltages in the X and Y directions. These voltages are processed by circuitry to develop electrical signals representative of the centroid of the profile of the object, i.e, its position in the X and Y dimensions. Noise reduction and background level setting techniques inherently available in the architecture are employed. A conductive paintbrush-type stylus is used to produce paint-like strokes on a display associated with the touch-sensor pad.
摘要:
A circuit for generating N analog voltage signals for reference or bias use employs N analog floating gate storage devices. Electron injection circuitry is provided for injecting electrons on to and a tunneling structure is provided for removing electrons from the floating gate of each floating gate storage device. A follower amplifier is connected to each floating gate storage device and drives an analog output voltage bus. A capacitor is connected to each analog output storage bus. An analog pass gate is connected between each analog output voltage bus and a common monitor/dynamic load bus. Each analog pass gate is driven by a strobe signal.
摘要:
An integrated circuit amplifier having a random input offset voltage is adaptable such that the input offset voltage may be cancelled out. An input node is a floating input node and is coupled to a source of input signal by a first capacitor. A second capacitor is connected between the output of the amplifier and the floating node. An ultraviolet window above the second capacitor allows the floating node to be charged, by the application of ultraviolet light, to a voltage which effectively cancels the input offset voltage.
摘要:
A power system is disclosed. The power system may have an engine, a generator, a monitoring device configured to monitor the generator and to generate a signal, and a performance module configured to provide an alarm and a shutdown command to the engine based on the signal. The power system may further have a switching device with a first condition and a second condition. When the first condition of the switching device is active, the performance module may be overridden, the engine may be operated at a reduced speed and load output, and the generator may be inhibited from producing electrical power. When the second condition of the switching device is active, the performance module may affect operation of the power system, the engine may be operated at an elevated speed and load output, and the generator may be allowed to produce electrical power directed to the external load.
摘要:
According to various embodiments of the present invention, a programmable device assembly includes an FPGA coupled to a nonvolatile serial configuration memory (e.g., serial flash memory) and a volatile fast bulk memory (e.g., SRAM or SDRAM). The nonvolatile serial configuration memory contains both the FPGA configuration data and CPU instructions. When a predetermined condition occurs, a serial memory access component that is hard coded on the FPGA automatically reads the configuration data from the nonvolatile serial configuration memory. The configuration data is used to configure the FPGA with various components, including a CPU, a boot ROM with code for a boot copier, and a bus structure. When the CPU boots, code for the boot copier is executed so that the CPU instructions are copied from the nonvolatile serial configuration memory to the volatile fast bulk memory. The CPU then executes the CPU instructions stored in the volatile fast bulk memory.
摘要:
Methods and apparatus are provided for providing a first master component with access to a first slave component while a second master component is accessing a second slave component in a system. The system may include a processor core and peripherals implemented on an integrated circuit. A slave side arbitrator corresponding to a single slave component and coupled to multiple master components can be used to provide a master component access to a slave component.