Computer peripheral floor cleaning system and navigation method
    1.
    发明授权
    Computer peripheral floor cleaning system and navigation method 失效
    电脑周边地板清洁系统及导航方法

    公开(公告)号:US5995884A

    公开(公告)日:1999-11-30

    申请号:US813710

    申请日:1997-03-07

    IPC分类号: G05D1/02 G06F165/00

    摘要: A computer peripheral system including a mobile vehicle, a two-way wireless link to a host computer and software residing on the host computer for providing control and guidance is disclosed. The system is installed on an existing host computer as an add-on peripheral device whose function is to perform some automatic task (e.g. floor cleaning) in a working environment (e.g. a home or business). The mobile vehicle is equipped with a plurality of sensors, data from which is conveyed to the host system over the wireless link. Software on the host computer communicates control and movement commands to the mobile system. A method and apparatus for sensing the position of the mobile vehicle in a working environment is also disclosed. Software installed on the host computer can use data from the sensing apparatus to automatically construct and maintain a map of the operating environment and to guide the mobile vehicle through the environment in order to carry out its task. Also disclosed are methods and apparatus for providing entertainment for onlookers as the vehicle carries out its task.

    摘要翻译: 公开了一种包括移动车辆,到主计算机的双向无线链路和驻留在主计算机上用于提供控制和引导的软件的计算机外围设备系统。 该系统作为附加外围设备安装在现有主机上,其功能是在工作环境(例如家庭或商业)中执行一些自动任务(例如地板清洁)。 移动车辆配备有多个传感器,数据通过无线链路被传送到主机系统。 主机上的软件将控制和移动命令传达给移动系统。 还公开了用于在工作环境中感测移动车辆的位置的方法和装置。 安装在主计算机上的软件可以使用来自感测装置的数据来自动构建和维护操作环境的映射,并且引导移动车辆通过环境以执行其任务。 还公开了当车辆执行其任务时为旁观者提供娱乐的方法和装置。

    Selection of port adapters for clock crossing boundaries
    2.
    发明授权
    Selection of port adapters for clock crossing boundaries 有权
    选择时钟跨越边界的端口适配器

    公开(公告)号:US08286025B1

    公开(公告)日:2012-10-09

    申请号:US12834980

    申请日:2010-07-13

    IPC分类号: G06F1/04

    CPC分类号: G06F17/5045 G06F17/5054

    摘要: Methods and apparatus are provided for allowing efficient clock domain crossing management in programmable chip systems. Components associated with different clock domains can be analyzed. Clock domain crossing components are automatically selected from a library of clock domain crossing components to allow connection between disparate clock domains. Clock domain crossing components can be shared, chained, and intelligently selected for increased efficiency.

    摘要翻译: 提供了用于允许在可编程芯片系统中有效的时钟域交叉管理的方法和装置。 可以分析与不同时钟域相关联的组件。 时钟域交叉分量从时钟域交叉组件的库中自动选择,以允许不同时钟域之间的连接。 时钟域交叉组件可以共享,链接和智能选择,以提高效率。

    Adapter allowing unaligned access to memory
    3.
    发明授权
    Adapter allowing unaligned access to memory 有权
    适配器允许未对齐的内存访问

    公开(公告)号:US08219785B1

    公开(公告)日:2012-07-10

    申请号:US11527201

    申请日:2006-09-25

    IPC分类号: G06F9/30

    CPC分类号: G11C7/22 G06F12/04

    摘要: Methods and apparatus are provided for allowing a master component such as a processor on a programmable chip to access memory using unaligned addresses. An adapter connected to a master component determines if a master component memory access request is aligned. If the access request is aligned, the request is forwarded to memory and a response is provided to the master component. If the access request is unaligned, the adapter sends multiple access requests to memory and processes the responses in order to provide a correct response to the master component.

    摘要翻译: 提供了用于允许诸如可编程芯片上的处理器的主组件使用未对齐地址访问存储器的方法和装置。 连接到主组件的适配器确定主组件存储器访问请求是否对齐。 如果访问请求被对齐,则请求被转发到存储器并且向主组件提供响应。 如果访问请求未对齐,则适配器向存储器发送多个访问请求并处理响应,以便向主组件提供正确的响应。

    Object position and proximity detector
    4.
    发明授权
    Object position and proximity detector 失效
    物体位置和接近检测器

    公开(公告)号:US5495077A

    公开(公告)日:1996-02-27

    申请号:US252969

    申请日:1994-06-02

    摘要: A proximity sensor system includes a sensor matrix array having a characteristic capacitance on horizontal and vertical conductors connected to sensor pads. The capacitance changes as a function of the proximity of an object or objects to the sensor matrix. The change in capacitance of each node in both the X and Y directions of the matrix due to the approach of an object is converted to a set of voltages in the X and Y directions. These voltages are processed by analog circuitry to develop electrical signals representative of the centroid of the profile of the object, i.e, its position in the X and Y dimensions. The profile of position may also be integrated to provide Z-axis (pressure) information.

    摘要翻译: 接近传感器系统包括具有连接到传感器焊盘的水平和垂直导体上的特征电容的传感器矩阵阵列。 电容根据物体或传感器矩阵的接近度而变化。 由于物体的接近,矩阵的X和Y方向上的每个节点的电容的变化被转换成在X和Y方向上的一组电压。 这些电压由模拟电路处理,以开发代表物体轮廓的质心的电信号,即其在X和Y尺寸中的位置。 位置的轮廓也可以被集成以提供Z轴(压力)信息。

    Paintbrush stylus for capacitive touch sensor pad
    5.
    发明授权
    Paintbrush stylus for capacitive touch sensor pad 失效
    用于电容式触摸传感器垫的画笔触控笔

    公开(公告)号:US5488204A

    公开(公告)日:1996-01-30

    申请号:US324438

    申请日:1994-10-17

    摘要: A proximity sensor system includes a touch-sensor pad with a sensor matrix array having a characteristic capacitance on horizontal and vertical conductors connected to sensor pads. The capacitance changes as a function of the proximity of an object or objects to the sensor matrix. The change in capacitance of each node in both the X and Y directions of the matrix due to the approach of an object is converted to a set of voltages in the X and Y directions. These voltages are processed by circuitry to develop electrical signals representative of the centroid of the profile of the object, i.e, its position in the X and Y dimensions. Noise reduction and background level setting techniques inherently available in the architecture are employed. A conductive paintbrush-type stylus is used to produce paint-like strokes on a display associated with the touch-sensor pad.

    摘要翻译: 接近传感器系统包括具有传感器矩阵阵列的触摸传感器焊盘,该传感器阵列在连接到传感器焊盘的水平和垂直导体上具有特征电容。 电容根据物体或传感器矩阵的接近度而变化。 由于物体的接近,矩阵的X和Y方向上的每个节点的电容的变化被转换成在X和Y方向上的一组电压。 这些电压由电路处理以产生表示物体轮廓的质心的电信号,即其在X和Y尺寸中的位置。 采用本构架中固有可用的降噪和背景设置技术。 导电画笔型触笔用于在与触摸传感器垫相关联的显示器上产生油漆状笔触。

    Writable analog reference voltage storage device
    6.
    发明授权
    Writable analog reference voltage storage device 失效
    可写模拟参考电压存储器件

    公开(公告)号:US5166562A

    公开(公告)日:1992-11-24

    申请号:US697410

    申请日:1991-05-09

    摘要: A circuit for generating N analog voltage signals for reference or bias use employs N analog floating gate storage devices. Electron injection circuitry is provided for injecting electrons on to and a tunneling structure is provided for removing electrons from the floating gate of each floating gate storage device. A follower amplifier is connected to each floating gate storage device and drives an analog output voltage bus. A capacitor is connected to each analog output storage bus. An analog pass gate is connected between each analog output voltage bus and a common monitor/dynamic load bus. Each analog pass gate is driven by a strobe signal.

    摘要翻译: 用于产生用于参考或偏置使用的N个模拟电压信号的电路使用N个模拟浮动栅极存储装置。 提供电子注入电路用于将电子注入到上面,并且提供隧道结构用于从每个浮动栅极存储装置的浮动栅极去除电子。 跟随放大器连接到每个浮动栅极存储装置并驱动模拟输出电压总线。 电容器连接到每个模拟输出存储总线。 每个模拟输出电压总线和公共监视器/动态负载总线之间连接一个模拟传输门。 每个模拟传输门由选通信号驱动。

    Subthreshold CMOS amplifier with offset adaptation
    7.
    发明授权
    Subthreshold CMOS amplifier with offset adaptation 失效
    具有偏移适应的亚阈值CMOS放大器

    公开(公告)号:US4935702A

    公开(公告)日:1990-06-19

    申请号:US282176

    申请日:1988-12-09

    摘要: An integrated circuit amplifier having a random input offset voltage is adaptable such that the input offset voltage may be cancelled out. An input node is a floating input node and is coupled to a source of input signal by a first capacitor. A second capacitor is connected between the output of the amplifier and the floating node. An ultraviolet window above the second capacitor allows the floating node to be charged, by the application of ultraviolet light, to a voltage which effectively cancels the input offset voltage.

    摘要翻译: 具有随机输入偏移电压的集成电路放大器是可适应的,使得可以抵消输入偏移电压。 输入节点是浮动输入节点,并且通过第一电容器耦合到输入信号源。 第二电容器连接在放大器的输出端和浮动节点之间。 第二电容器上方的紫外线窗口允许通过施加紫外线将浮动节点充电到有效地抵消输入偏移电压的电压。

    Genset power system having multiple modes of operation
    8.
    发明授权
    Genset power system having multiple modes of operation 有权
    发电机组具有多种运行模式

    公开(公告)号:US08237300B2

    公开(公告)日:2012-08-07

    申请号:US12320927

    申请日:2009-02-09

    申请人: Timothy P. Allen

    发明人: Timothy P. Allen

    IPC分类号: F02D41/08

    CPC分类号: H02J9/08

    摘要: A power system is disclosed. The power system may have an engine, a generator, a monitoring device configured to monitor the generator and to generate a signal, and a performance module configured to provide an alarm and a shutdown command to the engine based on the signal. The power system may further have a switching device with a first condition and a second condition. When the first condition of the switching device is active, the performance module may be overridden, the engine may be operated at a reduced speed and load output, and the generator may be inhibited from producing electrical power. When the second condition of the switching device is active, the performance module may affect operation of the power system, the engine may be operated at an elevated speed and load output, and the generator may be allowed to produce electrical power directed to the external load.

    摘要翻译: 公开了电力系统。 电力系统可以具有发动机,发电机,被配置为监视发电机并产生信号的监视装置,以及性能模块,被配置为基于该信号向发动机提供报警和关机命令。 电力系统还可以具有具有第一状态和第二状态的开关装置。 当开关装置的第一状态为活动时,可以覆盖性能模块,发动机可以以降低的速度和负载输出进行操作,并且可以禁止发电机产生电力。 当开关装置的第二状态有效时,性能模块可能会影响电力系统的运行,发动机可以以高速运行和负载输出,并且发电机可以被允许产生指向外部负载的电力 。

    Booting mechanism for FPGA-based embedded system
    9.
    发明授权
    Booting mechanism for FPGA-based embedded system 有权
    基于FPGA的嵌入式系统启动机制

    公开(公告)号:US07822958B1

    公开(公告)日:2010-10-26

    申请号:US11372532

    申请日:2006-03-10

    IPC分类号: G06F9/00 G06F9/24 G06F13/00

    CPC分类号: G06F9/4401

    摘要: According to various embodiments of the present invention, a programmable device assembly includes an FPGA coupled to a nonvolatile serial configuration memory (e.g., serial flash memory) and a volatile fast bulk memory (e.g., SRAM or SDRAM). The nonvolatile serial configuration memory contains both the FPGA configuration data and CPU instructions. When a predetermined condition occurs, a serial memory access component that is hard coded on the FPGA automatically reads the configuration data from the nonvolatile serial configuration memory. The configuration data is used to configure the FPGA with various components, including a CPU, a boot ROM with code for a boot copier, and a bus structure. When the CPU boots, code for the boot copier is executed so that the CPU instructions are copied from the nonvolatile serial configuration memory to the volatile fast bulk memory. The CPU then executes the CPU instructions stored in the volatile fast bulk memory.

    摘要翻译: 根据本发明的各种实施例,可编程器件组件包括耦合到非易失性串行配置存储器(例如串行闪存)和易失性快速批量存储器(例如,SRAM或SDRAM)的FPGA。 非易失性串行配置存储器包含FPGA配置数据和CPU指令。 当发生预定条件时,在FPGA上硬编码的串行存储器访问部件自动从非易失性串行配置存储器读取配置数据。 配置数据用于配置具有各种组件的FPGA,包括CPU,具有启动复印机代码的引导ROM和总线结构。 当CPU引导时,执行引导复印机的代码,以便将CPU指令从非易失性串行配置存储器复制到易失性快速批量存储器。 CPU然后执行存储在易失性快速批量存储器中的CPU指令。

    Master and slave side arbitrators associated with programmable chip system components
    10.
    发明授权
    Master and slave side arbitrators associated with programmable chip system components 有权
    与可编程芯片系统组件相关的主,从侧仲裁器

    公开(公告)号:US07769934B1

    公开(公告)日:2010-08-03

    申请号:US11759828

    申请日:2007-06-07

    IPC分类号: G06F13/00

    CPC分类号: G06F13/364 G06F13/374

    摘要: Methods and apparatus are provided for providing a first master component with access to a first slave component while a second master component is accessing a second slave component in a system. The system may include a processor core and peripherals implemented on an integrated circuit. A slave side arbitrator corresponding to a single slave component and coupled to multiple master components can be used to provide a master component access to a slave component.

    摘要翻译: 提供的方法和装置用于在第二主组件正在访问系统中的第二从组件时提供对第一从组件的访问的第一主组件。 该系统可以包括在集成电路上实现的处理器核心和外围设备。 可以使用对应于单个从属组件并且耦合到多个主组件的从属侧仲裁器来提供主组件对从组件的访问。