公开(公告)号：US07859087B2

公开(公告)日：2010-12-28

申请号：US12637240

申请日：2009-12-14

申请人： Tomohiro Murata ,  Hiroaki Ueno ,  Hidetoshi Ishida ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Tomohiro Murata ,  Hiroaki Ueno ,  Hidetoshi Ishida ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L23/58

CPC分类号： H01L29/7787 ,  H01L23/367 ,  H01L23/3677 ,  H01L29/2003 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.

公开(公告)号：US07656010B2

公开(公告)日：2010-02-02

申请号：US11898958

申请日：2007-09-18

申请人： Tomohiro Murata ,  Hiroaki Ueno ,  Hidetoshi Ishida ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Tomohiro Murata ,  Hiroaki Ueno ,  Hidetoshi Ishida ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L23/58

CPC分类号： H01L29/7787 ,  H01L23/367 ,  H01L23/3677 ,  H01L29/2003 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.

摘要翻译： 半导体器件包括：半导体层; 形成在与半导体层接触的半导体层上的至少一个电极; 以及覆盖半导体层和电极的顶表面的至少一部分的钝化膜，以保护半导体层并由多个子膜形成。 钝化膜包括由氮化铝制成的第一子膜。

公开(公告)号：US07339207B2

公开(公告)日：2008-03-04

申请号：US11455631

申请日：2006-06-20

申请人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

发明人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

IPC分类号： H01L31/0328

CPC分类号： H01L29/7787 ,  H01L21/02425 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766

摘要： A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1−xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1−N; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.

摘要翻译： 半导体器件具有：形成在导电衬底上并具有高电阻的Al x Ga 1-x N的缓冲层; 形成在缓冲层上的元件形成层，具有沟道层，由未掺杂的GaN和N型Al y Ga 1-y N构成; 以及选择性地形成在元件形成层上的源电极，漏电极和栅电极。

公开(公告)号：US07187014B2

公开(公告)日：2007-03-06

申请号：US10862452

申请日：2004-06-08

申请人： Yutaka Hirose ,  Daisuke Ueda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Tomohiro Murata

发明人： Yutaka Hirose ,  Daisuke Ueda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Tomohiro Murata

IPC分类号： H01L29/772

CPC分类号： H01L29/7787 ,  H01L29/2003

摘要： A semiconductor device has a sapphire substrate, a semiconductor layer made of GaN provided on the sapphire substrate, a multilayer film provided on the semiconductor layer, and an electrode in ohmic contact with the multilayer film. The multilayer film has been formed by alternately stacking two types of semiconductor layers having different amounts of piezopolarization or different amounts of spontaneous polarization and each containing an n-type impurity so that electrons are induced at the interface between the two types of semiconductor layers. This allows the contact resistance between the electrode and the multilayer film and a parasitic resistance in a current transmission path to be reduced to values lower than in a conventional semiconductor device.

摘要翻译： 半导体器件具有蓝宝石衬底，设置在蓝宝石衬底上的由GaN制成的半导体层，设置在半导体层上的多层膜和与该多层膜欧姆接触的电极。 已经通过交替地堆叠具有不同量的极化或不同量的自发极化的两种类型的半导体层，并且每个含有n型杂质，以便在两种类型的半导体层之间的界面处诱导电子而形成多层膜。 这允许电极和多层膜之间的接触电阻和电流传输路径中的寄生电阻降低到比常规半导体器件中的值更低的值。

公开(公告)号：US20050082568A1

公开(公告)日：2005-04-21

申请号：US10862452

申请日：2004-06-08

申请人： Yutaka Hirose ,  Daisuke Ueda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Tomohiro Murata

发明人： Yutaka Hirose ,  Daisuke Ueda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Tomohiro Murata

IPC分类号： H01L21/28 ,  H01L21/338 ,  H01L29/20 ,  H01L29/417 ,  H01L29/778 ,  H01L29/812 ,  H01L31/0328

CPC分类号： H01L29/7787 ,  H01L29/2003

摘要： A semiconductor device has a sapphire substrate, a semiconductor layer made of GaN provided on the sapphire substrate, a multilayer film provided on the semiconductor layer, and an electrode in ohmic contact with the multilayer film. The multilayer film has been formed by alternately stacking two types of semiconductor layers having different amounts of piezopolarization or different amounts of spontaneous polarization and each containing an n-type impurity so that electrons are induced at the interface between the two types of semiconductor layers. This allows the contact resistance between the electrode and the multilayer film and a parasitic resistance in a current transmission path to be reduced to values lower than in a conventional semiconductor device.

摘要翻译： 半导体器件具有蓝宝石衬底，设置在蓝宝石衬底上的由GaN制成的半导体层，设置在半导体层上的多层膜和与该多层膜欧姆接触的电极。 已经通过交替地堆叠具有不同量的极化或不同量的自发极化的两种类型的半导体层，并且每个含有n型杂质，以便在两种类型的半导体层之间的界面处诱导电子而形成多层膜。 这允许电极和多层膜之间的接触电阻和电流传输路径中的寄生电阻降低到比常规半导体器件中的值更低的值。

公开(公告)号：US20050001235A1

公开(公告)日：2005-01-06

申请号：US10834362

申请日：2004-04-29

申请人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

发明人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

IPC分类号： H01L21/20 ,  H01L21/28 ,  H01L21/338 ,  H01L29/20 ,  H01L29/417 ,  H01L29/778 ,  H01L29/812 ,  H01L31/0328 ,  H01S5/30

CPC分类号： H01L29/7787 ,  H01L21/02425 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766

摘要： A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1-xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1-yN; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.

摘要翻译： 半导体器件具有：形成在导电基板上并由高电阻的Al x Ga 1-x N构成的缓冲层; 形成在缓冲层上的元件形成层，具有沟道层，由未掺杂的GaN和N型Al y Ga 1-y N制成; 以及选择性地形成在元件形成层上的源电极，漏电极和栅电极。 源电极被填充在设置在缓冲层和元件形成层中的通孔中，因此电连接到导电基板。

公开(公告)号：US07078743B2

公开(公告)日：2006-07-18

申请号：US10834362

申请日：2004-04-29

申请人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

发明人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

IPC分类号： H01L31/0328

CPC分类号： H01L29/7787 ,  H01L21/02425 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766

摘要： A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1-xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1-yN; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.

摘要翻译： 半导体器件具有：形成在导电基板上并具有高电阻的Al x Ga 1-x N的缓冲层; 形成在缓冲层上的元件形成层，具有沟道层，由未掺杂的GaN和N型Al y Ga 1-y N制成; 以及选择性地形成在元件形成层上的源电极，漏电极和栅电极。 源电极被填充在设置在缓冲层和元件形成层中的通孔中，因此电连接到导电基板。

公开(公告)号：US20060289894A1

公开(公告)日：2006-12-28

申请号：US11455631

申请日：2006-06-20

申请人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

发明人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

IPC分类号： H01L31/00

CPC分类号： H01L29/7787 ,  H01L21/02425 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766

摘要： A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1−xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1−N; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.

摘要翻译： 半导体器件具有：形成在导电衬底上并具有高电阻的Al x Ga 1-x N的缓冲层; 形成在缓冲层上的元件形成层，具有沟道层，并由未掺杂的GaN和N型Al x Ga 1 -N构成; 以及选择性地形成在元件形成层上的源电极，漏电极和栅电极。 源电极被填充在设置在缓冲层和元件形成层中的通孔中，因此电连接到导电基板。

公开(公告)号：US07910464B2

公开(公告)日：2011-03-22

申请号：US12695759

申请日：2010-01-28

申请人： Tomohiro Murata ,  Yutaka Hirose ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto

发明人： Tomohiro Murata ,  Yutaka Hirose ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L29/66871 ,  H01L21/28 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/8128

摘要： A semiconductor device of the present invention includes: a III-V nitride semiconductor layer including a channel region in which carriers travel; a concave portion provided in an upper portion of the channel region in the III-V nitride semiconductor layer; and a Schottky electrode consisting of a conductive material forming a Schottky junction with the semiconductor layer, and formed on a semiconductor layer, which spreads over the concave portion and peripheral portions of the concave portion, on the III-V nitride semiconductor layer. A dimension of the concave portion in a depth direction is set so that a portion of the Schottky electrode provided in the concave portion can adjust a quantity of the carriers traveling in the channel region.

摘要翻译： 本发明的半导体器件包括：III-V族氮化物半导体层，其包括载流子行进的沟道区; 设置在III-V族氮化物半导体层中的沟道区的上部的凹部; 和由形成与半导体层形成肖特基结的导电材料构成的肖特基电极，形成在III-V族氮化物半导体层上的在凹部的凹部和周边部分上方扩散的半导体层上。 深度方向上的凹部的尺寸被设定为使得设置在凹部中的肖特基电极的一部分可以调节在沟道区域中行进的载流子的量。

公开(公告)号：US20070254419A1

公开(公告)日：2007-11-01

申请号：US11819198

申请日：2007-06-26

申请人： Atsuhiko Kanda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Yutaka Hirose ,  Tomohiro Murata

发明人： Atsuhiko Kanda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Yutaka Hirose ,  Tomohiro Murata

IPC分类号： H01L21/338

CPC分类号： H01L29/7787 ,  H01L27/14609 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/14656 ,  H01L29/2003 ,  H01L29/66462

摘要： A semiconductor device has a first nitride semiconductor layer, a second nitride semiconductor layer formed on the first nitride semiconductor layer and having such a composition as to generate a 2-dimensional electron gas layer in the upper portion of the first nitride semiconductor layer, and an electrode having an ohmic property and formed selectively on the second nitride semiconductor layer. The second nitride semiconductor layer includes a contact area having at least one inclined portion with a bottom or wall surface thereof being inclined toward the upper surface of the first nitride semiconductor layer and defining a depressed cross-sectional configuration. The electrode is formed on the contact area.