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29 条记录 (耗时 0.057 秒)

    Guided-wave optical interconnections embedded within a microelectronic wafer-level batch package
    2.
    发明授权
    Guided-wave optical interconnections embedded within a microelectronic wafer-level batch package 失效
    引导波光学互连嵌入在微电子晶圆级批量封装内

    公开(公告)号：US06785458B2

    公开(公告)日：2004-08-31

    申请号：US10074420

    申请日：2002-02-11

    申请人： Tony Mule′ ,  Chirag Patel ,  James D. Meindl ,  Thomas K. Gaylord ,  Elias N. Glytsis ,  Kevin P. Martin ,  Stephen M. Schultz ,  Muhannad Bakir ,  Hollie Reed ,  Paul Kohl

    发明人： Tony Mule′ ,  Chirag Patel ,  James D. Meindl ,  Thomas K. Gaylord ,  Elias N. Glytsis ,  Kevin P. Martin ,  Stephen M. Schultz ,  Muhannad Bakir ,  Hollie Reed ,  Paul Kohl

    IPC分类号： G02B610

    CPC分类号： G02B6/43 ,  G02B6/10 ,  G02B6/12002 ,  G02B6/1221 ,  G02B6/132 ,  G02B6/136 ,  G02B6/34 ,  G02B2006/12107

    摘要： Wafer-level electronic packages having waveguides and methods of fabricating chip-level electronic packages having waveguides are disclosed. A representative chip-level electronic package includes at least one waveguide having a waveguide core. In addition, another representative chip-level electronic package includes a waveguide having an air-gap cladding layer around a portion of the waveguide core. A representative method for fabricating a chip-level electronic package includes: providing a substrate having a passivation layer disposed on the substrate; disposing a waveguide core on a portion of the passivation layer; disposing a first sacrificial layer onto at least one portion of the passivation layer and the waveguide core; disposing an overcoat layer onto the passivation layer and the first sacrificial layer; and removing the first sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and around a portion of the waveguide core.

    摘要翻译： 公开了具有波导的晶片级电子封装以及制造具有波导的芯片级电子封装的方法。 代表性的芯片级电子封装包括至少一个具有波导芯的波导。 此外，另一代表性的芯片级电子封装包括在波导芯的一部分周围具有气隙包覆层的波导。 用于制造芯片级电子封装的代表性方法包括：提供具有设置在基板上的钝化层的基板; 在所述钝化层的一部分上设置波导芯; 在所述钝化层和所述波导芯的至少一部分上设置第一牺牲层; 在所述钝化层和所述第一牺牲层上设置外涂层; 以及去除所述第一牺牲层以在所述外涂层聚合物层内和所述波导芯的一部分周围限定气隙包覆层。

    Optical waveguides with embedded air-gap cladding layer and methods of fabrication thereof
    4.
    发明授权
    Optical waveguides with embedded air-gap cladding layer and methods of fabrication thereof 有权
    具有嵌入式气隙包覆层的光波导及其制造方法

    公开(公告)号：US06807352B2

    公开(公告)日：2004-10-19

    申请号：US10074067

    申请日：2002-02-11

    申请人： Tony Mule′ ,  James D. Meindl ,  Thomas K. Gaylord ,  Elias N. Glytsis ,  Paul Kohl

    发明人： Tony Mule′ ,  James D. Meindl ,  Thomas K. Gaylord ,  Elias N. Glytsis ,  Paul Kohl

    IPC分类号： G02B610

    CPC分类号： G02B6/136 ,  G02B6/10 ,  G02B6/1221 ,  G02B6/132 ,  G02B6/34 ,  G02B6/43 ,  G02B2006/12107

    摘要： Waveguides having air-gap cladding layers and methods of fabricating waveguides having air-gap cladding layers are disclosed. A representative waveguide includes a waveguide core having an air-gap cladding layer engaging a portion of the waveguide core. In addition, a representative method of fabricating a waveguide having an air-gap cladding layer includes: providing a substrate having a lower cladding layer disposed on the substrate; disposing a waveguide core on a portion of the lower cladding layer; disposing a sacrificial layer onto at least one portion of the lower cladding layer and the waveguide core; disposing an overcoat layer onto the lower cladding layer and the sacrificial layer; and removing the sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and engaging a portion of the waveguide core.

    摘要翻译： 公开了具有气隙包覆层的波导和制造具有气隙包覆层的波导的方法。 代表性的波导包括具有接合波导芯的一部分的气隙包覆层的波导芯。 另外，制造具有气隙包层的波导的代表性方法包括：提供具有设置在基板上的下包层的基板; 在所述下包层的一部分上设置波导芯; 在所述下包层和所述波导芯的至少一部分上设置牺牲层; 在下包层和牺牲层上设置外涂层; 以及去除所述牺牲层以在所述外涂层聚合物层内限定气隙包层并与所述波导芯的一部分接合。

    Back-side-of-die, through-wafer guided-wave optical clock distribution networks, method of fabrication thereof, and uses thereof
    8.
    发明授权
    Back-side-of-die, through-wafer guided-wave optical clock distribution networks, method of fabrication thereof, and uses thereof 失效
    芯片背面，贯通晶片导波光时钟分配网络，其制造方法及其应用

    公开(公告)号：US07016569B2

    公开(公告)日：2006-03-21

    申请号：US10630411

    申请日：2003-07-30

    申请人： Tony Mule ,  James D. Meindl ,  Thomas K. Gaylord

    发明人： Tony Mule ,  James D. Meindl ,  Thomas K. Gaylord

    IPC分类号： G02B6/34

    CPC分类号： G02B6/34 ,  G02B6/12002 ,  G02B6/124 ,  G02B6/43

    摘要： Systems and methods for back-of-die, through-wafer guided-wave optical clock distribution systems (networks) are disclosed. A representative back-of-die, through-wafer guided-wave optical clock distribution system includes an integrated circuit device with a first cladding layer disposed on the back-side of the integrated circuit device, and an core layer disposed on the first cladding layer. The core layer, the first cladding layer, or the second cladding layer can include, but is not limited to, vertical-to-horizontal input diffraction gratings, a horizontal-to-horizontal diffraction gratings, and horizontal-to-vertical output diffraction gratings.

    摘要翻译： 公开了用于芯片后晶圆导波光时钟分配系统（网络）的系统和方法。 一种代表性的芯片后晶片导波光时钟分配系统包括集成电路器件，其具有设置在集成电路器件的背面上的第一覆层，以及设置在第一覆层上的芯层 。 芯层，第一包层或第二包层可以包括但不限于垂直对水平的输入衍射光栅，水平到水平的衍射光栅和水平到垂直的输出衍射光栅 。

    HIGH DIELECTRIC CONSTANT INSULATORS AND ASSOCIATED FABRICATION METHODS
    9.
    发明申请
    HIGH DIELECTRIC CONSTANT INSULATORS AND ASSOCIATED FABRICATION METHODS 有权
    高介电常数绝缘子及相关制造方法

    公开(公告)号：US20070176248A1

    公开(公告)日：2007-08-02

    申请号：US11669086

    申请日：2007-01-30

    申请人： THOMAS K. GAYLORD ,  James D. Meindl

    发明人： THOMAS K. GAYLORD ,  James D. Meindl

    IPC分类号： H01L29/94

    CPC分类号： H01L29/51 ,  H01L21/02142 ,  H01L21/02175 ,  H01L21/02197 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31691

    摘要： High-dielectric-constant (k) materials and electrical devices implementing the high-k materials are provided herein. According to some embodiments, an electrical device includes a substrate and a crystalline-oxide-containing composition. The crystalline-oxide-containing composition can be disposed on a surface of the substrate. Within the crystalline-oxide-containing composition, oxide anions can form at least one of a substantially linear orientation or a substantially planar orientation. A plurality of these substantially linear orientations of oxide anions or substantially planar orientations of oxide anions can be oriented substantially perpendicular or substantially normal to the surface of the substrate such that the oxide-containing composition has a dielectric constant greater than about 3.9 in a direction substantially normal to the surface of the substrate. Other embodiments are also claimed and described.

    摘要翻译： 本文提供了高介电常数（k）材料和实施高k材料的电气设备。 根据一些实施例，电气装置包括基底和含结晶氧化物的组合物。 含结晶氧化物的组合物可以设置在基材的表面上。 在含结晶氧化物的组合物中，氧化物阴离子可以形成基本上线性取向或基本平面取向中的至少一个。 氧化物阴离子的氧化物阴离子或基本上平面取向的多个这些基本上线性的取向可以被定向为基本上垂直于或基本上垂直于衬底的表面，使得含氧化物的组合物在基本上在基本上的方向上具有大于约3.9的介电常数 垂直于基底的表面。 还要求保护和描述其它实施例。

    Photo-masks and methods of fabricating surface-relief grating diffractive devices
    10.
    发明授权
    Photo-masks and methods of fabricating surface-relief grating diffractive devices 有权
    光掩模和制造表面浮雕光栅衍射装置的方法

    公开(公告)号：US07935459B2

    公开(公告)日：2011-05-03

    申请号：US11767372

    申请日：2007-06-22

    申请人： Thomas K. Gaylord ,  Justin L. Stay ,  Jonathan S. Maikisch ,  James D. Meindl

    发明人： Thomas K. Gaylord ,  Justin L. Stay ,  Jonathan S. Maikisch ,  James D. Meindl

    IPC分类号： G03F1/00 ,  G02B5/18

    CPC分类号： G02B5/1857 ,  G02B27/4238

    摘要： Photo-masks for fabricating surface-relief grating diffractive devices and methods of fabricating surface-relief grating diffractive devices are described. The photo-mask can include refractive elements and/or diffractive elements contained in or on a body element. The photo-mask can be used to simultaneously produce multiple surface-relief grating diffractive devices in a recording material. The photo-mask enables the surface-relief grating diffractive devices to be produced in large quantities while significantly reducing the cost and labor required.

    摘要翻译： 描述了用于制造表面浮雕光栅衍射装置的照相掩模和制造表面浮雕光栅衍射装置的方法。 光掩模可以包括包含在体元件中或其上的折射元件和/或衍射元件。 光掩模可用于在记录材料中同时产生多个表面浮雕光栅衍射装置。 光掩模使得能够大量地生产表面浮雕光栅衍射装置，同时显着降低所需的成本和劳动。