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    Bus monitor circuit and bus monitor method
    1.
    发明授权
    Bus monitor circuit and bus monitor method 有权
    总线监控电路和总线监控方式

    公开(公告)号：US09152524B2

    公开(公告)日：2015-10-06

    申请号：US13511559

    申请日：2010-11-24

    Applicant: Toshiki Takeuchi

    Inventor： Toshiki Takeuchi

    IPC: G06F3/00 ,  G06F5/00 ,  G06F13/00 ,  G06F11/30

    CPC classification number: G06F11/3027 ,  G06F11/3089

    Abstract: A bus monitor circuit includes an access info information/write data FIFO and a read data FIFO to produce a bus monitor output signal on a bus transmitting data between a master and a slave. In a write access ascribed to an attribute of the access information stored at a header of the access information/write data FIFO, the bus monitor circuit directly outputs a bus monitor output signal indicating the access information accompanied with the corresponding write data which is transmitted in the same cycle. In a read access ascribed to an attribute of the access information, the bus monitor circuit waits for the read data FIFO storing the corresponding read data, and then outputs a bus monitor output signal indicating the access information paired with the read data in the same cycle. This guarantees the occurrence order of bus access according to a bus interface protocol enabling pipeline transmission.

    Abstract translation: 总线监视器电路包括访问信息信息/写入数据FIFO和读取数据FIFO，以在总线上传输数据的总线监视器输出信号。 在存取在访问信息/写入数据FIFO的头部的访问信息的属性的写访问中，总线监视器电路直接输出一个总线监视器输出信号，该信号指示伴随着相应的写数据的访问信息， 同样的周期。 在归属于访问信息的属性的读取访问中，总线监控电路等待存储相应读取数据的读取数据FIFO，然后在同一周期中输出指示与读取数据配对的访问信息的总线监视器输出信号 。 这保证总线访问的发生顺序根据总线接口协议实现管道传输。

    Printing apparatus
    3.
    发明授权
    Printing apparatus 有权
    印刷装置

    公开(公告)号：US08757757B2

    公开(公告)日：2014-06-24

    申请号：US12964224

    申请日：2010-12-09

    Applicant: Toshiki Takeuchi ,  Koichiro Kawaguchi ,  Kengo Nieda

    Inventor： Toshiki Takeuchi ,  Koichiro Kawaguchi ,  Kengo Nieda

    IPC: B41J29/38

    CPC classification number: B41J25/308 ,  B41J3/60 ,  B41J11/008 ,  B41J11/70

    Abstract: An apparatus includes an adjusting mechanism configured to change a gap between a print head and a continuous sheet, and the adjusting mechanism controls the gap to be larger than that at the time of printing when a splice of the continuous sheet passes the print head. An unprintable area is set on each of the upstream side and the downstream side of the splice, each having at least a width corresponding to a sum of a length of the plurality of print heads in the direction of sheet conveyance and a distance of movement of the continuous sheet in a period required for the adjusting mechanism to change the gap, and the printing is continued while avoiding the unprintable area.

    Abstract translation: 一种装置，包括：调整机构，用于改变打印头和连续片材之间的间隙，当连续片材的接合通过打印头时，调节机构将间隙控制为大于打印时的间隙。 在接头的上游侧和下游侧的每个上设置不可打印区域，每个具有至少一个宽度对应于多个打印头在纸张传送方向上的长度和移动距离之和的宽度 连续片材在调整机构改变间隙所需的时间内，并且继续打印，同时避免不可印刷的区域。

    ENCODING/DECODING PROCESSOR AND WIRELESS COMMUNICATION APPARATUS
    4.
    发明申请
    ENCODING/DECODING PROCESSOR AND WIRELESS COMMUNICATION APPARATUS 有权
    编码/解码处理器和无线通信设备

    公开(公告)号：US20130322501A1

    公开(公告)日：2013-12-05

    申请号：US13984792

    申请日：2012-02-06

    Applicant: Toshiki Takeuchi ,  Hiroyuki Igura

    Inventor： Toshiki Takeuchi ,  Hiroyuki Igura

    IPC: H04L1/00

    CPC classification number: H04L1/0014 ,  H03M13/09 ,  H03M13/091 ,  H03M13/235 ,  H03M13/2707 ,  H03M13/2732 ,  H03M13/29 ,  H03M13/2957 ,  H03M13/41 ,  H03M13/6513 ,  H03M13/6516 ,  H03M13/6519 ,  H03M13/6561 ,  H04L1/0043 ,  H04L1/0052 ,  H04L1/0071

    Abstract: An encoding/decoding processor includes a coprocessor that is dedicated to encoding and decoding processes, where the coprocessor comprises: a parameter register that stores externally given operation modes and the settings of generation polynomials; and a calculation circuit that operates on the basis of the operation modes and the generation polynomials and that performs calculations, which are required for the encoding and decoding processes, by a plurality of bits per cycle in a parallel manner, and the coprocessor further comprises memory controllers, which include: address generator circuits for outputting the addresses of the storage devices; FIFO circuits for temporarily storing data; and data packing circuits for making up predetermined numbers of bits of data for output.

    Abstract translation: 编码/解码处理器包括专用于编码和解码处理的协处理器，其中协处理器包括：存储外部给定操作模式的参数寄存器和生成多项式的设置; 以及计算电路，其基于操作模式和生成多项式操作，并且以并行方式通过每个周期的多个位执行编码和解码处理所需的计算，并且协处理器还包括存储器 控制器，包括：用于输出存储设备的地址的地址发生器电路; 用于临时存储数据的FIFO电路; 以及用于构成用于输出的预定数量的数据位的数据打包电路。

    SYNCHRONIZATION PROCESSING CIRCUIT AND SYNCHRONIZATION PROCESSING METHOD IN WIRELESS COMMUNICATION SYSTEM
    6.
    发明申请
    SYNCHRONIZATION PROCESSING CIRCUIT AND SYNCHRONIZATION PROCESSING METHOD IN WIRELESS COMMUNICATION SYSTEM 有权
    无线通信系统中的同步处理电路和同步处理方法

    公开(公告)号：US20110274226A1

    公开(公告)日：2011-11-10

    申请号：US13144481

    申请日：2009-12-21

    Applicant: Toshiki Takeuchi

    Inventor： Toshiki Takeuchi

    IPC: H04W56/00

    CPC classification number: H04B1/7095 ,  H04B1/70735 ,  H04B1/7075 ,  H04B1/7093 ,  H04B2201/70711

    Abstract: In a synchronization processing circuit in a wireless communication system, a correlation operation unit is designed to have a parallel structure which can be restructured to improve flexibility in order to cope with various synchronization processings in a plurality of radio systems.The synchronization processing circuit in the wireless communication system comprises a plurality of correlation operation modules 31 through 3N that execute correlation operation, each of which correlation operation modules includes a plurality of correlators 60, a plurality of shift registers 50 for shifting a correlation code, an interface which transfers a shifted correlation code to an adjacent correlation operation unit for timing correlation processing, and a correlation code selection unit 40 which selects an externally and individually applied correlation code for code correlation processing and a correlation code transferred from an adjacent correlation operation unit as the correlation code.

    Abstract translation: 在无线通信系统中的同步处理电路中，相关运算部被设计为具有可重构的并行结构，以提高灵活性，以应对多个无线电系统中的各种同步处理。 无线通信系统中的同步处理电路包括执行相关操作的多个相关运算模块31至3N，每个相关运算模块包括多个相关器60，用于移位相关码的多个移位寄存器50， 将相移代码转移到用于定时相关处理的相邻相关运算单元的接口，以及相关代码选择单元40，其选择用于代码相关处理的外部和单独应用的相关代码和从相邻相关运算单元传送的相关代码作为 相关代码。

    BOTH-SIDE RECORDING APPARATUS
    7.
    发明申请
    BOTH-SIDE RECORDING APPARATUS 审中-公开
    双面录音设备

    公开(公告)号：US20110135372A1

    公开(公告)日：2011-06-09

    申请号：US12948600

    申请日：2010-11-17

    Applicant: Ryosuke Sato ,  Yasuhiko Ikeda ,  Masahito Yoshida ,  Koichiro Kawaguchi ,  Kenji Shigeno ,  Toshiki Takeuchi ,  Masato Izumi ,  Kengo Nieda

    Inventor： Ryosuke Sato ,  Yasuhiko Ikeda ,  Masahito Yoshida ,  Koichiro Kawaguchi ,  Kenji Shigeno ,  Toshiki Takeuchi ,  Masato Izumi ,  Kengo Nieda

    IPC: B41J15/02

    CPC classification number: B41J3/60 ,  B41J15/04

    Abstract: A both-side recording apparatus that enables both-side recording on continuous paper using a single recording head, without cutting the continuous paper at an intermediate position, is provided. Reduction in size and costs of the apparatus is achieved by eliminating a conveying path dedicated to both-side recording. The apparatus includes a paper-feeder that feeds continuous paper, a recording head that records an image on the continuous paper, a reversing unit that reverses the continuous paper such that a recording surface of the continuous paper facing the recording head is reversed, and a rewinding mechanism that rewinds the fed continuous paper to the paper-feeder. During both-side recording, recording is performed on the back side of the continuous paper by rewinding the continuous paper by the rewinding mechanism, setting the back side of the continuous paper to oppose the recording head by the reversing unit, and feeding the continuous paper from the paper-feeder.

    Abstract translation: 提供了一种使用单个记录头在连续纸上进行双面记录而不在中间位置切断连续纸的双面记录装置。 通过消除专用于双面记录的输送路径来实现装置的尺寸和成本的降低。 该装置包括：供纸装置，连续纸张供给装置，将连续纸张上的图像记录在记录头上;反转装置，其使连续纸张反转，使连续纸张的记录面向记录头反转， 将进纸的连续纸张倒回送纸器的倒带机构。 在双面记录期间，通过倒带机构倒卷连续纸张，在连续纸张的背面进行记录，将连续纸的背面设置为与反转单元相对的记录头，并将连续纸张 从送纸器。

    DATA ENCRYPTION/DECRYPTION METHOD AND DATA PROCESSING DEVICE
    8.
    发明申请
    DATA ENCRYPTION/DECRYPTION METHOD AND DATA PROCESSING DEVICE 有权
    数据加密/解码方法和数据处理设备

    公开(公告)号：US20100322419A1

    公开(公告)日：2010-12-23

    申请号：US12667156

    申请日：2008-07-02

    Applicant: Toshiki Takeuchi ,  Hiroyuki Igura

    Inventor： Toshiki Takeuchi ,  Hiroyuki Igura

    IPC: H04L9/00

    CPC classification number: H04L9/065 ,  H04L2209/122 ,  H04L2209/125

    Abstract: It is possible to improve a radio communication digital baseband processing device including data encryption/decryption so as to prevent processing failure caused by a data rate increase in recent years by increasing the MAC processing speed of data encryption/decryption and realizing the load distribution in a processing device. A data processing device which performs a communication process including data encryption/decryption includes: a control processor which performs calculation of the MAC processing parameter; and MAC processing means which performs MAC data processing including data encryption/decryption. The control processor controls the MAC processing means by a command script continuously describing a combination of a command and parameter accompanying it.

    Abstract translation: 通过增加数据加密/解密的MAC处理速度，实现数据加密/解密的负载分布，可以改善包括数据加密/解密的无线电通信数字基带处理装置，以防止近年来由于数据速率增加引起的处理失败 处理装置。 执行包括数据加密/解密的通信处理的数据处理装置包括：执行MAC处理参数的计算的控制处理器; 以及MAC处理装置，其执行包括数据加密/解密的MAC数据处理。 控制处理器通过连续描述伴随的命令和参数的组合的命令脚本来控制MAC处理装置。

    Co-processor for complex arithmetic processing, and processor system
    9.
    发明授权
    Co-processor for complex arithmetic processing, and processor system 有权
    用于复杂算术处理的协处理器和处理器系统

    公开(公告)号：US09383994B2

    公开(公告)日：2016-07-05

    申请号：US13982526

    申请日：2011-09-15

    Applicant: Toshiki Takeuchi ,  Hiroyuki Igura

    Inventor： Toshiki Takeuchi ,  Hiroyuki Igura

    IPC: G06F9/00 ,  G06F9/30 ,  G06F7/48 ,  G06F9/38 ,  G06F7/57 ,  H04B1/7115

    CPC classification number: G06F9/3001 ,  G06F7/4806 ,  G06F7/57 ,  G06F9/3013 ,  G06F9/30145 ,  G06F9/3877 ,  H04B1/7115

    Abstract: In order to enable to quickly and efficiently execute, by one system, various modulation/demodulation/synchronous processes in a plurality of radio communication methods, a co-processor (22) for complex arithmetic processing, which forms a processor system (100), includes a complex arithmetic circuit (22) that executes for complex data a complex arithmetic operation required for radio communication in accordance with an instruction from a primary processor (10), and a memory controller (20, 21) that operates in parallel with the complex arithmetic circuit and accesses a memory. A trace circuit provided in the complex arithmetic circuit (22) monitors arithmetic result data for first complex data series sequentially read from the memory, and detects a normalization coefficient for normalizing the arithmetic result data.

    Abstract translation: 为了能够通过一个系统快速有效地执行多个无线电通信方法中的各种调制/解调/同步过程，用于形成处理器系统（100）的用于复杂运算处理的协处理器（22） 包括：复数运算电路（22），用于根据来自主处理器（10）的指令对复数数据执行无线电通信所需的复杂算术运算，以及存储器控制器（20,21），其与所述复合体并行操作 算术电路并访问存储器。 在复数运算电路（22）中提供的跟踪电路监视从存储器顺序读取的第一复数数据序列的运算结果数据，并检测归一化系数以归一化运算结果数据。

    Recording apparatus
    10.
    发明授权
    Recording apparatus 有权
    记录装置

    公开(公告)号：US08979231B2

    公开(公告)日：2015-03-17

    申请号：US13368086

    申请日：2012-02-07

    Applicant: Kengo Nieda ,  Kazuya Koizumi ,  Satoshi Azuma ,  Koichiro Kawaguchi ,  Toshiki Takeuchi ,  Shigeru Toriihara

    Inventor： Kengo Nieda ,  Kazuya Koizumi ,  Satoshi Azuma ,  Koichiro Kawaguchi ,  Toshiki Takeuchi ,  Shigeru Toriihara

    IPC: B41J29/38

    CPC classification number: B41J29/38

    Abstract: A recording apparatus includes a recording head, a roller configured to convey a recording medium, an acquisition unit configured to acquire information about a conveyance amount for conveying the recording medium per a predetermined rotation amount of the roller, a recording timing generation unit configured to generate a plurality of timing signals for performing recording for one raster line according to a rotation of the roller during one rotation thereof, and a drive signal generation unit configured to generate a drive reference signal for performing the recording for the one raster line on the recording medium at a predetermined interval based on the conveyance amount information and the timing signal.

    Abstract translation: 一种记录装置，包括记录头，被配置为传送记录介质的辊，获取单元，被配置为获取关于每个辊的预定旋转量传送记录介质的输送量的信息;记录定时生成单元， 多个定时信号，用于根据所述辊在其一次旋转期间的旋转执行用于一个光栅线的记录;以及驱动信号生成单元，被配置为产生用于对所述记录介质上的所述一条光栅线执行记录的驱动参考信号 基于传送量信息和定时信号以预定间隔。

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