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公开(公告)号：US5429957A
公开(公告)日：1995-07-04
申请号：US286955
申请日：1994-08-08
IPC分类号： H01L29/205 , H01L21/331 , H01L29/10 , H01L29/73 , H01L29/737 , H01L21/203 , H01L29/201 , H01L29/207
CPC分类号： H01L29/7371 , H01L29/1004 , Y10S148/072 , Y10S438/936
摘要： A base layer interposed between an n-type GaAs collector layer and an n-type AlGaAs emitter layer is composed of a p-type InAlGaAs. From a collector/base interface to an emitter/base interface, an InAs composition of the base layer is decreased and a concentration of carbon as a p-type impurity thereof is increased so as to obtain a built-in internal field intensity in the base layer by a cooperative effect of the graded-bandgap and the impurity concentration gradient, thus reducing a base transit time of electrons. The base layer is fabricated according to MOMBE using TMG as a gallium source, controlling the InAs composition, so that a desired carbon concentration gradient is automatically formed. Thereby, a high performance, heterojunction bipolar transistor with an increased built-in internal field intensity in the base layer is obtained.
摘要翻译： 介于n型GaAs集电极层和n型AlGaAs发射极层之间的基极层由p型InAlGaAs构成。 从集电极/基极界面到发射极/基极界面，降低了基极层的InAs组分，并且增加了作为p型杂质的碳浓度，以便在基底中获得内置的内部场强 通过渐变带隙和杂质浓度梯度的协同效应，从而减少电子的基极传播时间。 使用TMG作为镓源，根据MOMBE制造基层，控制InAs组成，从而自动形成所需的碳浓度梯度。 因此，获得了在基极层中具有增加的内部内部场强的高性能异质结双极晶体管。
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2.发明授权
公开(公告)号：US5371389A
公开(公告)日：1994-12-06
申请号：US101685
申请日：1993-08-04
IPC分类号： H01L29/205 , H01L21/331 , H01L29/10 , H01L29/73 , H01L29/737 , H01L29/161 , H01L29/225
CPC分类号： H01L29/7371 , H01L29/1004 , Y10S148/072 , Y10S438/936
摘要： A base layer interposed between an n-type GaAs collector layer and an n-type AlGaAs emitter layer is composed of a p-type InAlGaAs. From a collector/base interface to an emitter/base interface, an InAs composition of the base layer is decreased and a concentration of carbon as a p-type impurity thereof is increased so as to obtain a built-in internal field intensity in the base layer by a cooperative effect of the graded-bandgap and the impurity concentration gradient, thus reducing a base transit time of electrons. The base layer is fabricated according to MOMBE using TMG as a gallium source, controlling the InAs composition, so that a desired carbon concentration gradient is automatically formed. Thereby, a high performance heterojunction bipolar transistor with an increased built-in internal field intensity in the base layer is obtained.
摘要翻译： 介于n型GaAs集电极层和n型AlGaAs发射极层之间的基极层由p型InAlGaAs构成。 从集电极/基极界面到发射极/基极界面，降低了基极层的InAs组分，并且增加了作为p型杂质的碳浓度，以便在基底中获得内置的内部场强 通过渐变带隙和杂质浓度梯度的协同效应，从而减少电子的基极传播时间。 使用TMG作为镓源，根据MOMBE制造基层，控制InAs组成，从而自动形成所需的碳浓度梯度。 从而获得了在基极层中具有增加的内部内部场强的高性能异质结双极晶体管。
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公开(公告)号：US5289020A
公开(公告)日：1994-02-22
申请号：US913316
申请日：1992-07-15
申请人： Takashi Hirose , Toshinobu Matsuno , Kaoru Inoue
发明人： Takashi Hirose , Toshinobu Matsuno , Kaoru Inoue
IPC分类号： H01L29/205 , H01L21/331 , H01L29/73 , H01L29/737 , H01L31/072 , H01L27/102 , H01L31/109
CPC分类号： H01L29/66318 , H01L29/7371
摘要： A heterojunction bipolar transistor includes a first emitter region. A second emitter region extends on the first emitter region and is connected to the first emitter region via a junction. The second emitter region has a forbidden band gap wider than a forbidden band gap of the first emitter region. At the junction, the second emitter region has a carrier energy level substantially equal to a carrier energy level of the first emitter region. An intrinsic base region extends on the second emitter region and has a forbidden band gap narrower than the forbidden band gap of the second emitter region. A collector region extends on the intrinsic base region. An extrinsic base region extends outward of the intrinsic base region and contacts the intrinsic base region and the second emitter region. The extrinsic base region separates from the first emitter region. A portion of the extrinsic base region which adjoins the second emitter region has a forbidden band gap substantially equal to the forbidden band gap of the second emitter region. A high-resistivity region extends underneath the extrinsic base region.
摘要翻译： 异质结双极晶体管包括第一发射极区域。 第二发射极区域在第一发射极区域上延伸并且经由接头连接到第一发射极区域。 第二发射极区域具有比第一发射极区域的禁带宽宽的禁带宽。 在结处，第二发射极区域具有基本上等于第一发射极区域的载流子能级的载流子能级。 本征基极区域延伸在第二发射极区域上，并且具有比第二发射极区域的禁带宽窄的禁带宽。 集电极区域在内部基极区域上延伸。 外部基极区域延伸到本征基极区域的外部并与本征基极区域和第二发射极区域接触。 外部基极区域与第一发射极区域分离。 邻接第二发射极区域的外部基极区域的一部分具有基本上等于第二发射极区域的禁带宽的禁带宽度。 高电阻率区域在外部基极区域的下方延伸。
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公开(公告)号：US06593193B2
公开(公告)日：2003-07-15
申请号：US10054843
申请日：2002-01-25
IPC分类号： H01L21336
CPC分类号： H01L29/66462 , H01L21/28264 , H01L29/2003 , H01L29/7783
摘要： An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.
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公开(公告)号：US07585706B2
公开(公告)日：2009-09-08
申请号：US11898951
申请日：2007-09-18
IPC分类号： H01L21/336
CPC分类号： H01L29/66863 , H01L29/2003 , H01L29/205 , H01L29/66462 , H01L29/7783
摘要： The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.
摘要翻译： 本发明的半导体器件包括由在衬底上生长的III族氮化物半导体形成的有源区和通过氧化III族氮化物半导体而形成在有源区的周边部分中的绝缘氧化物膜。 在有源区域上，形成与延伸到绝缘氧化膜上并在绝缘氧化膜上具有延伸部分的有源区肖特基接触的栅电极，分别用作源电极和漏电极的欧姆电极形成有 沿着栅电极的栅极长度方向的侧边缘的空间。
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6.发明授权Semiconductor device having an active region formed from group III nitride 有权具有由III族氮化物形成的有源区的半导体器件公开(公告)号：US07285806B2
公开(公告)日：2007-10-23
申请号：US09813304
申请日：2001-03-21
IPC分类号： H01L31/00 , H01L21/336
CPC分类号： H01L29/66863 , H01L29/2003 , H01L29/205 , H01L29/66462 , H01L29/7783
摘要： The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.
摘要翻译： 本发明的半导体器件包括由在衬底上生长的III族氮化物半导体形成的有源区和通过氧化III族氮化物半导体而形成在有源区的周边部分中的绝缘氧化物膜。 在有源区域上，形成与延伸到绝缘氧化膜上并在绝缘氧化膜上具有延伸部分的有源区肖特基接触的栅电极，分别用作源电极和漏电极的欧姆电极形成有 沿着栅电极的栅极长度方向的侧边缘的空间。
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公开(公告)号：US07307292B2
公开(公告)日：2007-12-11
申请号：US10456901
申请日：2003-06-09
IPC分类号： H01L31/0336
CPC分类号： H01L29/66462 , H01L21/28264 , H01L29/2003 , H01L29/7783
摘要： An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.
摘要翻译： 绝缘栅半导体器件具有形成在衬底上的第一氮化物半导体层和通过氧化形成在第一氮化物半导体层上的第二氮化物半导体层而获得的绝缘氧化层。 在绝缘氧化层上形成栅电极。
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公开(公告)号：US06323538B1
公开(公告)日：2001-11-27
申请号：US09480942
申请日：2000-01-11
IPC分类号： H01L27082
CPC分类号： H01L29/66265 , H01L29/7317
摘要： An n-type first single crystal silicon layer is provided as collector region over a silicon substrate with a first insulating film interposed therebetween. A p-type first polysilicon layer is provided as an extension of a base region over the first single crystal silicon layer with a second insulating film interposed therebetween. A p-type second single crystal silicon layer is provided as intrinsic base region on a side of the first single crystal silicon layer, second insulating film and first polysilicon layer. An n-type third single crystal silicon layer is provided as emitter region on a side of the second single crystal silicon layer. And an n-type third polysilicon layer is provided on the first insulating film as extension of an emitter region and is connected to a side of the third single crystal silicon layer.
摘要翻译： 在硅衬底上设置n型第一单晶硅层作为集电极区域，其间插入有第一绝缘膜。 提供p型第一多晶硅层作为第一单晶硅层上的基极区域的延伸，其间插入第二绝缘膜。 在第一单晶硅层，第二绝缘膜和第一多晶硅层的一侧设置p型第二单晶硅层作为本征基极区域。 在第二单晶硅层的一侧设置n型第三单晶硅层作为发射极区域。 并且在第一绝缘膜上设置n型第三多晶硅层作为发射极区域的延伸并且连接到第三单晶硅层的一侧。
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公开(公告)号：US5751030A
公开(公告)日：1998-05-12
申请号：US806798
申请日：1997-02-26
IPC分类号： H01L29/10 , H01L29/812 , H01L31/0328
CPC分类号： H01L29/8128 , H01L29/1029
摘要： On a GaAs substrate are provided a buffer layer comprising an Undope-GaAs layer, a first n-InGaAs layer having an In composition ratio of 0.2, a second n-InGaAs layer having an In composition ratio of 0.02, a contact layer comprising an N.sup.+ type GaAs layer, a gate electrode, a source electrode, and a drain electrode. The first n-InGaAs layer and the second n-InGaAs layer form active layers in which an operating current flows. The second n-InGaAs layer having excellent crystallinity is formed on the first n-InGaAs layer. Consequently, a field effect transistor which displays a super low distortion characteristic having IP2 of 67.2 dBm and IP3 of 35 dBm can be manufactured with good reproducibility.
摘要翻译： 在GaAs衬底上设置缓冲层，其包括Undope-GaAs层，In组成比为0.2的第一n-InGaAs层，In组成比为0.02的第二n-InGaAs层，包含N + 型GaAs层，栅电极，源电极和漏电极。 第一n-InGaAs层和第二n-InGaAs层形成其中工作电流流动的有源层。 在第一n-InGaAs层上形成具有优异结晶度的第二n-InGaAs层。 因此，可以以良好的再现性制造出具有IP2为67.2dBm，IP3为35dBm的超低失真特性的场效应晶体管。
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公开(公告)号：US06653714B2
公开(公告)日：2003-11-25
申请号：US10300440
申请日：2002-11-20
IPC分类号： H01L27082
CPC分类号： H01L29/66242 , H01L29/7317
摘要： A lateral bipolar transistor includes: a substrate; a first insulative region formed on the substrate; a first semiconductor region of a first conductivity type selectively formed on the first insulative region; a second insulative region formed so as to substantially cover the first semiconductor region; and a second semiconductor region of a second conductivity type different from the first conductivity type, a second semiconductor region being selectively formed, wherein: the second insulative region has a first opening which reaches a surface of the first semiconductor region, and the first semiconductor region has a second opening which reaches the underlying first insulative region, the second opening being provided in a position corresponding to the first opening of the second insulative region; the second semiconductor region is formed so as to fill the first opening and the second opening, thereby functioning as a base region; a lower portion of the second semiconductor region which at least fills the second opening is formed by lateral growth from a face of the first semiconductor region defining a side wall of the second opening; and the first semiconductor region includes an emitter region and a collector region formed therein.
摘要翻译： 横向双极晶体管包括：衬底; 形成在所述基板上的第一绝缘区域; 选择性地形成在所述第一绝缘区域上的第一导电类型的第一半导体区域; 形成为基本上覆盖所述第一半导体区域的第二绝缘区域; 以及与第一导电类型不同的第二导电类型的第二半导体区域，选择性地形成第二半导体区域，其中：第二绝缘区域具有到达第一半导体区域的表面的第一开口，第一半导体区域 具有到达下面的第一绝缘区域的第二开口，第二开口设置在与第二绝缘区域的第一开口对应的位置; 第二半导体区域形成为填充第一开口和第二开口，从而起基底区域的作用; 至少填充第二开口的第二半导体区域的下部通过从限定第二开口的侧壁的第一半导体区域的表面横向生长形成; 并且第一半导体区域包括形成在其中的发射极区域和集电极区域。
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