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公开(公告)号：US06323538B1
公开(公告)日：2001-11-27
申请号：US09480942
申请日：2000-01-11
IPC分类号： H01L27082
CPC分类号： H01L29/66265 , H01L29/7317
摘要： An n-type first single crystal silicon layer is provided as collector region over a silicon substrate with a first insulating film interposed therebetween. A p-type first polysilicon layer is provided as an extension of a base region over the first single crystal silicon layer with a second insulating film interposed therebetween. A p-type second single crystal silicon layer is provided as intrinsic base region on a side of the first single crystal silicon layer, second insulating film and first polysilicon layer. An n-type third single crystal silicon layer is provided as emitter region on a side of the second single crystal silicon layer. And an n-type third polysilicon layer is provided on the first insulating film as extension of an emitter region and is connected to a side of the third single crystal silicon layer.
摘要翻译： 在硅衬底上设置n型第一单晶硅层作为集电极区域，其间插入有第一绝缘膜。 提供p型第一多晶硅层作为第一单晶硅层上的基极区域的延伸，其间插入第二绝缘膜。 在第一单晶硅层，第二绝缘膜和第一多晶硅层的一侧设置p型第二单晶硅层作为本征基极区域。 在第二单晶硅层的一侧设置n型第三单晶硅层作为发射极区域。 并且在第一绝缘膜上设置n型第三多晶硅层作为发射极区域的延伸并且连接到第三单晶硅层的一侧。
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公开(公告)号：US06653714B2
公开(公告)日：2003-11-25
申请号：US10300440
申请日：2002-11-20
IPC分类号： H01L27082
CPC分类号： H01L29/66242 , H01L29/7317
摘要： A lateral bipolar transistor includes: a substrate; a first insulative region formed on the substrate; a first semiconductor region of a first conductivity type selectively formed on the first insulative region; a second insulative region formed so as to substantially cover the first semiconductor region; and a second semiconductor region of a second conductivity type different from the first conductivity type, a second semiconductor region being selectively formed, wherein: the second insulative region has a first opening which reaches a surface of the first semiconductor region, and the first semiconductor region has a second opening which reaches the underlying first insulative region, the second opening being provided in a position corresponding to the first opening of the second insulative region; the second semiconductor region is formed so as to fill the first opening and the second opening, thereby functioning as a base region; a lower portion of the second semiconductor region which at least fills the second opening is formed by lateral growth from a face of the first semiconductor region defining a side wall of the second opening; and the first semiconductor region includes an emitter region and a collector region formed therein.
摘要翻译： 横向双极晶体管包括：衬底; 形成在所述基板上的第一绝缘区域; 选择性地形成在所述第一绝缘区域上的第一导电类型的第一半导体区域; 形成为基本上覆盖所述第一半导体区域的第二绝缘区域; 以及与第一导电类型不同的第二导电类型的第二半导体区域，选择性地形成第二半导体区域，其中：第二绝缘区域具有到达第一半导体区域的表面的第一开口，第一半导体区域 具有到达下面的第一绝缘区域的第二开口，第二开口设置在与第二绝缘区域的第一开口对应的位置; 第二半导体区域形成为填充第一开口和第二开口，从而起基底区域的作用; 至少填充第二开口的第二半导体区域的下部通过从限定第二开口的侧壁的第一半导体区域的表面横向生长形成; 并且第一半导体区域包括形成在其中的发射极区域和集电极区域。
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公开(公告)号：US06503808B1
公开(公告)日：2003-01-07
申请号：US09687251
申请日：2000-10-13
IPC分类号： H01L21331
CPC分类号： H01L29/66242 , H01L29/7317
摘要： A lateral bipolar transistor includes: a substrate; a first insulative region formed on the substrate; a first semiconductor region of a first conductivity type selectively formed on the first insulative region; a second insulative region formed so as to substantially cover the first semiconductor region; and a second semiconductor region of a second conductivity type different from the first conductivity type, a second semiconductor region being selectively formed, wherein: the second insulative region has a first opening which reaches a surface of the first semiconductor region, and the first semiconductor region has a second opening which reaches the underlying first insulative region, the second opening being provided in a position corresponding to the first opening of the second insulative region; the second semiconductor region is formed so as to fill the first opening and the second opening, thereby functioning as a bass region; a lower portion of the second semiconductor region which at least fills the second opening is formed by lateral growth from a face of the first semiconductor region defining a side wall of the second opening; and the first semiconductor region includes an emitter region and a collector region formed therein.
摘要翻译： 横向双极晶体管包括：衬底; 形成在所述基板上的第一绝缘区域; 选择性地形成在所述第一绝缘区域上的第一导电类型的第一半导体区域; 形成为基本上覆盖所述第一半导体区域的第二绝缘区域; 以及与第一导电类型不同的第二导电类型的第二半导体区域，选择性地形成第二半导体区域，其中：第二绝缘区域具有到达第一半导体区域的表面的第一开口，第一半导体区域 具有到达下面的第一绝缘区域的第二开口，第二开口设置在与第二绝缘区域的第一开口对应的位置; 第二半导体区域形成为填充第一开口和第二开口，从而起低音区域的作用; 至少填充第二开口的第二半导体区域的下部通过从限定第二开口的侧壁的第一半导体区域的表面横向生长形成; 并且第一半导体区域包括形成在其中的发射极区域和集电极区域。
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公开(公告)号：US07585706B2
公开(公告)日：2009-09-08
申请号：US11898951
申请日：2007-09-18
IPC分类号： H01L21/336
CPC分类号： H01L29/66863 , H01L29/2003 , H01L29/205 , H01L29/66462 , H01L29/7783
摘要： The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.
摘要翻译： 本发明的半导体器件包括由在衬底上生长的III族氮化物半导体形成的有源区和通过氧化III族氮化物半导体而形成在有源区的周边部分中的绝缘氧化物膜。 在有源区域上，形成与延伸到绝缘氧化膜上并在绝缘氧化膜上具有延伸部分的有源区肖特基接触的栅电极，分别用作源电极和漏电极的欧姆电极形成有 沿着栅电极的栅极长度方向的侧边缘的空间。
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公开(公告)号：US06593193B2
公开(公告)日：2003-07-15
申请号：US10054843
申请日：2002-01-25
IPC分类号： H01L21336
CPC分类号： H01L29/66462 , H01L21/28264 , H01L29/2003 , H01L29/7783
摘要： An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.
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公开(公告)号：US07307292B2
公开(公告)日：2007-12-11
申请号：US10456901
申请日：2003-06-09
IPC分类号： H01L31/0336
CPC分类号： H01L29/66462 , H01L21/28264 , H01L29/2003 , H01L29/7783
摘要： An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.
摘要翻译： 绝缘栅半导体器件具有形成在衬底上的第一氮化物半导体层和通过氧化形成在第一氮化物半导体层上的第二氮化物半导体层而获得的绝缘氧化层。 在绝缘氧化层上形成栅电极。
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公开(公告)号：US6153499A
公开(公告)日：2000-11-28
申请号：US289946
申请日：1999-04-13
申请人： Yoshiharu Anda , Toshinobu Matsuno , Katsunori Nishii , Kaoru Inoue , Manabu Yanagihara , Mitsuru Tanabe
发明人： Yoshiharu Anda , Toshinobu Matsuno , Katsunori Nishii , Kaoru Inoue , Manabu Yanagihara , Mitsuru Tanabe
IPC分类号： H01L21/28 , H01L21/027 , H01L21/285 , H01L21/338 , H01L21/768 , H01L29/812 , H01L21/44
CPC分类号： H01L21/28581 , H01L21/0271 , H01L21/0277 , H01L21/76816 , Y10S438/949
摘要： A first resist film for EB exposure, a buffer film, and a second resist film for i-line exposure are applied sequentially onto a substrate. Thereafter, the second resist film and the buffer film are subjected to patterning for forming a first opening. Then, dry etching is performed with respect to the first resist film masked with the second resist film to transfer the pattern of the second resist film to the first resist film and thereby form a second opening in the first resist film. Subsequently, a third resist film of chemically amplified type is applied to the entire surface of the first resist film to form a mixing layer in conjunction with the first resist film. As a result, the wall faces of the second opening are covered with the mixing layer and the width of the second opening is thereby reduced.
摘要翻译： 用于EB曝光的第一抗蚀剂膜，缓冲膜和用于i线曝光的第二抗蚀剂膜顺序地施加到基板上。 此后，对第二抗蚀剂膜和缓冲膜进行用于形成第一开口的图案化。 然后，相对于用第二抗蚀剂膜掩蔽的第一抗蚀剂膜进行干蚀刻，将第二抗蚀剂膜的图案转印到第一抗蚀剂膜上，从而在第一抗蚀剂膜中形成第二开口。 随后，将化学放大型的第三抗蚀剂膜施加到第一抗蚀剂膜的整个表面上以与第一抗蚀剂膜结合形成混合层。 结果，第二开口的壁面被混合层覆盖，从而减小了第二开口的宽度。
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8.发明授权Semiconductor device having an active region formed from group III nitride 有权具有由III族氮化物形成的有源区的半导体器件公开(公告)号：US07285806B2
公开(公告)日：2007-10-23
申请号：US09813304
申请日：2001-03-21
IPC分类号： H01L31/00 , H01L21/336
CPC分类号： H01L29/66863 , H01L29/2003 , H01L29/205 , H01L29/66462 , H01L29/7783
摘要： The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.
摘要翻译： 本发明的半导体器件包括由在衬底上生长的III族氮化物半导体形成的有源区和通过氧化III族氮化物半导体而形成在有源区的周边部分中的绝缘氧化物膜。 在有源区域上，形成与延伸到绝缘氧化膜上并在绝缘氧化膜上具有延伸部分的有源区肖特基接触的栅电极，分别用作源电极和漏电极的欧姆电极形成有 沿着栅电极的栅极长度方向的侧边缘的空间。
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公开(公告)号：US5751030A
公开(公告)日：1998-05-12
申请号：US806798
申请日：1997-02-26
IPC分类号： H01L29/10 , H01L29/812 , H01L31/0328
CPC分类号： H01L29/8128 , H01L29/1029
摘要： On a GaAs substrate are provided a buffer layer comprising an Undope-GaAs layer, a first n-InGaAs layer having an In composition ratio of 0.2, a second n-InGaAs layer having an In composition ratio of 0.02, a contact layer comprising an N.sup.+ type GaAs layer, a gate electrode, a source electrode, and a drain electrode. The first n-InGaAs layer and the second n-InGaAs layer form active layers in which an operating current flows. The second n-InGaAs layer having excellent crystallinity is formed on the first n-InGaAs layer. Consequently, a field effect transistor which displays a super low distortion characteristic having IP2 of 67.2 dBm and IP3 of 35 dBm can be manufactured with good reproducibility.
摘要翻译： 在GaAs衬底上设置缓冲层，其包括Undope-GaAs层，In组成比为0.2的第一n-InGaAs层，In组成比为0.02的第二n-InGaAs层，包含N + 型GaAs层，栅电极，源电极和漏电极。 第一n-InGaAs层和第二n-InGaAs层形成其中工作电流流动的有源层。 在第一n-InGaAs层上形成具有优异结晶度的第二n-InGaAs层。 因此，可以以良好的再现性制造出具有IP2为67.2dBm，IP3为35dBm的超低失真特性的场效应晶体管。
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公开(公告)号：US08354693B2
公开(公告)日：2013-01-15
申请号：US12035340
申请日：2008-02-21
申请人： Mitsuyoshi Mori , Toru Okino , Daisuke Ueda , Toshinobu Matsuno
发明人： Mitsuyoshi Mori , Toru Okino , Daisuke Ueda , Toshinobu Matsuno
IPC分类号： H01L31/0336
CPC分类号： H01L27/14689 , H01L27/14632 , H01L27/14645 , H01L27/14687
摘要： A solid state imaging device includes a pixel having a photoelectric conversion element formed on a semiconductor substrate. The photoelectric conversion element includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer and forming a junction therebetween; a third semiconductor layer formed on the second semiconductor layer and having a smaller band gap energy than the second semiconductor layer, the third semiconductor layer being made of a single-crystal semiconductor and containing an impurity; and a fourth semiconductor layer of the first conductivity type covering a side surface and an upper surface of the third semiconductor layer. Provision of the fourth semiconductor layer can reduce a current flowing in dark conditions.
摘要翻译： 固态成像装置包括具有形成在半导体基板上的光电转换元件的像素。 光电转换元件包括：第一导电类型的第一半导体层; 第二导电类型的第二半导体层，形成在第一半导体层上并在其间形成接合部; 形成在所述第二半导体层上并且具有比所述第二半导体层更小的带隙能量的第三半导体层，所述第三半导体层由单晶半导体制成并且含有杂质; 以及覆盖第三半导体层的侧表面和上表面的第一导电类型的第四半导体层。 提供第四半导体层可以减少在黑暗条件下流动的电流。
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