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公开(公告)号：US5470778A
公开(公告)日：1995-11-28
申请号：US251866
申请日：1994-05-31
申请人： Toshiyuki Nagata , Hiroyuki Yoshida , Takayuki Niuya , Yoshihiro Ogata , Katsushi Boku , Yoichi Miyai
发明人： Toshiyuki Nagata , Hiroyuki Yoshida , Takayuki Niuya , Yoshihiro Ogata , Katsushi Boku , Yoichi Miyai
IPC分类号： H01L21/205 , H01L21/265 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108
CPC分类号： H01L27/10861 , H01L27/10829
摘要： A semiconductor device in which a trench-shaped groove (20) and a depression (100), which is formed by removing at least part of the area above and adjacent to the groove, are formed to be continuous on one side of the semiconductor substrate, in which aforementioned groove and aforementioned depression is buried a polysilicon conductive layer (103), the top of which conductive layer is converted into an insulator (102), the bottom of which insulating film (102) is contained in the depression (100).
摘要翻译： 一种半导体器件，其中沟槽形沟槽（20）和凹陷（100）形成为在半导体衬底的一侧上是连续的 其中上述凹槽和上述凹陷掩埋有多晶硅导电层（103），其导电层的顶部被转换成绝缘体（102），其绝缘膜（102）的底部包含在凹陷（100）中， 。
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公开(公告)号：US5317177A
公开(公告)日：1994-05-31
申请号：US889323
申请日：1992-05-27
申请人： Toshiyuki Nagata , Hiroyuki Yoshida , Takayuki Niuya , Yoshihiro Ogata , Katsushi Boku , Yoichi Miyai
发明人： Toshiyuki Nagata , Hiroyuki Yoshida , Takayuki Niuya , Yoshihiro Ogata , Katsushi Boku , Yoichi Miyai
IPC分类号： H01L21/205 , H01L21/265 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108 , H01L29/68 , H01L29/78 , H01L29/92
CPC分类号： H01L27/10861 , H01L27/10829
摘要： A semiconductor device in which a trench-shaped groove (20) and a depression (100), which is formed by removing at least part of the area above and adjacent to the groove, are formed to be continuous on one side of the semiconductor substrate, in which aforementioned groove and aforementioned depression is buried a polysilicon conductive layer (103), the top of which conductive layer is converted into an insulator (102), the bottom of which insulating film (102) is contained in the depression (100). It is possible to form the element areas according to designs, and it is also possible to flatten the surface without wire cutting in the conductive layer.
摘要翻译： 一种半导体器件，其中沟槽形沟槽（20）和凹陷（100）形成为在半导体衬底的一侧上是连续的 其中上述凹槽和上述凹陷掩埋有多晶硅导电层（103），其导电层的顶部被转换成绝缘体（102），其绝缘膜（102）的底部包含在凹部（100）中， 。 可以根据设计形成元件区域，并且还可以在导电层中没有线切割的同时使表面变平。
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公开(公告)号：US5861649A
公开(公告)日：1999-01-19
申请号：US871530
申请日：1992-04-21
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L27/10 , H01L27/108 , H01L29/92 , H01L29/76
CPC分类号： H01L27/10861 , H01L27/10829 , H01L28/40
摘要： A dynamic RAM in which a groove (20) is formed on the main surface of a semiconductor substrate; a highly concentrated semiconductor layer (80) having one conductive type is formed inside the groove (20) to a depth sufficient to contain the first and second impurity diffusion areas (53) and (22), which are formed on the top of this groove and have the opposite conductive type; a capacitor C.sub.1 formed inside the groove (20), while a transfer gate Tr.sub.1 is formed on the highly concentrated semiconductor layer (80); and the diffusion area (53) is used to connect them.
摘要翻译： 一种动态RAM，其中在半导体衬底的主表面上形成有沟槽（20）; 在凹槽（20）的内部形成有一个具有一种导电类型的高度集中的半导体层（80），其深度足以容纳形成在该槽的顶部上的第一和第二杂质扩散区域（53）和（22） 并具有相反的导电类型; 形成在所述槽（20）内部的电容器C1，同时在所述高度集中的半导体层（80）上形成传输门Tr1。 并且扩散区域（53）用于连接它们。
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4.发明授权French-type semiconductor memory device with enhanced trench capacitor-transistor connection 失效法国式半导体存储器件，具有增强的沟槽电容 - 晶体管连接
公开(公告)号：US5563433A
公开(公告)日：1996-10-08
申请号：US883502
申请日：1992-05-15
IPC分类号： H01L27/04 , H01L21/02 , H01L21/822 , H01L21/8242 , H01L27/10 , H01L27/108
CPC分类号： H01L27/10861 , H01L28/40
摘要： A type of semiconductor device with a configuration characterized by the fact that an electroconductive film (90) is formed beforehand in connection to step (54a) of insulating film (54), and an electroconductive layer (63) with step from the aforementioned electroconductive film is coated to form the side contact of the memory cell.Even in the case when breakage takes place in electroconductive layer (63), the electrical conduction is still maintained via substrate electroconductive film (90), and no wire breakage, in effect, takes place. In addition, it is possible to form the pattern for the aforementioned electroconductive layer by, for instance, etching back method without applying a special mask; hence, the manufacturing process is simplified.
摘要翻译： 一种具有这样的结构的半导体器件，其特征在于，预先连接到绝缘膜（54）的步骤（54a）形成导电膜（90），并且导电层（63）与上述导电膜 被涂覆以形成存储单元的侧面接触。 即使在导电层（63）中发生断裂的情况下，仍然通过基板导电膜（90）保持导电性，实际上不发生断线。 此外，可以通过例如在不施加特殊掩模的情况下回蚀刻方法来形成上述导电层的图案; 因此，简化了制造过程。
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公开(公告)号：US5804478A
公开(公告)日：1998-09-08
申请号：US698433
申请日：1996-08-15
IPC分类号： H01L27/04 , H01L21/02 , H01L21/822 , H01L21/8242 , H01L27/10 , H01L27/108 , H01L21/70
CPC分类号： H01L27/10861 , H01L28/40
摘要： A type of semiconductor device with a configuration characterized by the fact that an electroconductive film (90) is formed beforehand in connection to step (54a) of insulating film(54), and an electroconductive layer (63) with step from the aforementioned electroconductive film is coated to form the side contact of the memory cell. Even in the case when breakage takes place in electroconductive layer (63), the electrical conduction is still maintained via electroconductive film (90), and no wire breakage, in effect, takes place. In addition, it is possible to form the pattern for the aforementioned electroconductive layer by, for instance, etching back method without applying a special mask; hence, the manufacturing process is simplified.
摘要翻译： 一种具有这样的结构的半导体器件，其特征在于，预先连接到绝缘膜（54）的步骤（54a）形成导电膜（90），并且导电层（63）与上述导电膜 被涂覆以形成存储单元的侧面接触。 即使在导电层（63）中发生断裂的情况下，仍然通过导电膜（90）保持导电，实际上不发生断线。 此外，可以通过例如在不施加特殊掩模的情况下回蚀刻方法来形成上述导电层的图案; 因此，简化了制造过程。
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公开(公告)号：US5210446A
公开(公告)日：1993-05-11
申请号：US798389
申请日：1991-11-26
申请人： Takayuki Niuya , Yoshihiro Ogata
发明人： Takayuki Niuya , Yoshihiro Ogata
IPC分类号： H01L27/04 , G05F3/20 , H01L21/822
CPC分类号： G05F3/205
摘要： Substrate bias generating circuit for MIS semiconductor device comprising an oscillating circuit, a capacitor, an MOS transistor and a Schottky barrier diode. One end of the oscillating circuit is connected to a V.sub.ss terminal which provides a reference potential. The capacitor is connected at one end thereof to the other end of the oscillating circuit. The MOS transistor is connected between the V.sub.ss terminal and the other end of the capacitor, with the Schottky barrier diode being connected between a node located between the other end of the capacitor and the MOS transistor, and the substrate. The Schottky barrier diode is operated by the majority carrier, thereby enabling the majority charge to be directly pumped out of the substrate and into the terminal V.sub.ss through the Schottky barrier diode with stability without requiring an injection of the minority charge into the semiconductor substrate. The pumping of the charge out of the substrate is permitted by lowering the potential of the node through the oscillating circuit.
摘要翻译： 包括振荡电路，电容器，MOS晶体管和肖特基势垒二极管的用于MIS半导体器件的衬底偏置产生电路。 振荡电路的一端连接到提供参考电位的Vss端子。 电容器的一端连接到振荡电路的另一端。 MOS晶体管连接在Vss端子和电容器的另一端之间，肖特基势垒二极管连接在位于电容器的另一端和MOS晶体管之间的节点与衬底之间。 肖特基势垒二极管由大多数载流子操作，从而使多数电荷能够稳定地直接泵浦出衬底并通过肖特基势垒二极管进入端子Vss，而不需要将少数电荷注入到半导体衬底中。 通过降低节点通过振荡电路的电位，可以将电荷从衬底中抽出。
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7.发明授权
公开(公告)号：US5514628A
公开(公告)日：1996-05-07
申请号：US451644
申请日：1995-05-26
IPC分类号： H01L21/324 , H01L27/118
CPC分类号： H01L21/324 , H01L27/118
摘要： A process is disclosed herein for increasing yield in a semiconductor circuity having redundant circuitry for replacing defective normal circuitry in the semiconductor integrated circuit. In the first step, an insufficient sinter operation (50) is carried out in a hydrogen atmosphere at a temperature of less than 350.degree. C. At this temperature, no significant change will be seen in the interface trap density. Thereafter, the integrated circuit is tested (54,56) and the defective normal circuitry then is replaced (58) with the redundant circuitry. The integrated circuit is then subjected to a sufficient sinter operation (64) which is an operation wherein the substrate is disposed at a temperature between 350.degree. C.-500.degree. C. for more than 30 minutes. This sufficient sinter operation is performed in a hydrogen atmosphere, allowing dangling bonds at the interface to be terminated with hydrogen. Preferable, the optimal temperature for the sufficient sinter is approximately 400.degree. C. The integrated circuit is then subjected to a reliability and burn-in procedure.
摘要翻译： 本文公开了一种用于提高具有用于替换半导体集成电路中的有缺陷的正常电路的冗余电路的半导体电路中的产量的方法。 在第一步骤中，在低于350℃的氢气气氛中进行不充分的烧结操作（50）。在该温度下，界面陷阱密度将不会发生明显的变化。 此后，测试集成电路（54,56），然后用冗余电路替换有缺陷的正常电路（58）。 然后对集成电路进行充分的烧结操作（64），其是将衬底置于350℃-5500℃的温度下超过30分钟的操作。 这种充分的烧结操作在氢气氛中进行，允许界面处的悬挂键用氢终止。 优选的是，足够的烧结体的最佳温度为约400℃。然后对集成电路进行可靠性和老化过程。
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公开(公告)号：US6104137A
公开(公告)日：2000-08-15
申请号：US119235
申请日：1998-07-21
申请人： Hirosi Abiko , Yoshihiro Ogata
发明人： Hirosi Abiko , Yoshihiro Ogata
CPC分类号： H05B33/04 , H01L51/5259 , Y10S428/917
摘要： An organic electroluminescent display device includes an organic electroluminescent element formed on a substrate thereof and having an organic compound layer group sandwiched between cathodes and anodes. The organic compound layer group has laminated electroluminescence functional layers formed of at least one kind of organic compound. Further, the organic electroluminescent display device includes an airtight case that encloses the organic electroluminescent element with a space formed between the airtight case itself and the organic electroluminescent element and isolates the organic electroluminescent element from outside air, and a filler gas filling the space within the airtight case. The filler gas contains at least one kind of combustion supporting gas.
摘要翻译： 有机电致发光显示装置包括在其基板上形成的有机电致发光元件，并且具有夹在阴极和阳极之间的有机化合物层组。 有机化合物层组由至少一种有机化合物形成的层叠电致发光功能层。 此外，有机电致发光显示装置包括气密壳体，其封闭有机电致发光元件，在气密壳本身和有机电致发光元件之间形成有空间，并将有机电致发光元件与外部空气隔离，填充气体内的空间 气密箱 填充气体包含至少一种燃烧支持气体。
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公开(公告)号：US4408863A
公开(公告)日：1983-10-11
申请号：US284454
申请日：1981-07-17
CPC分类号： G03G15/6535
摘要： In a copy paper separating device for use in a transfer type electrophotographic copying machine which includes a conductive carrier member, preferably in the form a conductive endless belt extended between a pair of pulleys. The conductive carrier member is disposed in the periphery of the photosensitive member to which a copy paper is brought into contact for the transfer of a toner image formed on the photosensitive member. The potential of the conductive carrier member is maintained nearly at zero level during the first step of the separating operation; whereas, the potential of the carrier member is increased to a predetermined value of the polarity opposite to that of the toner image during the second step.
摘要翻译： 在用于转印型电子照相复印机的复印纸分离装置中，该转印型电子照相复印机包括导电载体部件，优选为在一对滑轮之间延伸的导电环形带。 导电载体构件设置在感光构件的与复印纸接触的周边，用于转印形成在感光构件上的调色剂图像。 在分离操作的第一步骤期间，导电载体构件的电位几乎维持在零水平; 而在第二步骤中，载体构件的电位增加到与调色剂图像的极性相反的极性的预定值。
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10.发明授权公开(公告)号：US07671533B2
公开(公告)日：2010-03-02
申请号：US11520016
申请日：2006-09-13
申请人： Yoshihiro Ogata
发明人： Yoshihiro Ogata
CPC分类号： H04M1/0266 , H01L51/5237 , H01L51/524
摘要： It is an object of the present invention to provide an improved method of manufacturing a self-emission unit including a self-emission module having self-emission elements formed on a substrate, and a frame for protecting the self-emission modules, without carrying out some troublesome steps, thus making it possible to manufacture the self-emission unit in a shortened time. Another object of the present invention is to provide an improved self-emission unit capable of being attached to an attachment base with a high precision. The self-emission unit has a self-emission module and a frame. The frame is provided to cover a part or the whole of the self-emission module so as to protect the same. Further, the frame has fastening sections for attaching the self-emission module to an attachment base. The frame is formed integrally with the self-emission module so that it is possible to avoid some troublesome steps and thus shorten manufacturing time. The foregoing structure also makes it possible to improve an attachment precision when attaching the self-emission unit to an attachment base.
摘要翻译： 本发明的目的是提供一种制造自发射单元的改进方法，该自发射单元包括在基板上形成自发射元件的自发射模块，以及用于保护自发射模块的框架，而不进行 一些麻烦的步骤，从而可以在缩短的时间内制造自发射单元。 本发明的另一个目的是提供一种能够以高精度附着到安装底座上的改进的自发射单元。 自发射单元具有自发射模块和框架。 该框架被设置为覆盖自发射模块的一部分或全部以便保护该自发射模块。 此外，框架具有用于将自发射模块附接到附接基座的紧固部分。 框架与自发射模块一体地形成，从而可以避免一些麻烦的步骤，从而缩短制造时间。 上述结构还使得可以在将自发射单元附接到安装基座时提高安装精度。
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