公开(公告)号：US20090327750A1

公开(公告)日：2009-12-31

申请号：US12164097

申请日：2008-06-29

申请人： Tse-Hong Wu ,  Yao-Dun Chang ,  Wan-Perng Lin ,  Yeow-Chyi Chen ,  Yung-Sheng Chiu

发明人： Tse-Hong Wu ,  Yao-Dun Chang ,  Wan-Perng Lin ,  Yeow-Chyi Chen ,  Yung-Sheng Chiu

IPC分类号： H04L9/06

CPC分类号： G06F12/1408 ,  G06F12/1416 ,  G06F21/79 ,  G06F2221/2105

摘要： A security system for code dump protection includes a storage device, a processor, and a decryption unit. The storage device has a protected storage area storing at least an encrypted code segment. The processor is utilized for issuing at least one address pattern to the storage device for obtaining at least one information pattern corresponding to the address pattern. The decryption unit checks signal communicated between the processor and the storage device to generate a check result, and determines whether to decrypt the encrypted code segment in the protected storage area to generate a decrypted code segment to the processor according to the check result.

摘要翻译： 用于代码转储保护的安全系统包括存储设备，处理器和解密单元。 存储设备具有至少存储加密代码段的保护存储区域。 处理器被用于向存储设备发出至少一个地址模式，以获得对应于地址模式的至少一个信息模式。 解密单元检查在处理器和存储设备之间传送的信号以产生检查结果，并且确定是否解密受保护存储区域中的加密代码段，以根据检查结果向处理器产生解密的代码段。

公开(公告)号：US08138076B2

公开(公告)日：2012-03-20

申请号：US12118919

申请日：2008-05-12

申请人： Cheng-Tung Lin ,  Yung-Sheng Chiu ,  Hsiang-Yi Wang ,  Chia-Lin Yu ,  Chen-Hua Yu

发明人： Cheng-Tung Lin ,  Yung-Sheng Chiu ,  Hsiang-Yi Wang ,  Chia-Lin Yu ,  Chen-Hua Yu

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L21/28088 ,  H01L21/28079 ,  H01L21/28185 ,  H01L21/3141 ,  H01L21/823437 ,  H01L21/823828 ,  H01L29/513 ,  H01L29/517

摘要： MOSFETs having stacked metal gate electrodes and methods of making the same are provided. The MOSFET gate electrode includes a gate metal layer formed atop a high-k gate dielectric layer. The metal gate electrode is formed through a low oxygen content deposition process without charged-ion bombardment to the wafer substrate. Metal gate layer thus formed has low oxygen content and may prevent interfacial oxide layer regrowth. The process of forming the gate metal layer generally avoids plasma damage to the wafer substrate.

摘要翻译： 提供具有层叠金属栅电极的MOSFET及其制造方法。 MOSFET栅电极包括形成在高k栅极电介质层顶上的栅极金属层。 通过低氧含量沉积工艺形成金属栅电极而不对晶片衬底进行带电离子轰击。 如此形成的金属栅极层的氧含量低，并且可以防止界面氧化层再生长。 形成栅极金属层的过程通常避免了对晶片衬底的等离子体损伤。

公开(公告)号：US20100052066A1

公开(公告)日：2010-03-04

申请号：US12424153

申请日：2009-04-15

申请人： Chen-Hua Yu ,  Cheng-Tung Lin ,  Hsiang-Yi Wang ,  Yung-Sheng Chiu ,  Chia-Lin Yu

发明人： Chen-Hua Yu ,  Cheng-Tung Lin ,  Hsiang-Yi Wang ,  Yung-Sheng Chiu ,  Chia-Lin Yu

IPC分类号： H01L27/092 ,  H01L29/78 ,  H01L21/28

CPC分类号： H01L29/66545 ,  H01L21/28088 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

摘要： A semiconductor device and method for fabricating a semiconductor device for providing improved work function values and thermal stability is disclosed. The semiconductor device comprises a semiconductor substrate; an interfacial dielectric layer over the semiconductor substrate; a high-k gate dielectric layer over the interfacial dielectric layer; and a doped-conducting metal oxide layer over the high-k gate dielectric layer.

摘要翻译： 公开了一种用于制造用于提供改进的功函数值和热稳定性的半导体器件的半导体器件和方法。 半导体器件包括半导体衬底; 半导体衬底上的界面介电层; 界面介电层上的高k栅介质层; 以及在高k栅极电介质层上方的掺杂导电金属氧化物层。

公开(公告)号：US20130118569A1

公开(公告)日：2013-05-16

申请号：US13295148

申请日：2011-11-14

申请人： Wen-Chin Lee ,  Liang-Sheng Yu ,  Wen-Tsai Yen ,  Yung-Sheng Chiu

发明人： Wen-Chin Lee ,  Liang-Sheng Yu ,  Wen-Tsai Yen ,  Yung-Sheng Chiu

IPC分类号： H01L31/0224 ,  H01L31/18

CPC分类号： H01L31/0749 ,  H01L31/0322 ,  H01L31/0463 ,  Y02E10/541 ,  Y02P70/521

摘要： A thin film solar cell and process for forming the same. The solar cell includes a bottom electrode layer, a light absorbing semiconductor layer, and top electrode layer. The absorber layer includes a p-type interior region and an n-type exterior region formed around the perimeter of the layer from a modified native portion of the p-type interior region, thereby forming an active n-p junction that is an intrinsic part of the absorber layer. The top electrode layer is electrically connected to the bottom electrode layer via a scribe line formed in the absorber layer that defines sidewalls. The n-type exterior region of the absorber layer extends along both the horizontal top of the absorber layer, and onto the vertical sidewalls of the scribe line to increase the area of available n-p junction in the solar cell thereby improving solar conversion efficiency.

摘要翻译： 薄膜太阳能电池及其形成方法。 太阳能电池包括底部电极层，光吸收半导体层和顶部电极层。 吸收层包括p型内部区域和从p型内部区域的修饰的天然部分围绕该层的周边形成的n型外部区域，从而形成作为p型内部区域的固有部分的活性np结， 吸收层。 顶部电极层通过形成在限定侧壁的吸收体层中的划痕线电连接到底部电极层。 吸收层的n型外部区域沿着吸收层的水平顶部延伸，并且延伸到划线的垂直侧壁上，以增加太阳能电池中可用的n-p结的面积，从而提高太阳能转换效率。

公开(公告)号：US20130075247A1

公开(公告)日：2013-03-28

申请号：US13239989

申请日：2011-09-22

申请人： Wen-Chin Lee ,  Wen-Tsai Yen ,  Yung-Sheng Chiu ,  Ying Chen Chao

发明人： Wen-Chin Lee ,  Wen-Tsai Yen ,  Yung-Sheng Chiu ,  Ying Chen Chao

IPC分类号： C23C14/34

CPC分类号： C23C14/06 ,  C23C14/0047 ,  C23C14/0057 ,  C23C14/541 ,  C23C14/5806 ,  H01L21/02422 ,  H01L21/02491 ,  H01L21/02568 ,  H01L21/02628 ,  H01L31/0322 ,  H01L31/1836 ,  Y02E10/541 ,  Y02P70/521

摘要： A method and system for forming a chalcogenide or chalcopyrite-based semiconductor material provide for the simultaneous deposition of metal precursor materials from a target and Se radials from a Se radical generation system. The Se radical generation system includes an evaporator that produces an Se vapor and a plasma chamber that uses a plasma to generate a flux of Se radicals. Multiple such deposition operations may take place in sequence, each having the deposition temperature accurately controlled. The deposited material may include a compositional concentration gradient or may be a composite material, and may be used as an absorber layer in a solar cell.

摘要翻译： 用于形成硫族化物或黄铜矿基半导体材料的方法和系统提供了来自Se自由基产生系统的来自目标的金属前体材料和Se径向的同时沉积。 Se自由基生成系统包括产生Se蒸气的蒸发器和使用等离子体产生Se自由基流量的等离子体室。 可以依次进行多个这样的沉积操作，每个沉积操作具有精确控制的沉积温度。 沉积材料可以包括组成浓度梯度或者可以是复合材料，并且可以用作太阳能电池中的吸收层。

公开(公告)号：US20100250980A1

公开(公告)日：2010-09-30

申请号：US12413713

申请日：2009-03-30

申请人： Chao Chun Wang ,  Yung-Sheng Chiu ,  Ren-Yu Yu

发明人： Chao Chun Wang ,  Yung-Sheng Chiu ,  Ren-Yu Yu

IPC分类号： G06F1/32 ,  G06F12/00 ,  G06F12/02

CPC分类号： G06F1/3275 ,  G06F1/3225 ,  Y02D10/13 ,  Y02D10/14

摘要： A method for reducing power consumption of a device with an embedded memory module is provided. The device includes comprises a processor, an embedded memory module, a software module, a power supplying unit, and an auxiliary logic. The embedded memory module is accessed by the processor and partitioned into a plurality of memory blocks in accordance with a first predetermined rule. The software module comprises an instruction set and a data set. The software module is segmented into a plurality of segments in accordance with a second predetermined rule. The power supplying unit provides power to the plurality of memory blocks. The auxiliary logic controls the power supplying unit. The power supplied to a memory block is switched on or off in accordance with a condition.

摘要翻译： 提供了一种用于降低具有嵌入式存储器模块的设备的功耗的方法。 该设备包括处理器，嵌入式存储器模块，软件模块，供电单元和辅助逻辑。 嵌入式存储器模块由处理器访问，并且根据第一预定规则被划分成多个存储器块。 软件模块包括指令集和数据集。 根据第二预定规则，软件模块被分段成多个段。 供电单元向多个存储块供电。 辅助逻辑控制供电单元。 提供给存储器块的电源根据条件被打开或关闭。

公开(公告)号：US20090280632A1

公开(公告)日：2009-11-12

申请号：US12118919

申请日：2008-05-12

申请人： Cheng-Tung Lin ,  Yung-Sheng Chiu ,  Hsiang-Yi Wang ,  Chia-Lin Yu ,  Chen-Hua Yu

发明人： Cheng-Tung Lin ,  Yung-Sheng Chiu ,  Hsiang-Yi Wang ,  Chia-Lin Yu ,  Chen-Hua Yu

IPC分类号： H01L21/3205

CPC分类号： H01L21/28088 ,  H01L21/28079 ,  H01L21/28185 ,  H01L21/3141 ,  H01L21/823437 ,  H01L21/823828 ,  H01L29/513 ,  H01L29/517

摘要： MOSFETs having stacked metal gate electrodes and methods of making the same are provided. The MOSFET gate electrode includes a gate metal layer formed atop a high-k gate dielectric layer. The metal gate electrode is formed through a low oxygen content deposition process without charged-ion bombardment to the wafer substrate. Metal gate layer thus formed has low oxygen content and may prevent interfacial oxide layer regrowth. The process of forming the gate metal layer generally avoids plasma damage to the wafer substrate.

摘要翻译： 提供具有层叠金属栅电极的MOSFET及其制造方法。 MOSFET栅电极包括形成在高k栅极电介质层顶上的栅极金属层。 通过低氧含量沉积工艺形成金属栅电极而不对晶片衬底进行带电离子轰击。 如此形成的金属栅极层的氧含量低，并且可以防止界面氧化层再生长。 形成栅极金属层的过程通常避免了对晶片衬底的等离子体损伤。

公开(公告)号：US08355107B2

公开(公告)日：2013-01-15

申请号：US13012132

申请日：2011-01-24

申请人： Mei-Lien Huang ,  Shih-Yu Wang ,  Chung-Wei Liu ,  Yung-Sheng Chiu

发明人： Mei-Lien Huang ,  Shih-Yu Wang ,  Chung-Wei Liu ,  Yung-Sheng Chiu

IPC分类号： G02F1/1339 ,  H01J9/26

CPC分类号： G02F1/1339

摘要： A display panel and a manufacture method thereof are provided. The display panel includes a first substrate, a second substrate, and a sealant. The first substrate has a top surface which includes a signal transmission module parallel to an edge of the top surface. The sealant is disposed on the top surface and parallel to the signal transmission module, which is disposed between the top surface and sealant. The sealant is made of a photo-curable material and includes an inner isolation wall, which is exposed via the signal transmission module. The second substrate is disposed on the sealant and includes an inner surface. A light-shielding structure is disposed on the inner surface and close to an edge of the inner surface. The sealant at least partially overlaps the light-shielding structure.

摘要翻译： 提供了一种显示面板及其制造方法。 显示面板包括第一基板，第二基板和密封剂。 第一基板具有顶表面，其包括平行于顶表面的边缘的信号传输模块。 密封剂设置在顶表面上并且平行于设置在顶表面和密封剂之间的信号传输模块。 密封剂由光固化材料制成，并且包括通过信号传输模块暴露的内隔离壁。 第二基板设置在密封剂上并且包括内表面。 遮光结构设置在内表面上且靠近内表面的边缘。 密封剂至少部分地与遮光结构重叠。

公开(公告)号：US07947588B2

公开(公告)日：2011-05-24

申请号：US12424153

申请日：2009-04-15

申请人： Chen-Hua Yu ,  Cheng-Tung Lin ,  Hsiang-Yi Wang ,  Yung-Sheng Chiu ,  Chia-Lin Yu

发明人： Chen-Hua Yu ,  Cheng-Tung Lin ,  Hsiang-Yi Wang ,  Yung-Sheng Chiu ,  Chia-Lin Yu

IPC分类号： H01L21/4763

CPC分类号： H01L29/66545 ,  H01L21/28088 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

摘要： A semiconductor device and method for fabricating a semiconductor device for providing improved work function values and thermal stability is disclosed. The semiconductor device comprises a semiconductor substrate; an interfacial dielectric layer over the semiconductor substrate; a high-k gate dielectric layer over the interfacial dielectric layer; and a doped-conducting metal oxide layer over the high-k gate dielectric layer.

摘要翻译： 公开了一种用于制造用于提供改进的功函数值和热稳定性的半导体器件的半导体器件和方法。 半导体器件包括半导体衬底; 半导体衬底上的界面介电层; 界面介电层上的高k栅介质层; 以及在高k栅极电介质层上方的掺杂导电金属氧化物层。

公开(公告)号：US20110117804A1

公开(公告)日：2011-05-19

申请号：US13012132

申请日：2011-01-24

申请人： Mei-Lien Huang ,  Shih-Yu Wang ,  Chung-Wei Liu ,  Yung-Sheng Chiu

发明人： Mei-Lien Huang ,  Shih-Yu Wang ,  Chung-Wei Liu ,  Yung-Sheng Chiu

IPC分类号： H01J9/26

CPC分类号： G02F1/1339

摘要： A display panel and a manufacture method thereof are provided. The display panel includes a first substrate, a second substrate, and a sealant. The first substrate has a top surface which includes a signal transmission module parallel to an edge of the top surface. The sealant is disposed on the top surface and parallel to the signal transmission module, which is disposed between the top surface and sealant. The sealant is made of a photo-curable material and includes an inner isolation wall, which is exposed via the signal transmission module. The second substrate is disposed on the sealant and includes an inner surface. A light-shielding structure is disposed on the inner surface and close to an edge of the inner surface. The sealant at least partially overlaps the light-shielding structure.

摘要翻译： 提供了一种显示面板及其制造方法。 显示面板包括第一基板，第二基板和密封剂。 第一基板具有顶表面，其包括平行于顶表面的边缘的信号传输模块。 密封剂设置在顶表面上并且平行于设置在顶表面和密封剂之间的信号传输模块。 密封剂由光固化材料制成，并且包括通过信号传输模块暴露的内隔离壁。 第二基板设置在密封剂上并且包括内表面。 遮光结构设置在内表面上且靠近内表面的边缘。 密封剂至少部分地与遮光结构重叠。