公开(公告)号：US5781434A

公开(公告)日：1998-07-14

申请号：US543145

申请日：1995-10-13

申请人： Tsunehiro Tobita ,  Yukihiro Seki ,  Ryuichi Hattori ,  Yuji Miyagawa ,  Shigeru Sakurai ,  Michiyuki Suzuki ,  Ichiro Ote

发明人： Tsunehiro Tobita ,  Yukihiro Seki ,  Ryuichi Hattori ,  Yuji Miyagawa ,  Shigeru Sakurai ,  Michiyuki Suzuki ,  Ichiro Ote

IPC分类号： G06F11/30 ,  G06F13/00 ,  H04L12/12 ,  G05B19/10

CPC分类号： H04L12/12 ,  Y02B60/33 ,  Y02B60/34

摘要： An information processing system includes a modem communicating with a remote console through a telephone line, an information processing apparatus communicating with the remote console through the modem, a service processor, a power supply continuously supplying power to the modem and the service processor, a power supply supplying power to the information processing apparatus according to commands from the service processor, and a switch connecting the modem to the service processor or the information processing apparatus in accordance with a switching signal from the service processor. The service processor controls the switch to connect the modem to the service processor when the information processing apparatus power supply is in the off state. The service processor outputs a power-on command when the service processor receives a power-on request of the information processing apparatus power supply from the remote console through the telephone line and the modem and the switch connects the modem to the information processing apparatus when the execution of the power-on command is completed.

摘要翻译： 信息处理系统包括通过电话线与远程控制台通信的调制解调器，通过调制解调器与远程控制台通信的信息处理设备，服务处理器，向调制解调器和服务处理器连续供电的电源，功率 根据来自服务处理器的命令向信息处理设备供电，以及根据来自服务处理器的切换信号将调制解调器连接到服务处理器或信息处理设备的交换机。 当信息处理设备电源处于关闭状态时，服务处理器控制交换机将调制解调器连接到服务处理器。 当服务处理器通过电话线路和调制解调器从远程控制台接收到信息处理设备电源的接通请求时，服务处理器输出开机命令，并且交换机将调制解调器连接到信息处理设备时 上电指令的执行完成。

公开(公告)号：US06199180B1

公开(公告)日：2001-03-06

申请号：US09475057

申请日：1999-12-30

申请人： Ichiro Ote ,  Hiroshi Furukawa ,  Hiroaki Washimi ,  Yuichi Kobayashi ,  Shigeru Sakurai ,  Teiji Karasaki ,  Yuji Miyagawa ,  Masami Murai ,  Tsunehiro Tobita

发明人： Ichiro Ote ,  Hiroshi Furukawa ,  Hiroaki Washimi ,  Yuichi Kobayashi ,  Shigeru Sakurai ,  Teiji Karasaki ,  Yuji Miyagawa ,  Masami Murai ,  Tsunehiro Tobita

IPC分类号： G06F1100

CPC分类号： G06F11/2294 ,  G06F11/0709 ,  G06F11/0748 ,  G06F11/0784 ,  G06F11/079 ,  G06F11/0793 ,  G06F11/22 ,  G06F11/2205 ,  G06F11/3006 ,  G06F11/3055 ,  G06F11/3072 ,  G06F11/327 ,  G06F11/3495 ,  H04L43/0811 ,  H04L43/0817

摘要： A computer management system includes an agent connected to a computer to be managed for executing instructions on the computer to be managed, a service processor board having a processor independent from the computer to be managed for monitoring fault in the computer to be managed and controlling power of the computer to be managed, a manager for executing instructions on a management computer and conducting controls such as fault monitoring and power control through the agent over a network including a public line, and a service processor manager directly connected to the service processor for conducting remote power-on and receiving and diagnosing critical fault. The service processor and the service processor manager are provided with switching circuits for switching an asynchronous interface for remotely connecting to the computer to be managed and an asynchronous interface for directly connecting to a local processor of the service processor.

摘要翻译： 计算机管理系统包括连接到要管理的计算机以用于执行待管理的计算机上的指令的代理，具有独立于要管理的计算机的处理器的处理器用于监视要管理的计算机中的故障的控制功率的服务处理器板 要管理的计算机的管理器，用于在管理计算机上执行指令的管理器，并且通过所述代理通过所述代理进行诸如故障监视和功率控制的控制，所述控制器包括公共线路，以及直接连接到所述服务处理器的服务处理器管理器，用于进行 远程开机并接收和诊断关键故障。 服务处理器和服务处理器管理器设置有用于切换用于远程连接到要管理的计算机的异步接口的切换电路和用于直接连接到服务处理器的本地处理器的异步接口。

公开(公告)号：US5815652A

公开(公告)日：1998-09-29

申请号：US655482

申请日：1996-05-30

申请人： Ichiro Ote ,  Hiroshi Furukawa ,  Hiroaki Washimi ,  Yuichi Kobayashi ,  Shigeru Sakurai ,  Teiji Karasaki ,  Yuji Miyagawa ,  Masami Murai ,  Tsunehiro Tobita

发明人： Ichiro Ote ,  Hiroshi Furukawa ,  Hiroaki Washimi ,  Yuichi Kobayashi ,  Shigeru Sakurai ,  Teiji Karasaki ,  Yuji Miyagawa ,  Masami Murai ,  Tsunehiro Tobita

IPC分类号： G06F11/07 ,  G06F11/22 ,  G06F11/273 ,  G06F11/30 ,  G06F11/32 ,  G06F11/34

CPC分类号： G06F11/2294 ,  G06F11/0709 ,  G06F11/0748 ,  G06F11/0784 ,  G06F11/22 ,  G06F11/3006 ,  G06F11/3055 ,  G06F11/3072 ,  G06F11/079 ,  G06F11/0793 ,  G06F11/2205 ,  G06F11/327 ,  G06F11/3495 ,  H04L43/0811 ,  H04L43/0817

摘要： A computer management system includes an agent connected to a computer to be managed for executing instructions on the computer to be managed, a service processor board having a processor independent from the computer to be managed for monitoring fault in the computer to be managed and controlling power of the computer to be managed, a manager for executing instructions on a management computer and conducting controls such as fault monitoring and power control through the agent over a network including a public line, and a service processor manager directly connected to the service processor for conducting remote power-on and receiving and diagnosing critical fault. The service processor and the service processor manager are provided with switching circuits for switching an asynchronous interface for remotely connecting to the computer to be managed and an asynchronous interface for directly connecting to a local processor of the service processor.

公开(公告)号：US07089451B2

公开(公告)日：2006-08-08

申请号：US09771989

申请日：2001-01-30

申请人： Ichiro Ote ,  Hiroshi Furukawa ,  Hiroaki Washimi ,  Yuichi Kobayashi ,  Shigeru Sakurai ,  Teiji Karasaki ,  Yuji Miyagawa ,  Masami Murai ,  Tsunehiro Tobita

发明人： Ichiro Ote ,  Hiroshi Furukawa ,  Hiroaki Washimi ,  Yuichi Kobayashi ,  Shigeru Sakurai ,  Teiji Karasaki ,  Yuji Miyagawa ,  Masami Murai ,  Tsunehiro Tobita

IPC分类号： G06F11/00

CPC分类号： G06F11/2294 ,  G06F11/0709 ,  G06F11/0748 ,  G06F11/0784 ,  G06F11/079 ,  G06F11/0793 ,  G06F11/22 ,  G06F11/2205 ,  G06F11/3006 ,  G06F11/3055 ,  G06F11/3072 ,  G06F11/327 ,  G06F11/3495 ,  H04L43/0811 ,  H04L43/0817

摘要： A computer management system attains, through one line, the uniform and steady system management through an agent such as monitoring of fault and power control in a computer connected by LAN as well as a public line, and system management for an off-state of the computer or abnormal operation state of the computer such as remote power control and notice and diagnosis of critical fault by the direct connection with a service processor through the line. The system includes an agent connected to a computer to be managed for executing instructions on the computer to be managed, a service processor board having a processor independent from the computer to be managed for monitoring fault in the computer to be managed and controlling power of the computer to be managed, a manager for executing instructions on a management computer and conducting controls such as fault monitoring and power control through the agent over a network including a public line, and a service processor manager directly connected to the service processor for conducting remote power-on and receiving and diagnosing critical fault. The service processor and the service processor manager are provided with switching circuits for switching an asynchronous interface for remotely connecting to the computer to be managed and an asynchronous interface for directly connecting to a local processor of the service processor.

摘要翻译： 计算机管理系统通过一条线路实现统一稳定的系统管理，通过代理进行监控，如通过LAN连接的计算机中的故障和功率控制以及公共线路，以及关闭状态的系统管理 计算机或计算机的异常运行状态，如远程电源控制，通过与服务处理器直接连接通过线路通知和诊断关键故障。 该系统包括连接到要管理的计算机以用于在要管理的计算机上执行指令的代理，具有独立于要管理的计算机的处理器的处理器的服务处理器板，用于监视要管理的计算机中的故障，并且控制 要管理的计算机，用于在管理计算机上执行指令的管理器，并通过包括公共线路的网络在代理处执行诸如故障监视和功率控制的控制，以及直接连接到服务处理器的服务处理器管理器，用于进行远程电力 并接受和诊断关键故障。 服务处理器和服务处理器管理器设置有用于切换用于远程连接到要管理的计算机的异步接口的切换电路和用于直接连接到服务处理器的本地处理器的异步接口。

公开(公告)号：US6044476A

公开(公告)日：2000-03-28

申请号：US144174

申请日：1998-08-31

申请人： Ichiro Ote ,  Hiroshi Furukawa ,  Hiroaki Washimi ,  Yuichi Kobayashi ,  Shigeru Sakurai ,  Teiji Karasaki ,  Yuji Miyagawa ,  Masami Murai ,  Tsunehiro Tobita

发明人： Ichiro Ote ,  Hiroshi Furukawa ,  Hiroaki Washimi ,  Yuichi Kobayashi ,  Shigeru Sakurai ,  Teiji Karasaki ,  Yuji Miyagawa ,  Masami Murai ,  Tsunehiro Tobita

IPC分类号： G06F11/07 ,  G06F11/22 ,  G06F11/273 ,  G06F11/30 ,  G06F11/32 ,  G06F11/34 ,  G06F11/00

CPC分类号： G06F11/2294 ,  G06F11/0709 ,  G06F11/0748 ,  G06F11/0784 ,  G06F11/22 ,  G06F11/3006 ,  G06F11/3055 ,  G06F11/3072 ,  G06F11/079 ,  G06F11/0793 ,  G06F11/2205 ,  G06F11/327 ,  G06F11/3495 ,  H04L43/0811 ,  H04L43/0817

摘要： A computer management system includes an agent connected to a computer to be managed for executing instructions on the computer to be managed, a service processor board having a processor independent from the computer to be managed for monitoring fault in the computer to be managed and controlling power of the computer to be managed, a manager for executing instructions on a management computer and conducting controls such as fault monitoring and power control through the agent over a network including a public line, and a service processor manager directly connected to the service processor for conducting remote power-on and receiving and diagnosing critical fault. The service processor and the service processor manager are provided with switching circuits for switching an asynchronous interface for remotely connecting to the computer to be managed and an asynchronous interface for directly connecting to a local processor of the service processor.

摘要翻译： 计算机管理系统包括连接到要管理的计算机以用于执行待管理的计算机上的指令的代理，具有独立于要管理的计算机的处理器的处理器用于监视要管理的计算机中的故障的控制功率的服务处理器板 要管理的计算机的管理器，用于在管理计算机上执行指令的管理器，并且通过所述代理通过所述代理进行诸如故障监视和功率控制的控制，所述控制器包括公共线路，以及直接连接到所述服务处理器的服务处理器管理器， 远程开机并接收和诊断关键故障。 服务处理器和服务处理器管理器设置有用于切换用于远程连接到要管理的计算机的异步接口的切换电路和用于直接连接到服务处理器的本地处理器的异步接口。

公开(公告)号：US5530673A

公开(公告)日：1996-06-25

申请号：US225313

申请日：1994-04-08

申请人： Tsunehiro Tobita ,  Jun Kitahara ,  Takashi Tsunehiro ,  Kunihiro Katayama ,  Ryuichi Hattori ,  Yukihiro Seki ,  Hajime Yamagami ,  Takashi Totsuka ,  Takeshi Wada ,  Yosio Takaya ,  Manabu Saito ,  Kenichi Kaki ,  Takao Okubo ,  Takashi Kikuchi ,  Masamichi Kishi ,  Takeshi Suzuki ,  Shigeru Kadowaki

发明人： Tsunehiro Tobita ,  Jun Kitahara ,  Takashi Tsunehiro ,  Kunihiro Katayama ,  Ryuichi Hattori ,  Yukihiro Seki ,  Hajime Yamagami ,  Takashi Totsuka ,  Takeshi Wada ,  Yosio Takaya ,  Manabu Saito ,  Kenichi Kaki ,  Takao Okubo ,  Takashi Kikuchi ,  Masamichi Kishi ,  Takeshi Suzuki ,  Shigeru Kadowaki

IPC分类号： G06F3/06 ,  G06F11/14 ,  G06F12/08 ,  G11C29/00 ,  G11C16/06 ,  G06F12/16

CPC分类号： G11C29/765 ,  G06F11/1433 ,  G06F11/1441 ,  G06F12/08 ,  G06F12/0802 ,  G06F12/0866 ,  G06F3/0601 ,  G06F3/0613 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0656 ,  G06F3/0679 ,  G06F3/068 ,  G11C29/789 ,  G11C29/82 ,  G06F2003/0694 ,  G06F2212/2022 ,  G06F2212/312

摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller comprises control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.

摘要翻译： 当闪存用作信息处理系统中的半导体盘或主存储器时的控制方法和系统。 半导体文件系统包括电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制存储器的控制器和控制控制器的控制部分，其中对应于由 访问一个外部系统。 第一非易失性存储器存储用于执行操作的外部系统的数据，指示存储数据的物理地址与逻辑地址之间的对应关系的第一管理信息，以及指示第一非易失性存储器的状态的第二管理信息。 第二非易失性存储器预先存储从外部系统输入和输出数据所需的接口信息以及数据的只读数据。 控制器包括控制装置，用于当数据从第一非易失性存储器输出时或当数据被输入到易失性存储器时，确定形成物理地址的预定高位的物理扇区地址，存储确定的物理扇区地址的装置，以及 用于连续地产生由物理扇区地址确定的扇区中的地址的装置。

公开(公告)号：US06421279B1

公开(公告)日：2002-07-16

申请号：US09927493

申请日：2001-08-13

申请人： Tsunehiro Tobita ,  Jun Kitahara ,  Takashi Tsunehiro ,  Kunihiro Katayama ,  Ryuichi Hattori ,  Yukihiro Seki ,  Hajime Yamagami ,  Takashi Totsuka ,  Takeshi Wada ,  Yosio Takaya ,  Manabu Saito ,  Kenichi Kaki ,  Takao Okubo ,  Takashi Kikuchi ,  Masamichi Kishi ,  Takeshi Suzuki ,  Shigeru Kadowaki

发明人： Tsunehiro Tobita ,  Jun Kitahara ,  Takashi Tsunehiro ,  Kunihiro Katayama ,  Ryuichi Hattori ,  Yukihiro Seki ,  Hajime Yamagami ,  Takashi Totsuka ,  Takeshi Wada ,  Yosio Takaya ,  Manabu Saito ,  Kenichi Kaki ,  Takao Okubo ,  Takashi Kikuchi ,  Masamichi Kishi ,  Takeshi Suzuki ,  Shigeru Kadowaki

IPC分类号： G11C800

CPC分类号： G11C29/765 ,  G06F3/0601 ,  G06F3/0613 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0656 ,  G06F3/0679 ,  G06F3/068 ,  G06F11/1433 ,  G06F11/1441 ,  G06F12/08 ,  G06F12/0802 ,  G06F12/0866 ,  G06F2003/0694 ,  G06F2212/2022 ,  G06F2212/312 ,  G11C29/789 ,  G11C29/82

摘要： A semiconductor file system features a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating correspondence between physical and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information. The controller determines a physical sector address. The control section is for controlling input/output of data from/to the external system and for temporarily storing write data into the first nonvolatile memory from the external system in the volatile memory and then transferring the write data from the volatile memory to the first nonvolatile memory.

摘要翻译： 半导体文件系统具有电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制器和控制部分，其控制控制器，其中对应于从外部系统指定的逻辑地址的物理地址是 访问。 第一非易失性存储器存储用于执行操作的外部系统的数据，指示物理和逻辑地址之间的对应关系的第一管理信息以及指示第一非易失性存储器的状态的第二管理信息。 第二非易失性存储器先前存储接口信息。 控制器确定物理扇区地址。 控制部分用于控制来自/外部系统的数据的输入/输出，并用于从易失性存储器中的外部系统暂时将写数据存储到第一非易失性存储器中，然后将写入数据从易失性存储器传送到第一非易失性存储器 记忆。

公开(公告)号：US6078520A

公开(公告)日：2000-06-20

申请号：US357931

申请日：1999-07-21

申请人： Tsunehiro Tobita ,  Jun Kitahara ,  Takashi Tsunehiro ,  Kunihiro Katayama ,  Ryuichi Hattori ,  Yukihiro Seki ,  Hajime Yamagami ,  Takashi Totsuka ,  Takeshi Wada ,  Yosio Takaya ,  Manabu Saito ,  Kenichi Kaki ,  Takao Okubo ,  Takashi Kikuchi ,  Masamichi Kishi ,  Takeshi Suzuki ,  Shigeru Kadowaki

发明人： Tsunehiro Tobita ,  Jun Kitahara ,  Takashi Tsunehiro ,  Kunihiro Katayama ,  Ryuichi Hattori ,  Yukihiro Seki ,  Hajime Yamagami ,  Takashi Totsuka ,  Takeshi Wada ,  Yosio Takaya ,  Manabu Saito ,  Kenichi Kaki ,  Takao Okubo ,  Takashi Kikuchi ,  Masamichi Kishi ,  Takeshi Suzuki ,  Shigeru Kadowaki

IPC分类号： G06F11/14 ,  G06F12/08 ,  G11C29/00 ,  G11C17/00

CPC分类号： G11C29/765 ,  G06F11/1433 ,  G06F12/08 ,  G06F12/0802 ,  G06F12/0866 ,  G11C29/789 ,  G11C29/82 ,  G06F2212/2022 ,  G06F2212/312

摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller has a control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.

摘要翻译： 当闪存用作信息处理系统中的半导体盘或主存储器时的控制方法和系统。 半导体文件系统包括电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制存储器的控制器和控制控制器的控制部分，其中对应于由 访问一个外部系统。 第一非易失性存储器存储用于执行操作的外部系统的数据，指示存储数据的物理地址与逻辑地址之间的对应关系的第一管理信息，以及指示第一非易失性存储器的状态的第二管理信息。 第二非易失性存储器预先存储从外部系统输入和输出数据所需的接口信息以及数据的只读数据。 控制器具有控制装置，用于当数据从第一非易失性存储器输出时或当数据被输入到易失性存储器时，确定形成物理地址的预定高位的物理扇区地址，用于存储确定的物理扇区地址的装置， 以及用于在由所述物理扇区地址确定的扇区中连续生成地址的装置。

公开(公告)号：US06275436B1

公开(公告)日：2001-08-14

申请号：US09577371

申请日：2000-05-23

申请人： Tsunehiro Tobita ,  Jun Kitahara ,  Takashi Tsunehiro ,  Kunihiro Katayama ,  Ryuichi Hattori ,  Yukihiro Seki ,  Hajime Yamagami ,  Takashi Totsuka ,  Takeshi Wada ,  Yosio Takaya ,  Manabu Saito ,  Kenichi Kaki ,  Takao Okubo ,  Takashi Kikuchi ,  Masamichi Kishi ,  Takeshi Suzuki ,  Shigeru Kadowaki

发明人： Tsunehiro Tobita ,  Jun Kitahara ,  Takashi Tsunehiro ,  Kunihiro Katayama ,  Ryuichi Hattori ,  Yukihiro Seki ,  Hajime Yamagami ,  Takashi Totsuka ,  Takeshi Wada ,  Yosio Takaya ,  Manabu Saito ,  Kenichi Kaki ,  Takao Okubo ,  Takashi Kikuchi ,  Masamichi Kishi ,  Takeshi Suzuki ,  Shigeru Kadowaki

IPC分类号： G11C800

CPC分类号： G11C29/765 ,  G06F3/0601 ,  G06F3/0613 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0656 ,  G06F3/0679 ,  G06F3/068 ,  G06F11/1433 ,  G06F11/1441 ,  G06F12/08 ,  G06F12/0802 ,  G06F12/0866 ,  G06F2003/0694 ,  G06F2212/2022 ,  G06F2212/312 ,  G11C29/789 ,  G11C29/82

摘要： A control method and system when a flash memory is used. as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller comprises control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address. The control section is responsive to the interface information, the first management information, and the second management information for controlling input/output of data from/to the external system and for temporarily storing write data into the first nonvolatile memory from the external system in the volatile memory and then transferring the write data from the volatile memory to the first nonvolatile memory. The consecutive address generation means and the sector address storage means output the physical sector address and the consecutively generated addresses to the first nonvolatile memory and the volatile memory when data at the physical sector address is output from the first nonvolatile memory or when data at the physical sector address is input to the volatile memory.

公开(公告)号：US5973964A

公开(公告)日：1999-10-26

申请号：US182630

申请日：1998-10-30

申请人： Tsunehiro Tobita ,  Jun Kitahara ,  Takashi Tsunehiro ,  Kunihiro Katayama ,  Ryuichi Hattori ,  Yukihiro Seki ,  Hajime Yamagami ,  Takashi Totsuka ,  Takeshi Wada ,  Yosio Takaya ,  Manabu Saito ,  Kenichi Kaki ,  Takao Okubo ,  Takashi Kikuchi ,  Masamichi Kishi ,  Takeshi Suzuki ,  Shigeru Kadowaki

发明人： Tsunehiro Tobita ,  Jun Kitahara ,  Takashi Tsunehiro ,  Kunihiro Katayama ,  Ryuichi Hattori ,  Yukihiro Seki ,  Hajime Yamagami ,  Takashi Totsuka ,  Takeshi Wada ,  Yosio Takaya ,  Manabu Saito ,  Kenichi Kaki ,  Takao Okubo ,  Takashi Kikuchi ,  Masamichi Kishi ,  Takeshi Suzuki ,  Shigeru Kadowaki

IPC分类号： G06F3/06 ,  G06F11/14 ,  G06F12/08 ,  G11C29/00 ,  G11C7/00

CPC分类号： G11C29/765 ,  G06F11/1433 ,  G06F11/1441 ,  G06F12/08 ,  G06F12/0802 ,  G06F12/0866 ,  G06F3/0601 ,  G06F3/0613 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0656 ,  G06F3/0679 ,  G06F3/068 ,  G11C29/789 ,  G11C29/82 ,  G06F2003/0694 ,  G06F2212/2022 ,  G06F2212/312

摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller has a control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.