公开(公告)号：US11876122B2

公开(公告)日：2024-01-16

申请号：US17994375

申请日：2022-11-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Wei Chang ,  Chia-Ming Kuo ,  Po-Jen Chuang ,  Fu-Jung Chuang ,  Shao-Wei Wang ,  Yu-Ren Wang ,  Chia-Yuan Chang

IPC: H01L29/49 ,  H01L29/78 ,  H01L29/08 ,  H01L29/24 ,  H01L29/66 ,  H01L21/02 ,  H01L21/28

CPC classification number: H01L29/4983 ,  H01L21/0234 ,  H01L21/02332 ,  H01L21/02521 ,  H01L21/28123 ,  H01L29/0847 ,  H01L29/24 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

Abstract: A method of forming a semiconductor device. A substrate having a fin structure is provided. A dummy gate is formed on the fin structure. A polymer block is formed adjacent to a corner between the dummy gate and the fin structure. The polymer block is subjected to a nitrogen plasma treatment, thereby forming a nitridation layer in proximity to a sidewall of the dummy gate under the polymer block. After subjecting the polymer block to the nitrogen plasma treatment, a seal layer is formed on the sidewall of the dummy gate and on the polymer block. An epitaxial layer is then grown on a source/drain region of the fin structure. The dummy gate is then replaced with a metal gate.

公开(公告)号：US11791413B2

公开(公告)日：2023-10-17

申请号：US17392222

申请日：2021-08-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shi-You Liu ,  Shih-Cheng Chen ,  Chia-Wei Chang ,  Chia-Ming Kuo ,  Tsai-Yu Wen ,  Yu-Ren Wang

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L29/08 ,  H01L23/10

CPC classification number: H01L29/7851 ,  H01L21/02126 ,  H01L23/10 ,  H01L29/0847 ,  H01L29/6656 ,  H01L29/66795

Abstract: A semiconductor device includes a fin protruding from a substrate and extending in a first direction, a gate structure extending on the fin in a second direction, and a seal layer located on the sidewall of the gate structure. A first peak carbon concentration is disposed in the seal layer. A first spacer layer is located on the seal layer. A second peak carbon concentration is disposed in the first spacer layer. A second spacer layer is located on the first spacer layer.

公开(公告)号：US20230014253A1

公开(公告)日：2023-01-19

申请号：US17392222

申请日：2021-08-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shi-You Liu ,  Shih-Cheng Chen ,  Chia-Wei Chang ,  Chia-Ming Kuo ,  Tsai-Yu Wen ,  Yu-Ren Wang

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L29/08 ,  H01L23/10

Abstract: A semiconductor device includes a fin protruding from a substrate and extending in a first direction, a gate structure extending on the fin in a second direction, and a seal layer located on the sidewall of the gate structure. A first peak carbon concentration is disposed in the seal layer. A first spacer layer is located on the seal layer. A second peak carbon concentration is disposed in the first spacer layer. A second spacer layer is located on the first spacer layer.

公开(公告)号：US20210320187A1

公开(公告)日：2021-10-14

申请号：US16867579

申请日：2020-05-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Ming Kuo ,  Fu-Jung Chuang ,  Po-Jen Chuang ,  Chia-Wei Chang ,  Guan-Wei Huang ,  Chia-Yuan Chang

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/28

Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a first gate structure on the NMOS region and a second gate structure on the PMOS region; forming a seal layer on the first gate structure and the second gate structure; forming a first lightly doped drain (LDD) adjacent to the first gate structure; forming a second LDD adjacent to the second gate structure; and performing a soak anneal process to boost an oxygen concentration of the seal layer for reaching a saturation level.

公开(公告)号：US20230091153A1

公开(公告)日：2023-03-23

申请号：US17994375

申请日：2022-11-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Wei Chang ,  Chia-Ming Kuo ,  Po-Jen Chuang ,  Fu-Jung Chuang ,  Shao-Wei Wang ,  Yu-Ren Wang ,  Chia-Yuan Chang

IPC: H01L29/49 ,  H01L29/78 ,  H01L29/08 ,  H01L29/24 ,  H01L29/66 ,  H01L21/02 ,  H01L21/28

Abstract: A method of forming a semiconductor device. A substrate having a fin structure is provided. A dummy gate is formed on the fin structure. A polymer block is formed adjacent to a corner between the dummy gate and the fin structure. The polymer block is subjected to a nitrogen plasma treatment, thereby forming a nitridation layer in proximity to a sidewall of the dummy gate under the polymer block. After subjecting the polymer block to the nitrogen plasma treatment, a seal layer is formed on the sidewall of the dummy gate and on the polymer block. An epitaxial layer is then grown on a source/drain region of the fin structure. The dummy gate is then replaced with a metal gate.

公开(公告)号：US11545557B2

公开(公告)日：2023-01-03

申请号：US17225066

申请日：2021-04-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Wei Chang ,  Chia-Ming Kuo ,  Po-Jen Chuang ,  Fu-Jung Chuang ,  Shao-Wei Wang ,  Yu-Ren Wang ,  Chia-Yuan Chang

IPC: H01L29/49 ,  H01L29/78 ,  H01L29/08 ,  H01L29/24 ,  H01L29/66 ,  H01L21/02 ,  H01L21/28

Abstract: A semiconductor device includes substrate having a fin structure thereon, a gate structure overlying the fin structure, a polymer block at a corner between the gate structure and the fin structure, and a source/drain region on the fin structure. The polymer block includes a nitridation layer in proximity to a sidewall of the gate structure.

公开(公告)号：US20220302279A1

公开(公告)日：2022-09-22

申请号：US17225066

申请日：2021-04-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Wei Chang ,  Chia-Ming Kuo ,  Po-Jen Chuang ,  Fu-Jung Chuang ,  Shao-Wei Wang ,  Yu-Ren Wang ,  Chia-Yuan Chang

IPC: H01L29/49 ,  H01L29/78 ,  H01L29/08 ,  H01L29/24 ,  H01L21/28 ,  H01L21/02 ,  H01L29/66

Abstract: A semiconductor device includes substrate having a fin structure thereon, a gate structure overlying the fin structure, a polymer block at a corner between the gate structure and the fin structure, and a source/drain region on the fin structure. The polymer block includes a nitridation layer in proximity to a sidewall of the gate structure.

公开(公告)号：US11271090B2

公开(公告)日：2022-03-08

申请号：US16867579

申请日：2020-05-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Ming Kuo ,  Fu-Jung Chuang ,  Po-Jen Chuang ,  Chia-Wei Chang ,  Guan-Wei Huang ,  Chia-Yuan Chang

IPC: H01L29/66 ,  H01L21/28 ,  H01L29/78 ,  H01L21/3105 ,  H01L21/265

Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a first gate structure on the NMOS region and a second gate structure on the PMOS region; forming a seal layer on the first gate structure and the second gate structure; forming a first lightly doped drain (LDD) adjacent to the first gate structure; forming a second LDD adjacent to the second gate structure; and performing a soak anneal process to boost an oxygen concentration of the seal layer for reaching a saturation level.