公开(公告)号：US20140094017A1

公开(公告)日：2014-04-03

申请号：US13633104

申请日：2012-10-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wu-Sian Sie ,  Chun-Wei Hsu ,  Chia-Lung Chang ,  Chih-Hsun Lin ,  Chang-Hung Kung ,  Yu-Ting Li ,  Wei-Che Tsao ,  Yen-Ming Chen ,  Chun-Hsiung Wang ,  Chia-Lin Hsu

IPC: H01L21/762

CPC classification number: H01L21/76232 ,  H01L21/76229

Abstract: A manufacturing method for a shallow trench isolation. First, a substrate is provided, a hard mask layer and a patterned photoresist layer are sequentially formed on the substrate, at least one trench is then formed in the substrate through an etching process, the hard mask layer is removed. Afterwards, a filler is formed at least in the trench and a planarization process is then performed on the filler. Since the planarization process is performed only on the filler, so the dishing phenomenon can effectively be avoided.

Abstract translation: 浅沟槽隔离的制造方法。 首先，提供基板，在基板上依次形成硬掩模层和图案化光致抗蚀剂层，然后通过蚀刻工艺在基板中形成至少一个沟槽，去除硬掩模层。 然后，至少在沟槽中形成填料，然后对填料进行平面化处理。 由于仅在填料上进行平坦化处理，所以可以有效地避免凹陷现象。

公开(公告)号：US08940600B2

公开(公告)日：2015-01-27

申请号：US14294152

申请日：2014-06-03

Applicant: United Microelectronics Corp.

Inventor： Chun-Wei Hsu ,  Po-Cheng Huang ,  Ren-Peng Huang ,  Jie-Ning Yang ,  Chia-Lin Hsu ,  Teng-Chun Tsai ,  Chih-Hsun Lin ,  Chang-Hung Kung ,  Yen-Ming Chen ,  Yu-Ting Li

IPC: H01L27/06

CPC classification number: H01L27/0629

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation (STI) on the resistor region of the substrate; forming a tank in the STI; and forming a resistor in the tank and on two sides of the top surface of the STI outside the tank.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供具有晶体管区域和电阻器区域的衬底; 在衬底的电阻器区域上形成浅沟槽隔离（STI）; 在STI中形成坦克; 并且在罐内形成电阻器，并在罐外部的STI的顶表面的两侧形成电阻器。

公开(公告)号：US20140106558A1

公开(公告)日：2014-04-17

申请号：US14144584

申请日：2013-12-31

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Wei Hsu ,  Po-Cheng Huang ,  Teng-Chun Tsai ,  Chia-Lin Hsu ,  Chih-Hsun Lin ,  Yen-Ming Chen ,  Chia-Hsi Chen ,  Chang-Hung Kung

IPC: H01L21/28

CPC classification number: H01L21/28008 ,  H01L21/28123 ,  H01L21/31053 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7848

Abstract: A semiconductor device having a metal gate includes a substrate having a plurality of shallow trench isolations (STIs) formed therein, at least a metal gate positioned on the substrate, and at least a pair of auxiliary dummy structures respectively positioned at two sides of the metal gate and on the substrate.

Abstract translation: 具有金属栅极的半导体器件包括具有形成在其中的至少一个金属栅极的至少一个金属栅极和分别位于该金属的两侧的至少一对辅助虚拟结构的基板，其中形成有多个浅沟槽隔离物（STI） 门和衬底上。

公开(公告)号：US09012300B2

公开(公告)日：2015-04-21

申请号：US13633104

申请日：2012-10-01

Applicant: United Microelectronics Corp.

Inventor： Wu-Sian Sie ,  Chun-Wei Hsu ,  Chia-Lung Chang ,  Chih-Hsun Lin ,  Chang-Hung Kung ,  Yu-Ting Li ,  Wei-Che Tsao ,  Yen-Ming Chen ,  Chun-Hsiung Wang ,  Chia-Lin Hsu

IPC: H01L21/76 ,  H01L21/762

CPC classification number: H01L21/76232 ,  H01L21/76229

Abstract: A manufacturing method for a shallow trench isolation. First, a substrate is provided, a hard mask layer and a patterned photoresist layer are sequentially formed on the substrate, at least one trench is then formed in the substrate through an etching process, the hard mask layer is removed. Afterwards, a filler is formed at least in the trench and a planarization process is then performed on the filler. Since the planarization process is performed only on the filler, so the dishing phenomenon can effectively be avoided.

Abstract translation: 浅沟槽隔离的制造方法。 首先，提供基板，在基板上顺序地形成硬掩模层和图案化的光致抗蚀剂层，然后通过蚀刻工艺在基板中形成至少一个沟槽，去除硬掩模层。 然后，至少在沟槽中形成填料，然后对填料进行平面化处理。 由于仅在填料上进行平坦化处理，所以可以有效地避免凹陷现象。

公开(公告)号：US20140273371A1

公开(公告)日：2014-09-18

申请号：US14294152

申请日：2014-06-03

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Wei Hsu ,  Po-Cheng Huang ,  Ren-Peng Huang ,  Jie-Ning Yang ,  Chia-Lin Hsu ,  Teng-Chun Tsai ,  Chih-Hsun Lin ,  Chang-Hung Kung ,  Yen-Ming Chen ,  Yu-Ting Li

IPC: H01L27/06

CPC classification number: H01L27/0629

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation (STI) on the resistor region of the substrate; forming a tank in the STI; and forming a resistor in the tank and on two sides of the top surface of the STI outside the tank.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供具有晶体管区域和电阻器区域的衬底; 在衬底的电阻器区域上形成浅沟槽隔离（STI）; 在STI中形成坦克; 并且在罐内形成电阻器，并在罐外部的STI的上表面的两侧形成电阻器。