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公开(公告)号：US08392659B2
公开(公告)日：2013-03-05
申请号：US12612767
申请日：2009-11-05
申请人： Vaijayanthimala K. Anand , Diane Garza Flemming , William A. Maron , Mysore Sathyanarayana Srinivas
发明人： Vaijayanthimala K. Anand , Diane Garza Flemming , William A. Maron , Mysore Sathyanarayana Srinivas
IPC分类号： G06F12/08
CPC分类号： G06F12/084 , G06F2212/601
摘要： A method, programmed medium and system are provided for enabling a core's cache capacity to be increased by using the caches of the disabled or non-enabled cores on the same chip. Caches of disabled or non-enabled cores on a chip are made accessible to store cachelines for those chip cores that have been enabled, thereby extending cache capacity of enabled cores.
摘要翻译： 提供了一种编程介质和系统，用于通过使用同一芯片上的禁用或非使能内核的高速缓存来实现内核的高速缓存容量的增加。 对芯片上的禁用或非启用内核的缓存进行访问，以存储已启用的那些芯片内核的高速缓存线，从而扩展启用核心的高速缓存容量。
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公开(公告)号：US20110107031A1
公开(公告)日：2011-05-05
申请号：US12612767
申请日：2009-11-05
申请人： Vaijayanthimala K. Anand , Diane Garza Flemming , William A. Maron , Mysore Sathyanarayana Srinivas
发明人： Vaijayanthimala K. Anand , Diane Garza Flemming , William A. Maron , Mysore Sathyanarayana Srinivas
CPC分类号： G06F12/084 , G06F2212/601
摘要： A method, programmed medium and system are provided for enabling a core's cache capacity to be increased by using the caches of the disabled or non-enabled cores on the same chip. Caches of disabled or non-enabled cores on a chip are made accessible to store cachelines for those chip cores that have been enabled, thereby extending cache capacity of enabled cores.
摘要翻译： 提供了一种编程介质和系统，用于通过使用同一芯片上的禁用或非使能内核的高速缓存来实现内核的高速缓存容量的增加。 对芯片上的禁用或非启用内核的缓存进行访问，以存储已启用的那些芯片内核的高速缓存线，从而扩展启用核心的高速缓存容量。
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3.发明申请OPTIMIZING POWER MANAGEMENT IN PARTITIONED MULTICORE VIRTUAL MACHINE PLATFORMS BY UNIFORM DISTRIBUTION OF A REQUESTED POWER REDUCTION BETWEEN ALL OF THE PROCESSOR CORES 失效通过统一分配所有处理器之间所需的功率减少来优化分区式多机虚拟机平台中的电源管理公开(公告)号：US20110258468A1
公开(公告)日：2011-10-20
申请号：US12763431
申请日：2010-04-20
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/324 , G06F9/5077 , G06F9/5094 , Y02D10/126 , Y02D10/22 , Y02D10/36
摘要： Handling requests for power reduction by first enabling a request for an amount of power change, e.g. reduction by any partition. In response to the request for power reduction, an equal proportion of the whole amount of power reduction is distributed between each of a set of cores providing the entitlements to the partitions, and the entitlement of the requesting partition is reduced by an amount corresponding to the whole amount of the power change.
摘要翻译： 通过首先启用功率变化量的请求来处理功率降低的请求，例如， 减少任何分区。 响应于减少功率的请求，在提供分配权利的一组核心的每一个之间分配全部功率减少的相等比例，并且请求分区的授权减少对应于 整个功率的变化量。
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公开(公告)号：US08930670B2
公开(公告)日：2015-01-06
申请号：US11936456
申请日：2007-11-07
CPC分类号： G06F12/1009 , G06F2212/401
摘要： Illustrated embodiments provide a computer implemented method and data processing system for redispatching a partition by tracking a set of memory pages, belonging to the dispatched partition. In one illustrative embodiment the computer implemented method comprises finding an effective page address to real page address mapping for a page address miss in response to determining the page address miss in a page addressing buffer, and saving the mapping as an entry in an array. The computer implemented method creates a preserved array from the array in response to determining the dispatched partition to be an undispatched partition. The computer implemented method further analyzes of the preserved array for a compressed page in response to determining the undispatched partition is now redispatched, and decompresses the compressed page prior to the partition being redispatched.
摘要翻译： 说明的实施例提供了一种计算机实现的方法和数据处理系统，用于通过跟踪属于所分派的分区的一组存储器页来重新分配分区。 在一个说明性实施例中，计算机实现的方法包括响应于确定页寻址缓冲器中的页面地址未命中而找到页面地址未命中的实际页面地址映射的有效页面地址，并将映射保存为阵列中的条目。 计算机实现的方法从数组中创建一个保留的数组，以响应将分派的分区确定为未分配的分区。 计算机实现的方法进一步分析压缩页面的保留数组，以响应确定未分配的分区现在被重新分配，并在重新分配分区之前解压缩压缩页面。
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公开(公告)号：US20090182893A1
公开(公告)日：2009-07-16
申请号：US11972788
申请日：2008-01-11
IPC分类号： G06F15/173
CPC分类号： G06F15/16 , G06F12/0831
摘要： A method, a system, and computer readable program code for managing cache coherence in a virtual machine managed system are provided. In response to a processor issuing a message to be broadcast, a determination is made as to whether the processor is part of a virtual domain. In response to a determination that the processor is part of the virtual domain, the message and a first bit mask are sent from a source node to a destination node. In response to receiving the message and the first bit mask, one of a primary link or a secondary link is selected to send the message and the first bit mask over, forming a selected link. The message and the first bit mask are sent to the destination node over the selected link.
摘要翻译： 提供了一种用于管理虚拟机管理系统中的高速缓存一致性的方法，系统和计算机可读程序代码。 响应于处理器发出要广播的消息，确定处理器是否是虚拟域的一部分。 响应于处理器是虚拟域的一部分的确定，消息和第一位掩码从源节点发送到目的地节点。 响应于接收到所述消息和所述第一位掩码，选择主链路或辅助链路中的一个以发送所述消息和所述第一位掩码，从而形成所选择的链路。 消息和第一个位掩码通过所选链接发送到目标节点。
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6.发明授权公开(公告)号：US08291430B2
公开(公告)日：2012-10-16
申请号：US12500628
申请日：2009-07-10
IPC分类号： G06F9/46
CPC分类号： G06F9/45533 , G06F9/5077
摘要： A mechanism for optimizing system performance using spare processing cores in a virtualized environment. When detecting a workload partition needs to run on a virtual processor in the virtualized system, a state of the virtual processor is changed to a wait state. A first node comprising memory that is local to the workload partition is determined. A determination is also made as to whether a non-spare processor core in the first node is available to run the workload partition. If no non-spare processor core is available, a free non-spare processor core in a second node is located, and the state of the free non-spare processor core in the second node is changed to an inactive state. The state of a spare processor core in the first node is changed to an active state, and the workload partition is dispatched to the spare processor core in the first node for execution.
摘要翻译： 在虚拟化环境中使用备用处理核心优化系统性能的机制。 当检测到工作负载分区需要在虚拟化系统中的虚拟处理器上运行时，虚拟处理器的状态被改变为等待状态。 确定包括工作负载分区本地的存储器的第一节点。 还确定第一节点中的非备用处理器核心是否可用于运行工作负载分区。 如果没有非备用处理器核心可用，则定位第二节点中的空闲非备用处理器核心，并且将第二节点中的空闲非备用处理器核心的状态改变为非活动状态。 第一个节点中的备用处理器核心的状态更改为活动状态，并将工作负载分区分派到第一个节点中的备用处理器核心，以执行。
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7.发明申请公开(公告)号：US20110010709A1
公开(公告)日：2011-01-13
申请号：US12500628
申请日：2009-07-10
IPC分类号： G06F9/44
CPC分类号： G06F9/45533 , G06F9/5077
摘要： A mechanism for optimizing system performance using spare processing cores in a virtualized environment. When detecting a workload partition needs to run on a virtual processor in the virtualized system, a state of the virtual processor is changed to a wait state. A first node comprising memory that is local to the workload partition is determined. A determination is also made as to whether a non-spare processor core in the first node is available to run the workload partition. If no non-spare processor core is available, a free non-spare processor core in a second node is located, and the state of the free non-spare processor core in the second node is changed to an inactive state. The state of a spare processor core in the first node is changed to an active state, and the workload partition is dispatched to the spare processor core in the first node for execution.
摘要翻译： 在虚拟化环境中使用备用处理核心优化系统性能的机制。 当检测到工作负载分区需要在虚拟化系统中的虚拟处理器上运行时，虚拟处理器的状态被改变为等待状态。 确定包括工作负载分区本地的存储器的第一节点。 还确定第一节点中的非备用处理器核心是否可用于运行工作负载分区。 如果没有非备用处理器核心可用，则定位第二节点中的空闲非备用处理器核心，并且将第二节点中的空闲非备用处理器核心的状态改变为非活动状态。 第一个节点中的备用处理器核心的状态更改为活动状态，并将工作负载分区分派到第一个节点中的备用处理器核心，以执行。
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公开(公告)号：US20090119474A1
公开(公告)日：2009-05-07
申请号：US11936456
申请日：2007-11-07
IPC分类号： G06F13/00
CPC分类号： G06F12/1009 , G06F2212/401
摘要： Illustrated embodiments provide a computer implemented method and data processing system for redispatching a partition by tracking a set of memory pages, belonging to the dispatched partition. In one illustrative embodiment the computer implemented method comprises finding an effective page address to real page address mapping for a page address miss to create a found real page address and page size combination, responsive to determining the page address miss in a page addressing buffer, and saving the found real page address and page size combination as an entry in set of entries in an array. Further in the computer implemented method, creating a preserved array from the array, responsive to determining the dispatched partition to be an undispatched partition. The computer implemented method further, analyzing each entry of the preserved array for a compressed page, responsive to determining the undispatched partition is now redispatched, and invoking a partition management firmware function to decompress the compressed page, prior to the partition being redispatched, responsive to determining a compressed page.
摘要翻译： 说明的实施例提供了一种计算机实现的方法和数据处理系统，用于通过跟踪属于所分派的分区的一组存储器页来重新分配分区。 在一个说明性实施例中，计算机实现的方法包括：响应于确定页面寻址缓冲器中的页面地址未命中，找到用于寻址页面地址的真实页面地址映射以产生找到的真实页面地址和页面大小组合的有效页面地址，以及 将发现的真实页面地址和页面大小组合保存为数组中的条目集中的条目。 此外，在计算机实现的方法中，响应于将分派的分区确定为未分配的分区，从阵列创建保留的数组。 计算机实现的方法还包括：响应于确定未分配的分区现在被重新分配，分析压缩页面的保留数组的每个条目，并且在重新分配分区之前调用分区管理固件功能来解压缩压缩页面，响应于 确定压缩页面。
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9.发明授权Assigning cache priorities to virtual/logical processors and partitioning a cache according to such priorities 失效将缓存优先级分配给虚拟/逻辑处理器，并根据这些优先级对高速缓存进行分区公开(公告)号：US08301840B2
公开(公告)日：2012-10-30
申请号：US12637891
申请日：2009-12-15
IPC分类号： G06F12/12
CPC分类号： G06F12/0895 , G06F9/5022 , G06F9/5077 , G06F12/126 , G06F2209/5021
摘要： Mechanisms are provided, for implementation in a data processing system having at least one physical processor and at least one associated cache memory, for allocating cache resources of the at least one cache memory to virtual processors of the data processing system. The mechanisms identify a plurality of high priority virtual processors in the data processing system. The mechanisms further determine a percentage of cache lines of the at least one cache memory to be assigned to high priority virtual processors. Moreover, the mechanisms mark a portion of the cache lines in the at least one cache memory as being evictable by only high priority virtual processors based on the determined percentage of cache lines to be assigned to high priority virtual processors. The marked portion of the cache lines cannot be evicted by lower priority virtual processors having a priority lower than the high priority virtual processors.
摘要翻译： 提供了用于在具有至少一个物理处理器和至少一个相关联的高速缓冲存储器的数据处理系统中实现的机制，用于将至少一个高速缓冲存储器的高速缓存资源分配给数据处理系统的虚拟处理器。 该机制识别数据处理系统中的多个高优先级虚拟处理器。 这些机制进一步确定要分配给高优先级虚拟处理器的至少一个高速缓冲存储器的高速缓存行的百分比。 此外，机制将所述至少一个高速缓冲存储器中的高速缓存行的一部分标记为仅基于所分配给高优先级虚拟处理器的高速缓存行的确定百分比仅被高优先级的虚拟处理器驱逐。 高速缓存行的标记部分不能被优先级低于高优先级虚拟处理器的较低优先级的虚拟处理器驱逐。
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10.发明申请Assigning Cache Priorities to Virtual/Logical Processors and Partitioning a Cache According to Such Priorities 失效根据这种优先级，将虚拟/逻辑处理器的缓存优先级分配给缓存公开(公告)号：US20110145505A1
公开(公告)日：2011-06-16
申请号：US12637891
申请日：2009-12-15
CPC分类号： G06F12/0895 , G06F9/5022 , G06F9/5077 , G06F12/126 , G06F2209/5021
摘要： Mechanisms are provided, for implementation in a data processing system having at least one physical processor and at least one associated cache memory, for allocating cache resources of the at least one cache memory to virtual processors of the data processing system. The mechanisms identify a plurality of high priority virtual processors in the data processing system. The mechanisms further determine a percentage of cache lines of the at least one cache memory to be assigned to high priority virtual processors. Moreover, the mechanisms mark a portion of the cache lines in the at least one cache memory as being evictable by only high priority virtual processors based on the determined percentage of cache lines to be assigned to high priority virtual processors. The marked portion of the cache lines cannot be evicted by lower priority virtual processors having a priority lower than the high priority virtual processors.
摘要翻译： 提供了用于在具有至少一个物理处理器和至少一个相关联的高速缓冲存储器的数据处理系统中实现的机制，用于将至少一个高速缓冲存储器的高速缓存资源分配给数据处理系统的虚拟处理器。 该机制识别数据处理系统中的多个高优先级虚拟处理器。 这些机制进一步确定要分配给高优先级虚拟处理器的至少一个高速缓冲存储器的高速缓存行的百分比。 此外，机制将所述至少一个高速缓冲存储器中的高速缓存行的一部分标记为仅基于所分配给高优先级虚拟处理器的高速缓存行的确定百分比仅被高优先级的虚拟处理器驱逐。 高速缓存行的标记部分不能被优先级低于高优先级虚拟处理器的较低优先级的虚拟处理器驱逐。
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