公开(公告)号：US5665632A

公开(公告)日：1997-09-09

申请号：US608071

申请日：1996-02-28

申请人： Water Lur ,  Edward Houn

发明人： Water Lur ,  Edward Houn

IPC分类号： H01L21/308 ,  H01L21/311 ,  H01L21/336 ,  H01L21/762 ,  H01L21/763 ,  H01L21/31 ,  H01L21/764

CPC分类号： H01L29/6659 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/76229 ,  H01L21/763 ,  H01L29/6656 ,  Y10S148/073 ,  Y10S257/90 ,  Y10S438/938

摘要： A new method of trench isolation incorporating thermal stress releasing voids is described. Two sets of narrow trenches are etched into the silicon substrate not covered by a photoresist mask wherein the second set of trenches alternate with the first set of trenches. The first set of trenches is filled with an insulating layer. A second insulating layer is deposited over the surface of the substrate and within the second set of trenches wherein said insulating layer has step coverage such that voids are formed and are completely enclosed within the second set of trenches completing the thermal stress releasing device isolation of the integrated circuit. The method of forming thermal stress released polysilicon gate spacers in an integrated circuit is described. Polysilicon gate electrodes are formed on the surface of the semiconductor substrate. Sucessive sidewalls are formed on the gate electrodes of thin silicon dioxide, silicon nitride, and silicon dioxide. The silicon nitride spacers are removed leaving trenches between the thin silicon dioxide sidewalls and the silicon dioxide spacers. A thin insulating material is deposited over the surface of the gate electrodes and the sidewalls with a step coverage such that the trenches between the thin oxidation and the silicon dioxide spacers are not filled by the thin insulating layer but are covered by the thin insulating layer leaving voids which complete the thermal stress released polysilicon gate spacer formation in the fabrication of an integrated circuit.

摘要翻译： 描述了一种结合热应力释放空隙的新型沟槽隔离方法。 将两组窄沟槽蚀刻到未被光致抗蚀剂掩模覆盖的硅衬底中，其中第二组沟槽与第一组沟槽交替。 第一组沟槽填充有绝缘层。 第二绝缘层沉积在衬底的表面上并在第二组沟槽内，其中所述绝缘层具有阶梯覆盖，使得形成空隙并完全封闭在第二组沟槽内，从而完成热应力释放装置的隔离 集成电路。 描述了在集成电路中形成热应力释放多晶硅栅极间隔物的方法。 多晶硅栅电极形成在半导体衬底的表面上。 在薄二氧化硅，氮化硅和二氧化硅的栅电极上形成过多的侧壁。 去除氮化硅间隔物，留下薄二氧化硅侧壁和二氧化硅间隔物之间​​的沟槽。 薄的绝缘材料沉积在栅电极和侧壁的表面上，具有台阶覆盖，使得薄氧化物和二氧化硅间隔物之间​​的沟槽不被薄绝缘层填充，但被薄绝缘层覆盖，离开 完成热应力的空隙在集成电路的制造中释放多晶硅栅极间隔物的形成。

公开(公告)号：US5640041A

公开(公告)日：1997-06-17

申请号：US609260

申请日：1996-02-29

申请人： Water Lur ,  Edward Houn

发明人： Water Lur ,  Edward Houn

IPC分类号： H01L21/308 ,  H01L21/311 ,  H01L21/336 ,  H01L21/762 ,  H01L21/763 ,  H01L29/00

CPC分类号： H01L29/6659 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/76229 ,  H01L21/763 ,  H01L29/6656 ,  Y10S148/073 ,  Y10S257/90 ,  Y10S438/938

摘要： A new method of trench isolation incorporating thermal stress releasing voids is described. Two sets of narrow trenches are etched into the silicon substrate not covered by a photoresist mask wherein the second set of trenches alternate with the first set of trenches. The first set of trenches is filled with an insulating layer. A second insulating layer is deposited over the surface of the substrate and within the second set of trenches wherein said insulating layer has step coverage such that voids are formed and are completely enclosed within the second set of trenches completing the thermal stress releasing device isolation of the integrated circuit. The method of forming thermal stress released polysilicon gate spacers in an integrated circuit is described. Polysilicon gate electrodes are formed on the surface of the semiconductor substrate. Sucessive sidewalls are formed on the gate electrodes of thin silicon dioxide, silicon nitride, and silicon dioxide. The silicon nitride spacers are removed leaving trenches between the thin silicon dioxide sidewalls and the silicon dioxide spacers. A thin insulating material is deposited over the surface of the gate electrodes and the sidewalls with a step coverage such that the trenches between the thin oxidation and the silicon dioxide spacers are not filled by the thin insulating layer but are covered by the thin insulating layer leaving voids which complete the thermal stress released polysilicon gate spacer formation in the fabrication of an integrated circuit.

公开(公告)号：US5516720A

公开(公告)日：1996-05-14

申请号：US195090

申请日：1994-02-14

申请人： Water Lur ,  Edward Houn

发明人： Water Lur ,  Edward Houn

IPC分类号： H01L21/308 ,  H01L21/311 ,  H01L21/336 ,  H01L21/762 ,  H01L21/763 ,  H01L21/31

CPC分类号： H01L29/6659 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/76229 ,  H01L21/763 ,  H01L29/6656 ,  Y10S148/073 ,  Y10S257/90 ,  Y10S438/938

摘要： A new method of trench isolation incorporating thermal stress releasing voids is described. Two sets of narrow trenches are etched into the silicon substrate not covered by a photoresist mask wherein the second set of trenches alternate with the first set of trenches. The first set of trenches is filled with an insulating layer. A second insulating layer is deposited over the surface of the substrate and within the second set of trenches wherein said insulating layer has step coverage such that voids are formed and are completely enclosed within the second set of trenches completing the thermal stress releasing device isolation of the integrated circuit. The method of forming thermal stress released polysilicon gate spacers in an integrated circuit is described. Polysilicon gate electrodes are formed on the surface of the semiconductor substrate. Successive sidewalls are formed on the gate electrodes of thin silicon dioxide, silicon nitride, and silicon dioxide. The silicon nitride spacers are removed leaving trenches between the thin silicon dioxide sidewalls and the silicon dioxide spacers. A thin insulating material is deposited over the surface of the gate electrodes and the sidewalls with a step coverage such that the trenches between the thin oxidation and the silicon dioxide spacers are not filled by the thin insulating layer but are covered by the thin insulating layer leaving voids which complete the thermal stress released polysilicon gate spacer formation in the fabrication of an integrated circuit.

摘要翻译： 描述了一种结合热应力释放空隙的新型沟槽隔离方法。 将两组窄沟槽蚀刻到未被光致抗蚀剂掩模覆盖的硅衬底中，其中第二组沟槽与第一组沟槽交替。 第一组沟槽填充有绝缘层。 第二绝缘层沉积在衬底的表面上并在第二组沟槽内，其中所述绝缘层具有阶梯覆盖，使得形成空隙并完全封闭在第二组沟槽内，从而完成热应力释放装置的隔离 集成电路。 描述了在集成电路中形成热应力释放多晶硅栅极间隔物的方法。 多晶硅栅电极形成在半导体衬底的表面上。 在薄二氧化硅，氮化硅和二氧化硅的栅电极上形成连续的侧壁。 去除氮化硅间隔物，留下薄二氧化硅侧壁和二氧化硅间隔物之间​​的沟槽。 薄的绝缘材料沉积在栅电极和侧壁的表面上，具有台阶覆盖，使得薄氧化物和二氧化硅间隔物之间​​的沟槽不被薄绝缘层填充，但被薄绝缘层覆盖，离开 完成热应力的空隙在集成电路的制造中释放多晶硅栅极间隔物的形成。

公开(公告)号：US5661049A

公开(公告)日：1997-08-26

申请号：US609256

申请日：1996-02-29

申请人： Water Lur ,  Edward Houn

发明人： Water Lur ,  Edward Houn

IPC分类号： H01L21/308 ,  H01L21/311 ,  H01L21/336 ,  H01L21/762 ,  H01L21/763

CPC分类号： H01L29/6659 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/76229 ,  H01L21/763 ,  H01L29/6656 ,  Y10S148/073 ,  Y10S257/90 ,  Y10S438/938

摘要： A new method of trench isolation incorporating thermal stress releasing voids is described. Two sets of narrow trenches are etched into the silicon substrate not covered by a photoresist mask wherein the second set of trenches alternate with the first set of trenches. The first set of trenches is filled with an insulating layer. A second insulating layer is deposited over the surface of the substrate and within the second set of trenches wherein said insulating layer has step coverage such that voids are formed and are completely enclosed within the second set of trenches completing the thermal stress releasing device isolation of the integrated circuit. The method of forming thermal stress released polysilicon gate spacers in an integrated circuit is described. Polysilicon gate electrodes are formed on the surface of the semiconductor substrate. Sucessive sidewalls are formed on the gate electrodes of thin silicon dioxide, silicon nitride, and silicon dioxide. The silicon nitride spacers are removed leaving trenches between the thin silicon dioxide sidewalls and the silicon dioxide spacers. A thin insulating material is deposited over the surface of the gate electrodes and the sidewalls with a step coverage such that the trenches between the thin oxidation and the silicon dioxide spacers are not filled by the thin insulating layer but are covered by the thin insulating layer leaving voids which complete the thermal stress released polysilicon gate spacer formation in the fabrication of an integrated circuit.

摘要翻译： 描述了一种结合热应力释放空隙的新型沟槽隔离方法。 将两组窄沟槽蚀刻到未被光致抗蚀剂掩模覆盖的硅衬底中，其中第二组沟槽与第一组沟槽交替。 第一组沟槽填充有绝缘层。 第二绝缘层沉积在衬底的表面上并在第二组沟槽内，其中所述绝缘层具有阶梯覆盖，使得形成空隙并完全封闭在第二组沟槽内，从而完成热应力释放装置的隔离 集成电路。 描述了在集成电路中形成热应力释放多晶硅栅极间隔物的方法。 多晶硅栅电极形成在半导体衬底的表面上。 在薄二氧化硅，氮化硅和二氧化硅的栅电极上形成过多的侧壁。 去除氮化硅间隔物，留下薄二氧化硅侧壁和二氧化硅间隔物之间​​的沟槽。 薄的绝缘材料沉积在栅电极和侧壁的表面上，具有台阶覆盖，使得薄氧化物和二氧化硅间隔物之间​​的沟槽不被薄绝缘层填充，但被薄绝缘层覆盖，离开 完成热应力的空隙在集成电路的制造中释放多晶硅栅极间隔物的形成。

公开(公告)号：US5461011A

公开(公告)日：1995-10-24

申请号：US289650

申请日：1994-08-12

申请人： Chen-Chiu Hsue ,  Edward Houn

发明人： Chen-Chiu Hsue ,  Edward Houn

IPC分类号： H01L21/3105 ,  H01L21/324

CPC分类号： H01L21/3105 ,  Y10S148/133 ,  Y10S438/909 ,  Y10S438/935

摘要： A method of reflowing borophosphosilicate glass wherein wafers on a support that holds the wafers upright in spaced parallel relationship are introduced into a furnace. The wafers are heated to a temperature to achieve reflow while a main stream of heated inert gas is flowed over the wafers in a direction perpendicular to the planes of the substrates, while simultaneously an auxiliary stream of heated inert gas is flowed in a direction perpendicular to the main stream to prevent the formation of BPO.sub.4 crystals during reflow.

摘要翻译： 将硼磷硅酸盐玻璃回流的方法，其中将支撑体上的晶片以保持平行的间隔保持在晶片上的方式被引入炉中。 将晶片加热到温度以实现回流，同时加热的惰性气体的主流在垂直于基板的平面的方向上流过晶片，同时加热的惰性气体的辅助流在垂直于 主流防止在回流期间形成BPO4晶体。

公开(公告)号：US5828036A

公开(公告)日：1998-10-27

申请号：US499299

申请日：1995-07-07

申请人： Chen-Chiu Hsue ,  Edward Houn

发明人： Chen-Chiu Hsue ,  Edward Houn

IPC分类号： H01L21/3105 ,  C23L16/00 ,  H01L21/316

CPC分类号： H01L21/3105 ,  Y10S148/133 ,  Y10S438/909 ,  Y10S438/935

摘要： A furnace with a large quartz tube with a gas inlet on one end, and a large opening at the other end for introducing and withdrawn wafers on a support. At least one small quartz tube is provided within and adjacent the sidewall of the large tube that has a gas inlet on one end outside of the large tube, and apertures in the sidewall. In use, a major stream of gas is provided by a gas inlet on the large tube that flows longitudinally through the large tube. A series of secondary streams of gas are provided from the apertures in the small tube that flow perpendicular to the major stream and across the surfaces of the wafers.

摘要翻译： 具有在一端具有气体入口的大石英管和在另一端的大开口的炉子，用于在支撑件上引入和取出晶片。 至少一个小的石英管设置在大管的侧壁内并与其相邻，在大管的一端具有气体入口和侧壁中的孔。 在使用中，主要的气流由大管上的气体入口提供，其纵向流过大管。 从小管中的孔中提供一系列二次气体流，其垂直于主流和跨越晶片的表面流动。

公开(公告)号：US5669768A

公开(公告)日：1997-09-23

申请号：US616369

申请日：1996-03-15

申请人： Yu-Tsai Lin ,  Edward Houn ,  Ben Chen

发明人： Yu-Tsai Lin ,  Edward Houn ,  Ben Chen

IPC分类号： C30B31/16 ,  C30B33/00 ,  F27D3/16 ,  F27B5/04

CPC分类号： C30B31/16 ,  C30B33/005 ,  F27D3/16

摘要： An improved apparatus is provided for adjusting a gas injector of a furnace in connection with oxidation, diffusion and heat treating in semiconductor processing. The apparatus includes a reaction tube for serving as a reaction chamber and heat sink. The gas injector is coupled to the reaction tube on one end and includes openings on the other end for passing source gas. An elongated open tube is secured to the gas injector and has its axis superimposed approximately on the axis of the gas injector.

摘要翻译： 提供了一种改进的装置，用于在半导体加工中调节与氧化，扩散和热处理有关的炉的气体注射器。 该装置包括用作反应室和散热器的反应管。 气体喷射器在一端连接到反应管，并且在另一端包括用于使源气体通过的开口。 细长的开放管固定到气体注射器并且其轴线大致重叠在气体注射器的轴线上。

公开(公告)号：US5658833A

公开(公告)日：1997-08-19

申请号：US593919

申请日：1996-01-30

申请人： Shih-Ching Chen ,  Edward Houn

发明人： Shih-Ching Chen ,  Edward Houn

IPC分类号： C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  H01L21/318

CPC分类号： C23C16/45591 ,  C23C16/345 ,  C23C16/4401

摘要： In a process of fabricating an integrated circuit, a method for uniformly depositing silicon nitride by disposing a plurality of dummy discs beside the production wafers. The dummy discs are made of quartz or silicon carbide. Since the dummy discs can be used longer before been recycled, plenty dummy discs can be saved from disuse. Furthermore, the cost of the management and treatment of the dummy discs is great reduced in this way.

摘要翻译： 在制造集成电路的过程中，通过在生产晶片旁边配置多个虚拟盘来均匀地沉积氮化硅的方法。 虚拟盘由石英或碳化硅制成。 由于虚拟光盘在再循环之前可以使用时间较长，因此可以节省大量虚拟光盘。 此外，虚拟光盘的管理和处理成本大大降低。