公开(公告)号：US5658833A

公开(公告)日：1997-08-19

申请号：US593919

申请日：1996-01-30

申请人： Shih-Ching Chen ,  Edward Houn

发明人： Shih-Ching Chen ,  Edward Houn

IPC分类号： C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  H01L21/318

CPC分类号： C23C16/45591 ,  C23C16/345 ,  C23C16/4401

摘要： In a process of fabricating an integrated circuit, a method for uniformly depositing silicon nitride by disposing a plurality of dummy discs beside the production wafers. The dummy discs are made of quartz or silicon carbide. Since the dummy discs can be used longer before been recycled, plenty dummy discs can be saved from disuse. Furthermore, the cost of the management and treatment of the dummy discs is great reduced in this way.

摘要翻译： 在制造集成电路的过程中，通过在生产晶片旁边配置多个虚拟盘来均匀地沉积氮化硅的方法。 虚拟盘由石英或碳化硅制成。 由于虚拟光盘在再循环之前可以使用时间较长，因此可以节省大量虚拟光盘。 此外，虚拟光盘的管理和处理成本大大降低。

公开(公告)号：US08427879B2

公开(公告)日：2013-04-23

申请号：US12644575

申请日：2009-12-22

申请人： Ting-Chang Chang ,  Shih-Ching Chen ,  Te-Chih Chen ,  Fu-Yen Jian ,  Yong-En Syu

发明人： Ting-Chang Chang ,  Shih-Ching Chen ,  Te-Chih Chen ,  Fu-Yen Jian ,  Yong-En Syu

IPC分类号： G11C11/34 ,  G11C16/04

CPC分类号： G11C16/0466 ,  G11C16/10 ,  H01L29/792

摘要： There is a method for enabling a SONOS transistor to be used as both a switch and a memory. FN tunneling is carried out through the source or drain of the transistor, so as to further change the state of electrons stored in an upper charge storage layer adjacent to the drain or source, and the variation in gate-induced drain leakage is used to recognize the memory state of the drain and source. A stable threshold voltage of the transistor is always maintained during this operation. The present invention enables one single transistor having dual features of switch and memory, while being provided with a two-bit memory effect, thus providing a higher memory density in comparison with a general transistor.

摘要翻译： 存在使SONOS晶体管能够用作开关和存储器的方法。 通过晶体管的源极或漏极进行FN隧穿，从而进一步改变存储在与漏极或源极相邻的上部电荷存储层中的电子的状态，并且使用栅极引起的漏极泄漏的变化来识别 漏极和源的存储状态。 在此操作期间，始终保持晶体管的稳定阈值电压。 本发明使得具有开关和存储器的双重特征的单个晶体管同时具有两比特存储器效应，从而与通用晶体管相比提供了更高的存储器密度。

公开(公告)号：US20130030045A1

公开(公告)日：2013-01-31

申请号：US13567934

申请日：2012-08-06

申请人： Yu-Hui TSAI ,  Yu-Wei Wu ,  Yu-Hsiang Lin ,  Wen-Fu Lai ,  Shih-Ching Chen

发明人： Yu-Hui TSAI ,  Yu-Wei Wu ,  Yu-Hsiang Lin ,  Wen-Fu Lai ,  Shih-Ching Chen

IPC分类号： A61K31/353 ,  A61P19/10

CPC分类号： A61K31/353

摘要： The invention discloses a method of preventing and treating osteoporosis. The method comprises a step of enhancing osteoblast differentiation and inhibiting osteoclast differentiation by administering a pharmaceutically effective amount of a composition comprising 6-hydroxy flavone compound or 7-methoxy flavone compound, or at least one pharmaceutically acceptable salt thereof to a subject.

摘要翻译： 本发明公开了一种预防和治疗骨质疏松症的方法。 该方法包括通过向受试者施用药学有效量的包含6-羟基黄酮化合物或7-甲氧基黄酮化合物或其至少一种药学上可接受的盐的组合物来增强成骨细胞分化和抑制破骨细胞分化的步骤。

公开(公告)号：US08592794B2

公开(公告)日：2013-11-26

申请号：US13112605

申请日：2011-05-20

申请人： Ting-Chang Chang ,  Po-Chun Yang ,  Yu-Shih Lin ,  Shih-Ching Chen ,  Fu-Yen Jian

发明人： Ting-Chang Chang ,  Po-Chun Yang ,  Yu-Shih Lin ,  Shih-Ching Chen ,  Fu-Yen Jian

IPC分类号： H01L47/00 ,  H01L21/04

CPC分类号： H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/1273 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16

摘要： A resistance random access memory element includes a first electrode, an insulating layer, a diffusing metal layer, and a second electrode superimposed in sequence. The insulating layer includes a plurality of pointed electrodes. A method for making a resistance random access memory element includes growing and forming an insulating layer on a surface of a first electrode. A diffusing metal layer is formed on a surface of the insulating layer. A second electrode is mounted on a surface of the diffusing metal layer. A negative pole and a positive pole of a driving voltage are connected with the first and second electrodes, respectively. The diffusing metal in the diffusing metal layer is oxidized into metal ions by the driving voltage. The metal ions are driven into the insulating layer and form a plurality of pointed electrodes after reduction.

摘要翻译： 电阻随机存取存储元件包括依次叠加的第一电极，绝缘层，扩散金属层和第二电极。 绝缘层包括多个尖电极。 制造电阻随机存取存储元件的方法包括在第一电极的表面上生长并形成绝缘层。 在绝缘层的表面上形成扩散金属层。 第二电极安装在漫射金属层的表面上。 驱动电压的负极和正极分别与第一和第二电极连接。 扩散金属层中的扩散金属通过驱动电压被氧化为金属离子。 金属离子被驱动到绝缘层中，并且在还原之后形成多个尖电极。

公开(公告)号：US08208307B2

公开(公告)日：2012-06-26

申请号：US12772111

申请日：2010-04-30

申请人： Ting-Chang Chang ,  Fu-Yen Jian ,  Shih-Ching Chen ,  Te-Chih Chen

发明人： Ting-Chang Chang ,  Fu-Yen Jian ,  Shih-Ching Chen ,  Te-Chih Chen

IPC分类号： G11C11/34

CPC分类号： G11C16/0466 ,  G11C11/5628 ,  H01L29/792

摘要： A method for operating a memory device is provided. In accordance with the method, the charges are stored in a source storage region, a drain storage region, and a channel storage region of a charge storage layer which respectively correspond to a source, a drain, and a channel of a SONOS transistor, thereby achieving 3-bit information storage in one cell. The channel storage region is programmed and erased by FN tunneling. Both of the source storage region and the drain storage region are programmed by channel hot electrons and erased by source-side or drain-side FN tunneling. The present invention can store three-bit data per cell, such that the storage density of the memory device can be substantially increased.

摘要翻译： 提供了一种用于操作存储器件的方法。 根据该方法，将电荷存储在电荷存储层的源极存储区域，漏极存储区域以及与SONOS晶体管的源极，漏极和沟道对应的电荷存储层的沟道存储区域中，从而 在一个单元中实现3位信息存储。 信道存储区域通过FN隧道编程和擦除。 源极存储区域和漏极存储区域都被通道热电子编程，并通过源极侧或漏极侧FN隧道擦除。 本发明可以存储每个小区的三比特数据，从而可以显着增加存储装置的存储密度。

公开(公告)号：US20110217773A1

公开(公告)日：2011-09-08

申请号：US12716141

申请日：2010-03-02

申请人： Yu-Hui Tsai ,  Li-Hsuan Chiu ,  Chin-Chean Wong ,  Wen-Fu Lai ,  Shih-Ching Chen

发明人： Yu-Hui Tsai ,  Li-Hsuan Chiu ,  Chin-Chean Wong ,  Wen-Fu Lai ,  Shih-Ching Chen

IPC分类号： C12N5/10 ,  C12N5/07 ,  C12N5/071 ,  C12N5/02

CPC分类号： C12N5/10

摘要： The present invention provides a method for restoring native chondrocyte phenotype and functions of, and/or increasing type II collagen as well as aggrecan mRNA expression levels and GAG accumulation level in dedifferentiated chondrocytes which have been subcultured and expanded in vitro, which comprising culturing the said dedifferentiated chondrocytes in vitro with a medium comprising type II collagen, or its biologically active peptide fragment(s) or analogs with or without growth factor(s), wherein the type II collagen or its biologically active peptide fragment(s) or analogs are effective to restore chondrocyte phenotype and functions of, and/or to increase type II collagen and aggrecan expression levels and GAG accumulation level in the said dedifferentiated chondrocytes.

摘要翻译： 本发明提供了一种在体外传代培养和扩增的去分化软骨细胞中恢复天然软骨细胞表型和功能和/或增加II型胶原以及聚集蛋白聚糖mRNA表达水平和GAG积聚水平的方法，其包括培养所述 用包含II型胶原的培养基或其生物活性肽片段或具有或不具有生长因子的类似物在体外进行去分化软骨细胞，其中II型胶原或其生物活性肽片段或类似物是有效的 和/或增加所述去分化软骨细胞中II型胶原和聚集蛋白聚糖表达水平和GAG积累水平的软骨细胞表型和功能。

公开(公告)号：US07835192B2

公开(公告)日：2010-11-16

申请号：US12314129

申请日：2008-12-04

申请人： Ting-Chang Chang ,  Shih-Ching Chen ,  Fu-Yen Jian

发明人： Ting-Chang Chang ,  Shih-Ching Chen ,  Fu-Yen Jian

IPC分类号： G11C16/04

CPC分类号： G11C16/0408 ,  G11C16/0466 ,  G11C16/10

摘要： A method for programming a nonvolatile memory includes applying at least a voltage to a source or a drain, so as to inject carriers of the source or drain into a substrate; applying a third voltage to a gate or the substrate, so that the carriers which are in the substrate having enough energy can surmount an oxide layer to reach a charge storage device.

摘要翻译： 一种用于对非易失性存储器进行编程的方法包括至少向源极或漏极施加电压，以便将源极或漏极的载流子注入到衬底中; 向栅极或衬底施加第三电压，使得在衬底中具有足够能量的载流子可以超过氧化物层到达电荷存储装置。

公开(公告)号：US20130043061A1

公开(公告)日：2013-02-21

申请号：US13411650

申请日：2012-03-05

申请人： Wen-Fu Huang ,  Shih-Ching Chen ,  Chen-Hui Cheng ,  Meng-Hsueh Wu

发明人： Wen-Fu Huang ,  Shih-Ching Chen ,  Chen-Hui Cheng ,  Meng-Hsueh Wu

IPC分类号： H05K1/00 ,  H05K3/12

CPC分类号： G06F3/041 ,  G06F3/044 ,  G06F2203/04103 ,  H05K1/0296 ,  H05K2201/0979 ,  Y10T29/49155

摘要： The present disclosure related to circuit structure of an electronic device, wherein the circuit structure comprises of a main line formed on a substrate; and at least an auxiliary line electrically connected to the main line to form a conductive return circuit used for a signal to pass through the auxiliary line when the main line is disconnected. Addition of the auxiliary line avoids any breaking of signal transmission due to partial disconnection of the main line. The present disclosure also relates to a method for manufacturing the circuit structure, wherein the method simplifies the manufacturing process and also reduces the rate of deformation or disconnection of lines.

摘要翻译： 本公开涉及电子设备的电路结构，其中电路结构包括形成在基板上的主线; 以及至少一个辅助线路，其电连接到所述主线路，以形成当所述主线路断开时用于信号通过所述辅助线路的导电返回电路。 辅助线路的添加可避免由于主线部分断开导致信号传输的任何破坏。 本公开还涉及一种用于制造电路结构的方法，其中该方法简化了制造过程并且还降低了线的变形或断开的速率。

公开(公告)号：US20110096610A1

公开(公告)日：2011-04-28

申请号：US12644575

申请日：2009-12-22

申请人： Ting-Chang Chang ,  Shih-Ching Chen ,  Te-Chih Chen ,  Fu-Yen Jian ,  Yong-En Syu

发明人： Ting-Chang Chang ,  Shih-Ching Chen ,  Te-Chih Chen ,  Fu-Yen Jian ,  Yong-En Syu

IPC分类号： G11C16/04

CPC分类号： G11C16/0466 ,  G11C16/10 ,  H01L29/792

摘要： There is a method for enabling a SONOS transistor to be used as both a switch and a memory. FN tunneling is carried out through the source or drain of the transistor, so as to further change the state of electrons stored in an upper charge storage layer adjacent to the drain or source, and the variation in gate-induced drain leakage is used to recognize the memory state of the drain and source. A stable threshold voltage of the transistor is always maintained during this operation. The present invention enables one single transistor having dual features of switch and memory, while being provided with a two-bit memory effect, thus providing a higher memory density in comparison with a general transistor.

摘要翻译： 存在使SONOS晶体管能够用作开关和存储器的方法。 通过晶体管的源极或漏极进行FN隧穿，从而进一步改变存储在与漏极或源极相邻的上部电荷存储层中的电子的状态，并且使用栅极引起的漏极泄漏的变化来识别 漏极和源的存储状态。 在此操作期间，始终保持晶体管的稳定阈值电压。 本发明使得具有开关和存储器的双重特征的单个晶体管同时具有两比特存储器效应，从而与通用晶体管相比提供了更高的存储器密度。

公开(公告)号：US20070103446A1

公开(公告)日：2007-05-10

申请号：US11266195

申请日：2005-11-04

申请人： Shun-Ta Chien ,  Shih-Ching Chen

发明人： Shun-Ta Chien ,  Shih-Ching Chen

IPC分类号： G09G5/00

CPC分类号： G06F3/045

摘要： The present invention is to provide a wiring of a touch panel comprising a glass substrate including a transparent and conductive layer on a top surface; a plurality of wires disposed along a border of the glass substrate; a plurality of conductive ends formed at the top side of the glass substrate, each of the wires being electrically connected to one of the conductive ends; and a flexible circuit board provided at the wires, the flexible circuit board including a plurality of connections each electrically connected to one of the conductive ends. By utilizing this wiring, prior used conductors are replaced by the flexible circuit board in order to decrease wiring area and make wiring of the touch panel become narrower.

摘要翻译： 本发明提供一种触摸面板的布线，其包括在顶表面上包括透明导电层的玻璃基板; 沿着所述玻璃基板的边界设置的多根电线; 多个导电端部形成在玻璃基板的顶侧，每条导线电连接到导电端之一; 以及设置在所述导线上的柔性电路板，所述柔性电路板包括多个连接，每个连接电连接到所述导电端之一。 通过利用该布线，现有的导体被柔性电路板代替，以减少布线面积，并使触摸面板的布线变窄。