公开(公告)号：US06884329B2

公开(公告)日：2005-04-26

申请号：US10340564

申请日：2003-01-10

申请人： Wei D. Wang ,  Anantha K. Subramani ,  Jianming Fu ,  Praburam Gopalraja ,  Jick M. Yu ,  Fusen Chen

发明人： Wei D. Wang ,  Anantha K. Subramani ,  Jianming Fu ,  Praburam Gopalraja ,  Jick M. Yu ,  Fusen Chen

IPC分类号： C23C14/04 ,  C23C14/34 ,  C23C14/54 ,  H01L21/285 ,  H01L21/768

CPC分类号： H01L21/76844 ,  C23C14/046 ,  C23C14/345 ,  C23C14/541 ,  H01L21/2855 ,  H01L21/76865 ,  H01L21/76877

摘要： A method of filling copper into a high-aspect ratio via by a plasma sputter process and allowing the elimination of electrochemical plating. In one aspect of the invention, the sputtering is divided into a first step performed at a low temperature of no more than 100° C. and with at least portions of high wafer bias, thereby filling a lower half of the hole, and a second step performed at a higher temperature, e.g., at least 200° C. and with at least portions of low wafer bias to complete the hole filling. In another aspect of the invention, diffusion promoting gas such as hydrogen is added to the copper sputter plasma. In still another aspect, copper sputtering, even in the final fill phase, is performed through multiple cycles of low-level and high-level pedestal bias to deposit copper on exposed corners and to sputter from the corners.

摘要翻译： 一种通过等离子体溅射工艺将铜填充到高纵横比通孔并允许消除电化学电镀的方法。 在本发明的一个方面，溅射被分为在不超过100℃的低温下进行的第一步骤和至少部分高晶片偏压，从而填充孔的下半部分，并且第二步骤 步骤在较高的温度例如至少200℃进行，并且至少部分低晶片偏置以完成孔填充。 在本发明的另一方面，将扩散促进气体如氢气加入到铜溅射等离子体中。 在另一方面，即使在最终填充阶段，铜溅射也是通过多个低级和高级底座偏压循环进行的，以便在暴露的拐角上沉积铜并从拐角溅射。

公开(公告)号：US06899796B2

公开(公告)日：2005-05-31

申请号：US10428476

申请日：2003-05-01

申请人： Wei D. Wang ,  Anantha K. Subramani ,  Jianming Fu ,  Praburam Gopalraja ,  Jick M. Yu ,  Fusen Chen

发明人： Wei D. Wang ,  Anantha K. Subramani ,  Jianming Fu ,  Praburam Gopalraja ,  Jick M. Yu ,  Fusen Chen

IPC分类号： C23C14/04 ,  C23C14/34 ,  C23C14/54 ,  H01L21/285 ,  H01L21/768 ,  B05D1/36

CPC分类号： C23C14/046 ,  C23C14/185 ,  C23C14/345 ,  C23C14/3492 ,  C23C14/541 ,  H01L21/2855 ,  H01L21/76844 ,  H01L21/76865 ,  H01L21/76877

摘要： A two-step method of filling copper into a high-aspect ratio via or dual-damascene structure. The first step sputters at a low temperature of no more than 100° C. and with at least portions of high wafer bias, thereby filling a lower half of the hole. The initial copper sputtering is preferably performed through multiple cycles of low-level and high-level pedestal bias to deposit copper on exposed corners and to sputter resulting overhangs from the corners while depositing deep in the hole. The second step may include either electrochemical plating or sputtering performed at a higher temperature, e.g., at least 200° C. and with lower wafer bias to complete the hole filling. In another aspect of the invention, diffusion promoting gas such as hydrogen is added to the copper sputter plasma.

摘要翻译： 将铜填充到高纵横比或双镶嵌结构的两步法。 第一步在不超过100℃的低温下进行喷射，并且至少部分高晶片偏置，从而填充孔的下半部分。 初始铜溅射优选通过多个低水平和高水平基座偏压的周期进行，以在暴露的拐角上沉积铜，并且在沉积在孔中深处时从角部溅射所得到的突出端。 第二步可以包括在较高温度例如至少200℃进行的电化学电镀或溅射，并且具有较低的晶片偏置以完成孔填充。 在本发明的另一方面，将扩散促进气体如氢气加入到铜溅射等离子体中。

公开(公告)号：US07294574B2

公开(公告)日：2007-11-13

申请号：US10915139

申请日：2004-08-09

申请人： Peijun Ding ,  Fuhong Zhang ,  Hsien-Lung Yang ,  Michael A. Miller ,  Jianming Fu ,  Jick M. Yu ,  Zheng Xu ,  Fusen Chen

发明人： Peijun Ding ,  Fuhong Zhang ,  Hsien-Lung Yang ,  Michael A. Miller ,  Jianming Fu ,  Jick M. Yu ,  Zheng Xu ,  Fusen Chen

IPC分类号： H01L21/44

CPC分类号： H01L21/2855 ,  H01L21/76843 ,  H01L21/76865 ,  H01L21/76873 ,  H01L2221/1089

摘要： An integrated sputtering method and reactor for copper or aluminum seed layers in which a plasma sputter reactor initially deposits a thin conformal layer onto a substrate including a high-aspect ratio hole subject to the formation of overhangs. After the seed deposition, the same sputter reactor is used to sputter etch the substrate with energetic light ions, especially helium, having an energy sufficiently low that it selectively etches the metallization to the heavier underlying barrier layer, for example, copper over tantalum or aluminum over titanium. An RF inductive coil generates the plasma during the sputtering etching while the target power is turned off. A final copper flash step deposits copper over the bare barrier field region before copper is electrochemically plated to fill the hole. The invention also includes a simultaneous sputter deposition and sputter etch, and an energetic ion processing of the copper seed sidewall.

摘要翻译： 一种用于铜或铝种子层的集成溅射方法和反应器，其中等离子体溅射反应器最初将薄的共形层沉积到包括形成突出端的高纵横比孔的基板上。 在种子沉积之后，使用相同的溅射反应器以能量足够低的能量的能量轻离子（特别是氦）溅射蚀刻衬底，以使其能够将金属化选择性地蚀刻到较重的下层阻挡层，例如钽或铝上的铜 超过钛。 RF感应线圈在溅射蚀刻期间产生等离子体，同时关闭目标电源。 在铜电化学镀以填充孔之前，最终的铜闪光步骤将铜沉积在裸露的屏障场区域上。 本发明还包括同时溅射沉积和溅射蚀刻以及铜种子侧壁的能量离子处理。

公开(公告)号：US06887786B2

公开(公告)日：2005-05-03

申请号：US10409406

申请日：2003-04-07

申请人： Hong Zhang ,  Xianmin Tang ,  Praburam Gopalraja ,  John C. Forster ,  Jick M. Yu

发明人： Hong Zhang ,  Xianmin Tang ,  Praburam Gopalraja ,  John C. Forster ,  Jick M. Yu

IPC分类号： C23C14/04 ,  C23C14/06 ,  C23C14/18 ,  C23C14/58 ,  H01L21/285 ,  H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/76843 ,  C23C14/046 ,  C23C14/0641 ,  C23C14/185 ,  C23C14/5873 ,  H01L21/2855 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76865

摘要： A first method is provided for forming a barrier layer on a substrate by sputter-depositing a tantalum nitride layer on a substrate having (1) a metal feature formed on the substrate; (2) a dielectric layer formed over the metal feature; and (3) a via formed in the dielectric layer so as to expose the metal feature. The via has side walls and a bottom, and a width of about 0.18 microns or less. The tantalum nitride layer is deposited on the side walls and bottom of the via and on a field region of the dielectric layer; and has a thickness of at least about 200 angstroms on the field region. The first method also includes sputter-depositing a tantalum layer on the substrate, in the same chamber. The tantalum layer having a thickness of less than about 100 angstroms on the field region. Other aspects are provided.

摘要翻译： 提供了第一种方法，用于通过在（1）形成在基底上的金属特征的基底上溅射沉积氮化钽层而在衬底上形成阻挡层; （2）形成在所述金属特征上的电介质层; 和（3）形成在电介质层中的通孔以暴露金属特征。 通孔具有侧壁和底部，宽度为约0.18微米或更小。 氮化钽层沉积在通孔的侧壁和底部以及电介质层的场区上; 并且在场区域具有至少约200埃的厚度。 第一种方法还包括在相同的室中在衬底上溅射沉积钽层。 该钽层的厚度在场区域上小于约100埃。 提供其他方面。

公开(公告)号：US20080237029A1

公开(公告)日：2008-10-02

申请号：US11691302

申请日：2007-03-26

申请人： Xianmin TANG ,  Hua Chung ,  Rongjun Wang ,  Praburam Gopalraja ,  Jick M. Yu ,  Jenn Yue Wang

发明人： Xianmin TANG ,  Hua Chung ,  Rongjun Wang ,  Praburam Gopalraja ,  Jick M. Yu ,  Jenn Yue Wang

IPC分类号： C23C14/34

CPC分类号： C23C14/046 ,  C23C14/0036 ,  C23C14/0641 ,  C23C14/083 ,  H01L21/2855 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76868 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and resultant produce of forming barrier layer based on ruthenium tantalum in a via or other vertical interconnect structure through a dielectric layer in a multi-level metallization. The RuTa layer in a RuTa/RuTaN bilayer, which may form discontinuous islands, is actively oxidized, preferably in an oxygen plasma, to thereby bridge the gaps between the islands. Alternatively, ruthenium tantalum oxide is reactive sputtered onto the RuTaN or directly onto the underlying dielectric by plasma sputtering a RuTa target in the presence of oxygen.

摘要翻译： 在多层金属化中通过介电层在通孔或其它垂直互连结构中形成基于钌钽的阻挡层的方法和所得产物。 可能形成不连续岛的RuTa / RuTaN双层中的RuTa层优选在氧等离子体中被有效氧化，从而桥接岛之间的间隙。 或者，通过在氧气存在下通过等离子体溅射RuTa靶，氧化钌钽氧化物反应性溅射到RuTaN上或直接沉积到下面的电介质上。

公开(公告)号：US20090087982A1

公开(公告)日：2009-04-02

申请号：US12240822

申请日：2008-09-29

申请人： RONGJUN WANG ,  Hua Chung ,  Jick M. Yu ,  Praburam Gopalraja

发明人： RONGJUN WANG ,  Hua Chung ,  Jick M. Yu ,  Praburam Gopalraja

IPC分类号： H01L21/4763

CPC分类号： H01L21/28562 ,  C23C16/04 ,  C23C16/18 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76868 ,  H01L21/76871 ,  H01L2221/1089

摘要： Embodiments of the invention provide processes for selectively forming a ruthenium-containing film on a copper surface over exposed dielectric surfaces. Thereafter, a copper bulk layer may be deposited on the ruthenium-containing film. In one embodiment, a method for forming layers on a substrate is provided which includes positioning a substrate within a processing chamber, wherein the substrate contains a copper-containing surface and a dielectric surface, exposing the substrate to a ruthenium precursor to selectively form a ruthenium-containing film over the copper-containing surface while leaving exposed the dielectric surface, and depositing a copper bulk layer over the ruthenium-containing film.

摘要翻译： 本发明的实施方案提供了在暴露的电介质表面上在铜表面上选择性地形成含钌膜的方法。 此后，可以将铜本体层沉积在含钌膜上。 在一个实施例中，提供了一种用于在衬底上形成层的方法，其包括将衬底定位在处理室内，其中衬底包含含铜表面和电介质表面，将衬底暴露于钌前体以选择性地形成钌 同时留下电介质表面，并在含钌膜上沉积铜体积层。

公开(公告)号：US07737028B2

公开(公告)日：2010-06-15

申请号：US12240822

申请日：2008-09-29

申请人： Rongjun Wang ,  Hua Chung ,  Jick M. Yu ,  Praburam Gopalraja

发明人： Rongjun Wang ,  Hua Chung ,  Jick M. Yu ,  Praburam Gopalraja

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/28562 ,  C23C16/04 ,  C23C16/18 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76868 ,  H01L21/76871 ,  H01L2221/1089

摘要： Embodiments of the invention provide processes for selectively forming a ruthenium-containing film on a copper surface over exposed dielectric surfaces. Thereafter, a copper bulk layer may be deposited on the ruthenium-containing film. In one embodiment, a method for forming layers on a substrate is provided which includes positioning a substrate within a processing chamber, wherein the substrate contains a copper-containing surface and a dielectric surface, exposing the substrate to a ruthenium precursor to selectively form a ruthenium-containing film over the copper-containing surface while leaving exposed the dielectric surface, and depositing a copper bulk layer over the ruthenium-containing film.

摘要翻译： 本发明的实施方案提供了在暴露的电介质表面上在铜表面上选择性地形成含钌膜的方法。 此后，可以将铜本体层沉积在含钌膜上。 在一个实施例中，提供了一种用于在衬底上形成层的方法，其包括将衬底定位在处理室内，其中衬底包含含铜表面和电介质表面，将衬底暴露于钌前体以选择性地形成钌 同时留下电介质表面，并在含钌膜上沉积铜体积层。

公开(公告)号：US07659204B2

公开(公告)日：2010-02-09

申请号：US11691302

申请日：2007-03-26

申请人： Xianmin Tang ,  Hua Chung ,  Rongjun Wang ,  Praburam Gopalraja ,  Jick M. Yu ,  Jenn Yue Wang

发明人： Xianmin Tang ,  Hua Chung ,  Rongjun Wang ,  Praburam Gopalraja ,  Jick M. Yu ,  Jenn Yue Wang

IPC分类号： H01L21/44

CPC分类号： C23C14/046 ,  C23C14/0036 ,  C23C14/0641 ,  C23C14/083 ,  H01L21/2855 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76868 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and resultant produce of forming barrier layer based on ruthenium tantalum in a via or other vertical interconnect structure through a dielectric layer in a multi-level metallization. The RuTa layer in a RuTa/RuTaN bilayer, which may form discontinuous islands, is actively oxidized, preferably in an oxygen plasma, to thereby bridge the gaps between the islands. Alternatively, ruthenium tantalum oxide is reactive sputtered onto the RuTaN or directly onto the underlying dielectric by plasma sputtering a RuTa target in the presence of oxygen.

摘要翻译： 在多层金属化中通过介电层在通孔或其它垂直互连结构中形成基于钌钽的阻挡层的方法和所得产物。 可能形成不连续岛的RuTa / RuTaN双层中的RuTa层优选在氧等离子体中被有效氧化，从而桥接岛之间的间隙。 或者，通过在氧气存在下通过等离子体溅射RuTa靶，氧化钌钽氧化物反应性溅射到RuTaN上或直接沉积到下面的电介质上。

公开(公告)号：US20090215264A1

公开(公告)日：2009-08-27

申请号：US12037578

申请日：2008-02-26

申请人： Jick M. Yu ,  Wei D. Wang ,  Rongjun Wang ,  Hua Chung

发明人： Jick M. Yu ,  Wei D. Wang ,  Rongjun Wang ,  Hua Chung

IPC分类号： H01L21/44

CPC分类号： H01L21/76879 ,  C25D5/02 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76862 ,  H01L21/76873

摘要： Methods of controlling deposition of metal on field regions of a substrate in an electroplating process are provided. In one aspect, a dielectric layer is deposited under plasma on the field region of a patterned substrate, leaving a conductive surface exposed in the openings. Electroplating on the field region is reduced or eliminated, resulting in void-free features and minimal excess plating. In another aspect, a resistive layer, which may be a metal, is used in place of the dielectric. In a further aspect, the surface of the conductive field region is modified to change its chemical potential relative to the sidewalls and bottoms of the openings.

摘要翻译： 提供了在电镀工艺中控制金属在基片的场区上沉积的方法。 在一个方面，电介质层在等离子体上沉积在图案化衬底的场区上，留下在开口中暴露的导电表面。 场区域上的电镀被减少或消除，导致无空隙特征和最小的多余电镀。 在另一方面，可以使用可以是金属的电阻层来代替电介质。 在另一方面，导电场区域的表面被修改以相对于开口的侧壁和底部改变其化学势。

公开(公告)号：US08119525B2

公开(公告)日：2012-02-21

申请号：US12037578

申请日：2008-02-26

申请人： Jick M. Yu ,  Wei D. Wang ,  Rongjun Wang ,  Hua Chung

发明人： Jick M. Yu ,  Wei D. Wang ,  Rongjun Wang ,  Hua Chung

IPC分类号： H01L21/44

CPC分类号： H01L21/76879 ,  C25D5/02 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76862 ,  H01L21/76873

摘要： Methods of controlling deposition of metal on field regions of a substrate in an electroplating process are provided. In one aspect, a dielectric layer is deposited under plasma on the field region of a patterned substrate, leaving a conductive surface exposed in the openings. Electroplating on the field region is reduced or eliminated, resulting in void-free features and minimal excess plating. In another aspect, a resistive layer, which may be a metal, is used in place of the dielectric. In a further aspect, the surface of the conductive field region is modified to change its chemical potential relative to the sidewalls and bottoms of the openings.

摘要翻译： 提供了在电镀工艺中控制金属在基片的场区上沉积的方法。 在一个方面，电介质层在等离子体上沉积在图案化衬底的场区上，留下在开口中暴露的导电表面。 场区域上的电镀被减少或消除，导致无空隙特征和最小的多余电镀。 在另一方面，可以使用可以是金属的电阻层来代替电介质。 在另一方面，导电场区域的表面被修改以相对于开口的侧壁和底部改变其化学势。