MEMORY SYSTEM WITH DEPLETION GATE
    2.
    发明申请
    MEMORY SYSTEM WITH DEPLETION GATE 审中-公开
    带有隔离门的记忆系统

    公开(公告)号:US20080150005A1

    公开(公告)日:2008-06-26

    申请号:US11694089

    申请日:2007-03-30

    IPC分类号: H01L29/792

    摘要: A memory system includes a substrate, forming a first insulator layer over the substrate, forming a charge-storage layer over the first insulator layer, forming a second insulator layer over the charge-storage layer, and forming a depletion gate having a depletion phenomenon over the second insulator layer.

    摘要翻译: 存储器系统包括:衬底,在衬底上形成第一绝缘体层,在第一绝缘体层之上形成电荷存储层,在电荷存储层上形成第二绝缘体层,并形成具有耗尽现象的耗尽栅极 第二绝缘体层。

    Back-to-back NPN/PNP protection diodes
    4.
    发明授权
    Back-to-back NPN/PNP protection diodes 有权
    背对背NPN / PNP保护二极管

    公开(公告)号:US07285827B1

    公开(公告)日:2007-10-23

    申请号:US11194449

    申请日:2005-08-02

    IPC分类号: H01L23/62

    CPC分类号: H01L27/0266 H01L27/0255

    摘要: A device includes a memory device and an NPN or PNP diode coupled to a word-line of the memory device. The NPN or PNP diode reduces device damage and performance impairment that may result from device charging by drawing charges away from the memory device.

    摘要翻译: 一种设备包括存储器件和耦合到存储器件的字线的NPN或PNP二极管。 NPN或PNP二极管通过从存储器件中抽取电荷来减少设备充电所造成的器件损坏和性能损害。

    Methods for erasing and programming memory devices
    5.
    发明授权
    Methods for erasing and programming memory devices 有权
    擦除和编程存储器件的方法

    公开(公告)号:US07394702B2

    公开(公告)日:2008-07-01

    申请号:US11399130

    申请日:2006-04-05

    IPC分类号: G11C11/34

    摘要: A dual-bit memory device includes a first charge storage region spaced apart from a second charge storage region by an isolation region. Techniques for erasing a memory can be provided in which electrons can be injected into the charge storage regions to erase the charge storage regions. Other techniques for programming a memory can be provided in which holes can be injected into at least one of the charge storage regions to program the charge storage regions.

    摘要翻译: 双位存储器件包括通过隔离区域与第二电荷存储区域间隔开的第一电荷存储区域。 可以提供用于擦除存储器的技术,其中电子可以被注入到电荷存储区域中以擦除电荷存储区域。 可以提供用于编程存储器的其它技术,其中可以将空穴注入到至少一个电荷存储区域中以对电荷存储区域进行编程。

    Memory cell having enhanced high-K dielectric
    7.
    发明授权
    Memory cell having enhanced high-K dielectric 有权
    具有增强的高K电介质的存储单元

    公开(公告)号:US07365389B1

    公开(公告)日:2008-04-29

    申请号:US11008233

    申请日:2004-12-10

    IPC分类号: H01L29/792

    CPC分类号: H01L29/513 H01L29/792

    摘要: A semiconductor memory device may include an intergate dielectric layer of a high-K, high barrier height dielectric material interposed between a charge storage layer and a control gate. With this intergate high-K, high barrier height dielectric in place, the memory device may be efficiently erased using Fowler-Nordheim tunneling.

    摘要翻译: 半导体存储器件可以包括介于电荷存储层和控制栅之间的高K,高势垒高电介质材料的隔间电介质层。 利用这种隔间高K,高势垒高电介质就位,可以使用Fowler-Nordheim隧道有效地擦除存储器件。

    Methods for erasing memory devices and multi-level programming memory device
    8.
    发明申请
    Methods for erasing memory devices and multi-level programming memory device 审中-公开
    擦除存储器件和多级编程存储器件的方法

    公开(公告)号:US20070247924A1

    公开(公告)日:2007-10-25

    申请号:US11399158

    申请日:2006-04-06

    申请人: Wei Zheng Meng Ding

    发明人: Wei Zheng Meng Ding

    IPC分类号: G11C16/04 G11C11/34

    摘要: A memory includes a first charge storage region spaced apart from a second charge storage region by an isolation region. Techniques for erasing a memory are provided in which electrons are Fowler-Nordheim (FN) tunneled out of at least one of the charge storage regions into a substrate to erase the at least one charge storage region of the memory. Other techniques are provided for programming a single charge storage region at multiple different levels or states.

    摘要翻译: 存储器包括通过隔离区域与第二电荷存储区域间隔开的第一电荷存储区域。 提供了用于擦除存储器的技术,其中电子是Fowler-Nordheim(FN)从电荷存储区域中的至少一个隧道化到衬底中以擦除存储器的至少一个电荷存储区域。 提供了用于在多个不同级别或状态下编程单个电荷存储区域的其它技术。

    Methods for erasing and programming memory devices
    9.
    发明申请
    Methods for erasing and programming memory devices 有权
    擦除和编程存储器件的方法

    公开(公告)号:US20070247923A1

    公开(公告)日:2007-10-25

    申请号:US11399130

    申请日:2006-04-05

    IPC分类号: G11C16/04 G11C11/34

    摘要: A dual-bit memory device includes a first charge storage region spaced apart from a second charge storage region by an isolation region. Techniques for erasing a memory can be provided in which electrons can be injected into the charge storage regions to erase the charge storage regions. Other techniques for programming a memory can be provided in which holes can be injected into at least one of the charge storage regions to program the charge storage regions.

    摘要翻译: 双位存储器件包括通过隔离区域与第二电荷存储区域间隔开的第一电荷存储区域。 可以提供用于擦除存储器的技术,其中电子可以被注入到电荷存储区域中以擦除电荷存储区域。 可以提供用于编程存储器的其它技术,其中可以将空穴注入到至少一个电荷存储区域中以对电荷存储区域进行编程。

    Back-to-back NPN/PNP protection diodes
    10.
    发明授权
    Back-to-back NPN/PNP protection diodes 有权
    背对背NPN / PNP保护二极管

    公开(公告)号:US07573103B1

    公开(公告)日:2009-08-11

    申请号:US11855704

    申请日:2007-09-14

    IPC分类号: H01L27/06

    CPC分类号: H01L27/0266 H01L27/0255

    摘要: A device includes a memory device and an NPN or PNP diode coupled to a word-line of the memory device. The NPN diode includes a p-type substrate connected to ground, a well of n-type material formed in the p-type substrate in direct physical contact with the p-type substrate and electrically connected to the p-type substrate via a first metal line, a well of p-type material formed in the first well of n-type material, a first n-type region formed in the well of p-type material in direct physical contact with the well of p-type material and connected to the word line of the memory device, and a first p-type region formed in the well of n-type material in direct physical contact with the well of n-type material and electrically connected to the well of p-type material via a second metal line. The PNP diode includes a n-type substrate connected to ground, a well of p-type material formed in the n-type substrate in direct physical contact with the n-type substrate and electrically connected to the n-type substrate via a first metal line, a well of n-type material formed in the first well of p-type material, a first p-type region formed in the well of n-type material in direct physical contact with the well of n-type material and connected to the word line of the memory device, and a first n-type region formed in the well of p-type material in direct physical contact with the well of p-type material and electrically connected to the well of n-type material via a second metal line.

    摘要翻译: 一种设备包括存储器件和耦合到存储器件的字线的NPN或PNP二极管。 NPN二极管包括连接到地的p型衬底,在p型衬底中形成的与p型衬底直接物理接触的n型材料的阱,并通过第一金属电连接到p型衬底 线,在n型材料的第一阱中形成的p型材料的阱,形成在p型材料的阱中的第一n型区,与p型材料的阱直接物理接触并连接到 存储器件的字线和形成在n型材料的阱中的与n型材料的阱直接物理接触并且经由第二p型材料电连接到p型材料的阱的第一p型区域 金属线。 PNP二极管包括连接到地的n型衬底,形成在n型衬底中的p型材料的阱与n型衬底直接物理接触并且经由第一金属电连接到n型衬底 线,在p型材料的第一阱中形成的n型材料的阱,形成在n型材料的阱中的与n型材料的阱直接物理接触的第一p型区,并连接到 存储器件的字线和形成在p型材料的阱中的第一n型区域,其与p型材料的阱直接物理接触并且经由第二类型的n型材料电连接到n型材料的阱 金属线。