Copper metal precursor
    4.
    发明授权
    Copper metal precursor 失效
    铜金属前体

    公开(公告)号:US06764537B2

    公开(公告)日:2004-07-20

    申请号:US10453829

    申请日:2003-06-02

    IPC分类号: C23C1618

    CPC分类号: H01L21/28556 C23C16/18

    摘要: A method for chemical vapor deposition of copper metal thin film on a substrate includes heating a substrate onto which the copper metal thin film is to be deposited in a chemical vapor deposition chamber; vaporizing a precursor containing the copper metal, wherein the precursor is a compound of (&agr;-methylstyrene)Cu(I)(hfac), where hfac is hexafluoroacetylacetonate, and (hfac)Cu(I)L, where L is an alkene; introducing the vaporized precursor into the chemical vapor deposition chamber adjacent the heated substrate; and condensing the vaporized precursor onto the substrate thereby depositing copper metal onto the substrate. A copper metal precursor for use in the chemical vapor deposition of a copper metal thin film is a compound of (&agr;-methylstyrene)Cu(I)(hfac), where hfac is hexafluoroacetylacetonate, and (hfac)Cu(I)L, where L is an alkene taken from the group of alkenes consisting of 1-pentene, 1-hexene and trimethylvinylsilane.

    摘要翻译: 铜基金属薄膜在基板上进行化学气相沉积的方法包括在化学气相沉积室中加热要沉积铜金属薄膜的基板; 蒸发含有铜金属的前体,其中前体是(α-甲基苯乙烯)Cu(I)(hfac)的化合物,其中hfac是六氟乙酰丙酮化物,和(hfac)Cu(I)L,其中L是烯烃; 将蒸发的前体引入与加热的基底相邻的化学气相沉积室; 并将蒸发的前体冷凝到基底上,从而将铜金属沉积到基底上。 用于铜金属薄膜的化学气相沉积的铜金属前体是(α-甲基苯乙烯)Cu(I)(hfac)的化合物,其中hfac是六氟乙酰丙酮化物,和(hfac)Cu(I)L,其中 L是从由1-戊烯,1-己烯和三甲基乙烯基硅烷组成的烯烃族中获得的烯烃。

    System and method for forming a bipolar switching PCMO film
    6.
    发明授权
    System and method for forming a bipolar switching PCMO film 有权
    用于形成双极开关PCMO膜的系统和方法

    公开(公告)号:US07235407B2

    公开(公告)日:2007-06-26

    申请号:US10855942

    申请日:2004-05-27

    IPC分类号: H01L21/00

    摘要: A multi-layer PrxCa1-xMnO3 (PCMO) thin film capacitor and associated deposition method are provided for forming a bipolar switching thin film. The method comprises: forming a bottom electrode; depositing a nanocrystalline PCMO layer; depositing a polycrystalline PCMO layer; forming a multi-layer PCMO film with bipolar switching properties; and, forming top electrode overlying the PCMO film. If the polycrystalline layers are deposited overlying the nanocrystalline layers, a high resistance can be written with narrow pulse width, negative voltage pulses. The PCMO film can be reset to a low resistance using a narrow pulse width, positive amplitude pulse. Likewise, if the nanocrystalline layers are deposited overlying the polycrystalline layers, a high resistance can be written with narrow pulse width, positive voltage pulses, and reset to a low resistance using a narrow pulse width, negative amplitude pulse.

    摘要翻译: 提供了多层Pr 1 x 1 x x MnO 3(PCMO)薄膜电容器和相关的沉积方法,用于形成双极开关 薄膜。 该方法包括:形成底部电极; 沉积纳米晶体PCMO层; 沉积多晶的PCMO层; 形成具有双极开关特性的多层PCMO膜; 并且形成覆盖PCMO膜的顶部电极。 如果多晶层沉积在纳米晶层之上,则可以用窄脉冲宽度,负电压脉冲写入高电阻。 PCMO膜可以使用窄脉冲宽度,正幅度脉冲复位为低电阻。 同样,如果纳米晶层沉积在多晶层上,则可以用窄脉冲宽度,正电压脉冲写入高电阻,并使用窄脉冲宽度,负幅度脉冲将其复位为低电阻。

    Memory cell with an asymmetric crystalline structure
    7.
    发明授权
    Memory cell with an asymmetric crystalline structure 有权
    具有不对称晶体结构的记忆单元

    公开(公告)号:US07214583B2

    公开(公告)日:2007-05-08

    申请号:US11130983

    申请日:2005-05-16

    IPC分类号: H01L21/8242

    摘要: Asymmetrically structured memory cells and a fabrication method are provided. The method comprises: forming a bottom electrode; forming an electrical pulse various resistance (EPVR) first layer having a polycrystalline structure over the bottom electrode; forming an EPVR second layer adjacent the first layer, with a nano-crystalline or amorphous structure; and, forming a top electrode overlying the first and second EPVR layers. EPVR materials include CMR, high temperature super conductor (HTSC), or perovskite metal oxide materials. In one aspect, the EPVR first layer is deposited with a metalorganic spin coat (MOD) process at a temperature in the range between 550 and 700 degrees C. The EPVR second layer is formed at a temperature less than, or equal to the deposition temperature of the first layer. After a step of removing solvents, the MOD deposited EPVR second layer is formed at a temperature less than, or equal to the 550 degrees C.

    摘要翻译: 提供了非对称结构的存储单元和制造方法。 该方法包括:形成底部电极; 在底部电极上形成具有多晶结构的电脉冲各种电阻(EPVR)第一层; 用纳米结晶或无定形结构形成邻近第一层的EPVR第二层; 并且形成覆盖在第一和第二EPVR层上的顶部电极。 EPVR材料包括CMR,高温超导体(HTSC)或钙钛矿金属氧化物材料。 在一个方面,EPVR第一层在550-700℃的温度范围内用金属有机旋涂(MOD)工艺沉积.EPVR第二层是在小于或等于沉积温度 的第一层。 在除去溶剂的步骤之后,将MOD沉积的EPVR第二层在小于或等于550℃的温度下形成。

    Buffered-layer memory cell
    8.
    发明授权
    Buffered-layer memory cell 失效
    缓冲层存储单元

    公开(公告)号:US07029924B2

    公开(公告)日:2006-04-18

    申请号:US10755654

    申请日:2004-01-12

    IPC分类号: H01L21/00

    摘要: A method is provided for forming a buffered-layer memory cell. The method comprises: forming a bottom electrode; forming a colossal magnetoresistance (CMR) memory film overlying the bottom electrode; forming a memory-stable semiconductor buffer layer, typically a metal oxide, overlying the memory film; and, forming a top electrode overlying the semiconductor buffer layer. In some aspects of the method the semiconductor buffer layer is formed from YBa2Cu3O7-X (YBCO), indium oxide (In2O3), or ruthenium oxide (RuO2), having a thickness in the range of 10 to 200 nanometers (nm). The top and bottom electrodes may be TiN/Ti, Pt/TiN/Ti, In/TiN/Ti, PtRhOx compounds, or PtIrOx compounds. The CMR memory film may be a Pr1-XCaXMnO3 (PCMO) memory film, where x is in the region between 0.1 and 0.6, with a thickness in the range of 10 to 200 nm.

    摘要翻译: 提供了一种用于形成缓冲层存储单元的方法。 该方法包括:形成底部电极; 形成覆盖底部电极的巨大磁阻(CMR)记忆膜; 形成存储器稳定的半导体缓冲层,通常为覆盖存储膜的金属氧化物; 并且形成覆盖半导体缓冲层的顶部电极。 在该方法的一些方面,半导体缓冲层由YBa 2 N 3 O 7-X(YBCO),氧化铟(In 2或2 O 3)或氧化钌(RuO 2 N 2),其厚度在10-200纳米(nm)的范围内。 顶部和底部电极可以是TiN / Ti,Pt / TiN / Ti,In / TiN / Ti,PtRhOx化合物或PtIrOx化合物。 CMR存储器膜可以是Pr 1-X C x MnO 3(PCMO)存储膜,其中x在0.1之间的区域 和0.6,厚度在10至200nm的范围内。

    Method for forming an asymmetric crystalline structure memory cell
    9.
    发明授权
    Method for forming an asymmetric crystalline structure memory cell 有权
    形成不对称晶体结构记忆体的方法

    公开(公告)号:US06927120B2

    公开(公告)日:2005-08-09

    申请号:US10442749

    申请日:2003-05-21

    摘要: Asymmetrically structured memory cells and a fabrication method are provided. The method comprises: forming a bottom electrode; forming an electrical pulse various resistance (EPVR) first layer having a polycrystalline structure over the bottom electrode; forming an EPVR second layer adjacent the first layer, with a nano-crystalline or amorphous structure; and, forming a top electrode overlying the first and second EPVR layers. EPVR materials include CMR, high temperature super conductor (HTSC), or perovskite metal oxide materials. In one aspect, the EPVR first layer is deposited with a metalorganic spin coat (MOD) process at a temperature in the range between 550 and 700 degrees C. The EPVR second layer is formed at a temperature less than, or equal to the deposition temperature of the first layer. After a step of removing solvents, the MOD deposited EPVR second layer is formed at a temperature less than, or equal to the 550 degrees C.

    摘要翻译: 提供了非对称结构的存储单元和制造方法。 该方法包括:形成底部电极; 在底部电极上形成具有多晶结构的电脉冲各种电阻(EPVR)第一层; 用纳米结晶或无定形结构形成邻近第一层的EPVR第二层; 并且形成覆盖在第一和第二EPVR层上的顶部电极。 EPVR材料包括CMR,高温超导体(HTSC)或钙钛矿金属氧化物材料。 在一个方面,EPVR第一层在550-700℃的温度范围内用金属有机旋涂(MOD)工艺沉积.EPVR第二层是在小于或等于沉积温度 的第一层。 在除去溶剂的步骤之后,将MOD沉积的EPVR第二层在小于或等于550℃的温度下形成。

    Method of achieving high adhesion of CVD copper thin films on TaN Substrates
    10.
    发明授权
    Method of achieving high adhesion of CVD copper thin films on TaN Substrates 失效
    在TaN基板上实现CVD铜薄膜的高附着力的方法

    公开(公告)号:US06579793B2

    公开(公告)日:2003-06-17

    申请号:US09820224

    申请日:2001-03-27

    IPC分类号: C23C1618

    摘要: A fabrication process provides for achieving high adhesion of CVD copper thin films on metal nitride substrates, and in particular, on substrates having an outermost TaN layer. The method comprises introducing a certain amount of water vapor to the initial copper thin film deposition stage and reducing the amount of fluorine in the interface of the copper and metal nitride substrate. These two process steps result in a copper thin film having improved adhesion to metal nitride substrates, including TaN substrates.

    摘要翻译: 制造工艺提供了在金属氮化物衬底上,特别是在具有最外层TaN层的衬底上实现CVD铜薄膜的高附着性。 该方法包括将一定量的水蒸汽引入初始铜薄膜沉积阶段并减少铜和金属氮化物衬底的界面中的氟的量。 这两个工艺步骤导致具有改善的与金属氮化物衬底(包括TaN衬底)的粘附性的铜薄膜。