公开(公告)号：US09076802B1

公开(公告)日：2015-07-07

申请号：US14037320

申请日：2013-09-25

申请人： WonJun Ko ,  GwangTae Kim ,  KeoChang Lee

发明人： WonJun Ko ,  GwangTae Kim ,  KeoChang Lee

IPC分类号： H01L23/28 ,  H01L21/00 ,  H01L21/56

CPC分类号： H01L21/56 ,  H01L21/565 ,  H01L23/3121 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00

摘要： Simultaneous semiconductor packages can be produced using a dual-sided film-assist molding process. The process involves using a film or membrane having opposing surfaces for receiving un-encapsulated semiconductor packages on both surfaces. A slot can be formed in the film or membrane to facilitate introduction and passage of the encapsulation therethrough such that upon removal of the film or membrane, increased throughput and productivity of the completed semiconductor packages can be carried out to achieve considerable cost savings.

摘要翻译： 可以使用双面胶片辅助成型工艺制造同时半导体封装。 该方法涉及使用具有相对表面的膜或膜来在两个表面上接收未封装的半导体封装。 可以在膜或膜中形成狭槽以便于通过其中的封装的引入和通过，使得在去除膜或膜时，可以进行完成的半导体封装的增加的生产率和生产率以实现显着的成本节约。

公开(公告)号：US09693455B1

公开(公告)日：2017-06-27

申请号：US14227346

申请日：2014-03-27

申请人： Seong Won Park ,  Hun Teak Lee ,  WoonJae Beak ,  MinJung Kim ,  ChangHwan Kim ,  ByungHyun Kwak ,  GwangTae Kim ,  HeeSoo Lee

发明人： Seong Won Park ,  Hun Teak Lee ,  WoonJae Beak ,  MinJung Kim ,  ChangHwan Kim ,  ByungHyun Kwak ,  GwangTae Kim ,  HeeSoo Lee

IPC分类号： H05K1/11 ,  H05K3/36 ,  H05K3/40 ,  H05K1/09 ,  H05K1/18 ,  H05K1/14 ,  H05K3/32 ,  H05K3/46

CPC分类号： H05K1/112 ,  H01L2224/16225 ,  H01L2224/73204 ,  H05K1/09 ,  H05K1/113 ,  H05K1/14 ,  H05K1/18 ,  H05K1/186 ,  H05K3/32 ,  H05K3/36 ,  H05K3/4007 ,  H05K3/4038 ,  H05K3/46 ,  H05K3/4614 ,  H05K3/4623 ,  H05K2201/04 ,  H05K2203/061 ,  H05K2203/0733

摘要： A system and method of manufacture of an integrated circuit packaging system includes: a copper film; a first metal layer directly on the copper film; an insulation layer directly on and over the first metal layer, the insulation layer having a via hole through the insulation layer; a conductive via within the via hole and directly on the first metal layer; a second metal layer directly on the conductive via and the insulation layer; a copper post directly on the copper film; a solder pad over the copper post; and an interposer coupled to the copper post and the solder pad.