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41 条记录 (耗时 0.028 秒)

    High-speed low-distortion analog-to digital converter
    1.
    发明授权
    High-speed low-distortion analog-to digital converter 有权

    公开(公告)号：US06831584B2

    公开(公告)日：2004-12-14

    申请号：US10645924

    申请日：2003-08-22

    申请人： Xicheng Jiang ,  Zhengyu Wang ,  Frank Chang

    发明人： Xicheng Jiang ,  Zhengyu Wang ,  Frank Chang

    IPC分类号： H03M112

    CPC分类号： H03M1/0646 ,  H03M1/361

    摘要： An analog to digital converter includes an array of differential input amplifiers. Each amplifier inputs an input voltage and a corresponding voltage reference, and outputs a differential signal representing a comparison of the input voltage and the corresponding voltage reference. A plurality of latches stores the differential signal from each of the differential input amplifiers. A decoder converts the stored differential signals to N-bit digital output. A first interface amplifier is connected to a first edge amplifier of the array through a first cross point. A second interface amplifier is connected to a second edge amplifier of the array through a second cross point. The first interface amplifier and the second interface amplifier are connected to each other through a third cross point.

    Method and system for detecting and identifying electronic accessories or peripherals
    3.
    发明授权
    Method and system for detecting and identifying electronic accessories or peripherals 有权
    用于检测和识别电子配件或外围设备的方法和系统

    公开(公告)号：US08452428B2

    公开(公告)日：2013-05-28

    申请号：US12268305

    申请日：2008-11-10

    申请人： Hongwei Kong ,  Nelson Sollenberger ,  Todd L. Brooks ,  Yee Ling Cheung ,  Xicheng Jiang

    发明人： Hongwei Kong ,  Nelson Sollenberger ,  Todd L. Brooks ,  Yee Ling Cheung ,  Xicheng Jiang

    IPC分类号： G06F17/00 ,  G06F13/24 ,  G06F13/32 ,  G01R27/08 ,  H04M1/00

    CPC分类号： G06F13/4072

    摘要： Aspects of a method and system for detecting and identifying electronic accessories or peripherals utilizing a hardware audio CODEC are provided. In this regard, a hardware audio CODEC may be operable to compare one or more voltages on one or more biased pins of an accessory or peripheral port to one or more reference voltages and generate one or more digital representations of the one or more voltages on the biased one or more pins. An accessory or peripheral attached to the accessory or peripheral port may be identified based on the comparison and/or the generated one or more digital representations. The one or more bias voltages may be controlled based on a result of the comparison and/or the generated digital representations. The one or more bias voltages may be reduced after an attached accessory or peripheral has been identified.

    摘要翻译： 提供了利用硬件音频CODEC来检测和识别电子附件或外围设备的方法和系统的方面。 在这方面，硬件音频编解码器可以用于将附件或外围端口的一个或多个偏置引脚上的一个或多个电压与一个或多个参考电压进行比较，并且生成一个或多个电压的一个或多个数字表示 偏置一个或多个引脚。 可以基于比较和/或所生成的一个或多个数字表示来识别附接到附件或外围端口的附件或外围设备。 可以基于比较的结果和/或所生成的数字表示来控制一个或多个偏置电压。 在附加附件或外围设备被识别之后，可以减小一个或多个偏置电压。

    High efficiency amplifier with reduced electromagnetic interference
    5.
    发明申请
    High efficiency amplifier with reduced electromagnetic interference 失效
    具有降低电磁干扰的高效放大器

    公开(公告)号：US20120008240A1

    公开(公告)日：2012-01-12

    申请号：US12803869

    申请日：2010-07-07

    申请人： Xicheng Jiang ,  Jianlong Chen

    发明人： Xicheng Jiang ,  Jianlong Chen

    IPC分类号： H02H9/00

    CPC分类号： H03F3/2173 ,  H03F2200/114 ,  H03F2200/498 ,  H03K17/163

    摘要： Disclosed is a high efficiency amplifier operable to substantially reduce electromagnetic interference (EMI). The high efficiency amplifier comprises an output stage to provide a high powered signal to a load. The high efficiency amplifier further comprises an overlap protection circuit to produce a timing non-overlap in a control signal for the output stage, and an edge control circuit to reduce a transient portion of the high powered signal to substantially reduce the EMI. The overlap protection circuit and the edge control circuit may be implemented with resistive source degeneration. Also disclosed is a related method. In one embodiment, the high efficiency amplifier and the related method may be incorporated into a cellular telephone or a mobile audio device.

    摘要翻译： 公开了一种高效率放大器，可操作以显着降低电磁干扰（EMI）。 高效率放大器包括用于向负载提供高功率信号的输出级。 高效率放大器还包括重叠保护电路，用于在用于输出级的控制信号中产生定时不重叠，以及边缘控制电路，以减少高功率信号的瞬态部分，以显着降低EMI。 重叠保护电路和边缘控制电路可以用电阻源退化来实现。 还公开了相关方法。 在一个实施例中，高效率放大器和相关方法可以被并入到蜂窝电话或移动音频设备中。

    Electrostatic (ESD) protection circuit for an integrated circuit
    6.
    发明申请
    Electrostatic (ESD) protection circuit for an integrated circuit 审中-公开
    用于集成电路的静电（ESD）保护电路

    公开(公告)号：US20070236847A1

    公开(公告)日：2007-10-11

    申请号：US11808226

    申请日：2007-06-07

    申请人： Xicheng Jiang ,  Ardie Venes

    发明人： Xicheng Jiang ,  Ardie Venes

    IPC分类号： H02H3/20

    CPC分类号： H03K19/00315 ,  H01L27/0266 ,  H03K19/018528

    摘要： An output stage protection system for protecting NMOS devices in an integrated circuit (IC) output stage during normal operations and power up/power down. In an embodiment, the output stage includes a pair of relatively low voltage NMOS devices coupled to a current source and IC core outputs. A first pair of relatively high voltage NMOS devices is coupled to the relatively low voltage pair and a biasing circuit. A second pair of relatively high voltage NMOS devices is coupled to a resistor, the first pair, and first and second output nodes, respectively. One or more diodes are coupled in series between the first and second output nodes and the resistor. In an embodiment, the output stage protection system protects NMOS devices in the output stage from electrostatic discharge (ESD). Input/output (I/O) pad ESD protection circuits are coupled to the I/O pads and include a clamp coupled to a local net.

    摘要翻译： 一种用于在正常操作和上电/掉电期间保护集成电路（IC）输出级中的NMOS器件的输出级保护系统。 在一个实施例中，输出级包括耦合到电流源和IC芯输出的一对相对低电压的NMOS器件。 第一对相对高电压的NMOS器件耦合到相对低电压对和偏置电路。 第二对相对高电压的NMOS器件分别耦合到电阻器，第一对以及第一和第二输出节点。 一个或多个二极管串联耦合在第一和第二输出节点和电阻器之间。 在一个实施例中，输出级保护系统保护输出级中的NMOS器件不受静电放电（ESD）的影响。 输入/输出（I / O）焊盘ESD保护电路耦合到I / O焊盘，并包括耦合到本地网的钳位。

    Ground-referenced common-mode amplifier circuit and related method
    9.
    发明授权
    Ground-referenced common-mode amplifier circuit and related method 有权
    接地参考共模放大器电路及相关方法

    公开(公告)号：US08466743B2

    公开(公告)日：2013-06-18

    申请号：US12799598

    申请日：2010-04-27

    申请人： Xicheng Jiang ,  Jungwoo Song

    发明人： Xicheng Jiang ,  Jungwoo Song

    IPC分类号： H03F3/217

    CPC分类号： H03F3/217

    摘要： Disclosed is an amplifier circuit configured to amplify a pulse stream. The amplifier circuit comprises a switching block including a first switch operable to couple an output node of the switching block to a positive reference voltage, a second switch operable to couple the output node to a ground reference voltage and a third switch operable to couple the output node to a negative reference voltage. The amplifier circuit is configured to amplify the pulse stream into an amplified signal detectable at the output node such that the amplified signal has a common-mode voltage level substantially equal to zero volts. In one embodiment, the amplifier circuit is configured to amplify the pulse stream in accordance with a Class-D amplification scheme. In one embodiment, the output node can be directly connected to a load device without a DC blocking capacitor being interposed between the output node and the load device.

    摘要翻译： 公开了一种被配置为放大脉冲流的放大器电路。 放大器电路包括切换块，其包括可操作以将切换块的输出节点耦合到正参考电压的第一开关，可操作以将输出节点耦合到接地参考电压的第二开关和可操作以将输出 节点到负参考电压。 放大器电路被配置为将脉冲流放大到在输出节点处可检测的放大信号，使得放大的信号具有基本上等于零伏特的共模电压电平。 在一个实施例中，放大器电路被配置为根据D类放大方案来放大脉冲流。 在一个实施例中，输出节点可以直接连接到负载装置，而不会在输出节点和负载装置之间插入直流阻塞电容器。

    Integrated and programmable microphone bias generation
    10.
    发明授权
    Integrated and programmable microphone bias generation 有权
    集成和可编程麦克风偏置产生

    公开(公告)号：US08288971B2

    公开(公告)日：2012-10-16

    申请号：US12008570

    申请日：2008-01-11

    申请人： Xicheng Jiang

    发明人： Xicheng Jiang

    IPC分类号： H04R3/00

    CPC分类号： H04R3/00 ,  H04R2410/00

    摘要： A disclosed embodiment is a programmable integrated circuit such as an audio processor or a base band processor for generating a low noise and programmable microphone bias voltage or current. The programmable integrated circuit generates a programmable reference input, where the reference input is programmably generated from at least one power source, such as a on-chip audio power supply, an on-chip power supply, or an off-chip power supply, for use by a regulator. The regulator in the programmable integrated circuit receives a bias input and the programmable reference input and generates a programmable output for biasing a microphone. The bias input for the regulator can be provided by an off-chip power supply or an on-chip power supply. The reference input provided to the regulator can be appropriately filtered to reduce noise. In one embodiment, the programmable reference input and the programmable output are programmed by first and second potentiometers, respectively.

    摘要翻译： 所公开的实施例是诸如音频处理器或基带处理器的可编程集成电路，用于产生低噪声和可编程麦克风偏置电压或电流。 可编程集成电路产生可编程参考输入，其中参考输入可由至少一个电源（例如片上音频电源，片上电源或芯片外电源）至少可编程地产生，用于 由监管机构使用。 可编程集成电路中的调节器接收偏置输入和可编程参考输入，并产生用于偏置麦克风的可编程输出。 调节器的偏置输入可以由片外电源或片上电源提供。 提供给调节器的参考输入可以被适当地过滤以减少噪声。 在一个实施例中，可编程参考输入和可编程输出分别由第一和第二电位器编程。