公开(公告)号：US10031760B1

公开(公告)日：2018-07-24

申请号：US15160993

申请日：2016-05-20

Applicant: Xilinx, Inc.

Inventor： Sonal Santan ,  Raymond Kong ,  Yenpang Lin ,  Jun Liu ,  Ashish Gupta ,  Spenser Gilliland ,  Brian S. Martin

IPC: G06F15/177 ,  G06F9/4401

Abstract: Managing an accelerator may include responsive to determining a first container including a first configuration file and a second configuration file, caching, using a host processor, the second configuration file within a local memory of the host processor. The first configuration file may be provided, using the host processor, to a device of the accelerator. Responsive to a configuration event, the host processor may provide the cached second configuration file from the local memory to the device of the accelerator.

公开(公告)号：US10216217B1

公开(公告)日：2019-02-26

申请号：US15382390

申请日：2016-12-16

Applicant: Xilinx, Inc.

Inventor： Sonal Santan ,  Sudipto Chakraborty ,  Fei Rui ,  Stephen P. Rozum ,  Yenpang Lin ,  Yau-Tsun S. Li ,  Sumit Roy

IPC: G06F1/00 ,  G06F1/08

Abstract: Hardware acceleration for a kernel can include selecting, using a processor, a kernel, determining, using the processor, a clock frequency for the selected kernel, and programming, using the processor, a clock circuit to generate a clock signal having a clock frequency compatible with the clock frequency of the selected kernel. Using the processor, the selected kernel can be implemented as a kernel circuit within a region of programmable circuitry. The kernel circuit can be clocked using the clock signal from the clock circuit having the compatible clock frequency.

公开(公告)号：US12204940B2

公开(公告)日：2025-01-21

申请号：US17648172

申请日：2022-01-17

Applicant: Xilinx, Inc.

Inventor： Sonal Santan ,  Yu Liu ,  Yenpang Lin ,  Stephen P. Rozum

IPC: G06F9/50 ,  G06F9/30 ,  G06F9/54 ,  G06F12/02

Abstract: Remote kernel execution in a heterogeneous computing system can include executing, using a device processor of a device communicatively linked to a host processor, a device runtime and receiving from the host processor within a hardware submission queue of the device, a command. The command requests execution of a software kernel and specifies a descriptor stored in a region of a memory of the device shared with the host processor. In response to receiving the command, the device runtime, as executed by the device processor, invokes a runner program associated with the software kernel. The runner program can map a physical address of the descriptor to a virtual memory address corresponding to the descriptor that is usable by the software kernel. The runner program can execute the software kernel. The software kernel can access data specified by the descriptor using the virtual memory address as provided by the runner program.

公开(公告)号：US20230259627A1

公开(公告)日：2023-08-17

申请号：US17651030

申请日：2022-02-14

Applicant: Xilinx, Inc.

Inventor： Sonal Santan ,  Yu Liu ,  Yenpang Lin ,  Lizhi Hou ,  Cheng Zhen ,  Yidong Zhang

IPC: G06F21/57 ,  G06F21/64 ,  G06F21/71 ,  G06F13/16

CPC classification number: G06F21/572 ,  G06F21/64 ,  G06F21/71 ,  G06F13/1642 ,  G06F13/1663

Abstract: An integrated circuit can include a communication endpoint configured to maintain a communication link with a host computer, a queue configured to receive a plurality of host commands from the host computer via the communication link, and a processor configured to execute a device runtime. The processor, responsive to executing the device runtime, is configured to perform validation of the host commands read from the queue and selectively execute the host commands based on a result of the validation on a per host command basis. The host commands are executable by the processor to manage functions of the integrated circuit. The queue is implemented in a region of memory that is shared by the integrated circuit and the host computer.

公开(公告)号：US20230229497A1

公开(公告)日：2023-07-20

申请号：US17648172

申请日：2022-01-17

Applicant: Xilinx, Inc.

Inventor： Sonal Santan ,  Yu Liu ,  Yenpang Lin ,  Stephen P. Rozum

IPC: G06F9/50 ,  G06F9/54 ,  G06F9/30 ,  G06F12/02

CPC classification number: G06F9/5016 ,  G06F9/544 ,  G06F9/30043 ,  G06F12/0238 ,  G06F2212/7201

Abstract: Remote kernel execution in a heterogeneous computing system can include executing, using a device processor of a device communicatively linked to a host processor, a device runtime and receiving from the host processor within a hardware submission queue of the device, a command. The command requests execution of a software kernel and specifies a descriptor stored in a region of a memory of the device shared with the host processor. In response to receiving the command, the device runtime, as executed by the device processor, invokes a runner program associated with the software kernel. The runner program can map a physical address of the descriptor to a virtual memory address corresponding to the descriptor that is usable by the software kernel. The runner program can execute the software kernel. The software kernel can access data specified by the descriptor using the virtual memory address as provided by the runner program.

公开(公告)号：US11861010B2

公开(公告)日：2024-01-02

申请号：US17651030

申请日：2022-02-14

Applicant: Xilinx, Inc.

Inventor： Sonal Santan ,  Yu Liu ,  Yenpang Lin ,  Lizhi Hou ,  Cheng Zhen ,  Yidong Zhang

IPC: G06F21/64 ,  G06F21/71 ,  G06F21/57 ,  G06F13/16

CPC classification number: G06F21/572 ,  G06F13/1642 ,  G06F13/1663 ,  G06F21/64 ,  G06F21/71

Abstract: An integrated circuit can include a communication endpoint configured to maintain a communication link with a host computer, a queue configured to receive a plurality of host commands from the host computer via the communication link, and a processor configured to execute a device runtime. The processor, responsive to executing the device runtime, is configured to perform validation of the host commands read from the queue and selectively execute the host commands based on a result of the validation on a per host command basis. The host commands are executable by the processor to manage functions of the integrated circuit. The queue is implemented in a region of memory that is shared by the integrated circuit and the host computer.

公开(公告)号：US10922068B1

公开(公告)日：2021-02-16

申请号：US16186204

申请日：2018-11-09

Applicant: Xilinx, Inc.

Inventor： Ryan F. Radjabi ,  Hem C. Neema ,  Sonal Santan ,  Yenpang Lin

IPC: G06F9/44 ,  G06F8/65 ,  G06F13/42

Abstract: Updating firmware in an programmable integrated circuit (IC) includes determining, using a processor of a computer, a base address register (BAR) of an accelerator card from a device data file, wherein the accelerator card includes a programmable IC and is connected to the computer via a communication bus, mapping, using the processor, a feature PROM and a flash programmer circuit of the programmable IC to local memory of the computer using the BAR, and reading, over the communication bus, the feature PROM on the programmable IC to determine a programming mode for programming an external flash memory coupled to the flash programmer circuit. Based on the programming mode and using the processor, firmware is provided to the flash programmer circuit on the programmable IC via the communication bus. The flash programmer circuit is configured to program the firmware into the external flash memory.