High Speed Bi-Directional Transceiver, Circuits and Devices Therefor, and Method(s) of Using the Same
    1.
    发明申请
    High Speed Bi-Directional Transceiver, Circuits and Devices Therefor, and Method(s) of Using the Same 审中-公开
    高速双向收发器,其电路及其设备及其使用方法

    公开(公告)号:US20120045202A1

    公开(公告)日:2012-02-23

    申请号:US13105550

    申请日:2011-05-11

    IPC分类号: H04B10/08 H04B10/02

    CPC分类号: H04B10/40

    摘要: The present disclosure relates to a high-speed and/or power-saving bi-directional transceiver. The transceiver generally includes a (burst) laser driver; an output power monitoring and indicating circuit; control logic (e.g., a microcontroller unit); bi-directional optics; a photodiode bias control circuit; a limiting amplifier; and a receiver optical power monitoring circuit. Optionally, the present transceiver includes a small form factor pluggable (SFP+) connector housing. In addition, the power-saving bi-directional transceiver generally includes a transmitter (TX) energy-saving circuit, a TX burst holding circuit, a receiver (RX) energy-saving circuit, a RX continuous holding circuit and the control logic.

    摘要翻译: 本公开涉及高速和/或省电的双向收发器。 收发器通常包括(突发)激光驱动器; 输出功率监控和指示电路; 控制逻辑(例如,微控制器单元); 双向光学; 光电二极管偏置控制电路; 限幅放大器; 和接收机光功率监控电路。 可选地,本收发器包括小型可插拔(SFP +)连接器壳体。 此外,省电双向收发机通常包括发射机(TX)节能电路,TX脉冲串保持电路,接收机(RX)节能电路,RX连续保持电路和控制逻辑。

    Optical transceiver integrated with optical time domain reflectometer monitoring
    2.
    发明授权
    Optical transceiver integrated with optical time domain reflectometer monitoring 有权
    光收发器集成了光时域反射仪监控

    公开(公告)号:US08942556B2

    公开(公告)日:2015-01-27

    申请号:US13309983

    申请日:2011-12-02

    摘要: An optical transceiver having an integrated optical time domain reflectometer monitoring unit and methods for using the same are disclosed. The disclosure relates to an optical transceiver comprising an optical device comprising a wavelength division multiplexing system (WDM), a data signal driver, a data signal limiting amplifier, and an optical time domain reflectometer (OTDR) data processing module. Furthermore, the optical transceiver is particularly advantageous in an optical line terminal (OLT) and/or a passive optical network (PON). The integrated OTDR data processing module can protect the optical transceiver, ensure successful monitoring data, simplify network wiring and decrease system and network costs by decreasing the number of OTDR modules and WDM units.

    摘要翻译: 公开了一种具有集成光时域反射计监视单元的光收发器及其使用方法。 本公开涉及一种光收发器,包括包括波分复用系统(WDM),数据信号驱动器,数据信号限幅放大器和光时域反射计(OTDR)数据处理模块的光学装置。 此外,光收发器在光线路终端(OLT)和/或无源光网络(PON)中是特别有利的。 集成的OTDR数据处理模块可以通过减少OTDR模块和WDM单元的数量来保护光收发器,确保成功监控数据,简化网络布线,降低系统和网络成本。

    Optical Transceiver Integrated with Optical Time Domain Reflectometer Monitoring
    3.
    发明申请
    Optical Transceiver Integrated with Optical Time Domain Reflectometer Monitoring 有权
    集成光时域反射计监控的光收发器

    公开(公告)号:US20120243863A1

    公开(公告)日:2012-09-27

    申请号:US13309983

    申请日:2011-12-02

    IPC分类号: H04B10/08

    摘要: An optical transceiver having an integrated optical time domain reflectometer monitoring unit and methods for using the same are disclosed. The disclosure relates to an optical transceiver comprising an optical device comprising a wavelength division multiplexing system (WDM), a data signal driver, a data signal limiting amplifier, and an optical time domain reflectometer (OTDR) data processing module. Furthermore, the optical transceiver is particularly advantageous in an optical line terminal (OLT) and/or a passive optical network (PON). The integrated OTDR data processing module can protect the optical transceiver, ensure successful monitoring data, simplify network wiring and decrease system and network costs by decreasing the number of OTDR modules and WDM units.

    摘要翻译: 公开了一种具有集成光时域反射计监视单元的光收发器及其使用方法。 本公开涉及一种光收发器,包括包括波分复用系统(WDM),数据信号驱动器,数据信号限幅放大器和光时域反射计(OTDR)数据处理模块的光学装置。 此外,光收发器在光线路终端(OLT)和/或无源光网络(PON)中是特别有利的。 集成的OTDR数据处理模块可以通过减少OTDR模块和WDM单元的数量来保护光收发器,确保成功监控数据,简化网络布线,降低系统和网络成本。

    Cellular power supply network, intelligent gateway and power supply control method thereof

    公开(公告)号:US09720433B2

    公开(公告)日:2017-08-01

    申请号:US13995884

    申请日:2011-10-25

    申请人: Yong Lu

    发明人: Yong Lu

    摘要: The embodiments of the present invention provide a cellular power supply network, an intelligent gateway and a power supply control method thereof. The cellular power supply network further comprises: at least one cellular power supply layer formed by a plurality of transformers connected as a cellular structure. In the embodiments of the present invention, the electricity energy can be transferred from one transformer to another transformer demanding power as needed, so that the power is more reasonably distributed and the energy utilization rate is improved. In the technical solutions of the present invention, when a certain transformer cannot work normally due to a fault, the electricity energy outside the transformer can be introduced into the user of the transformer using the cellular power supply network, so as to keep continuous power usage. Meanwhile, the transformer can be separated from the power supply network for repairing and maintenance.

    FILLED ELASTOMER COMPRISING POLYURETHANE
    6.
    发明申请
    FILLED ELASTOMER COMPRISING POLYURETHANE 审中-公开
    填充弹性体包含聚氨酯

    公开(公告)号:US20140142251A1

    公开(公告)日:2014-05-22

    申请号:US14131152

    申请日:2012-07-04

    IPC分类号: C08L9/06

    摘要: The present invention relates to a method for producing a filled elastomer wherein a rubber composition is produced by mixing I) raw rubber, II) cross linking agent, III) filler, IV) isocyanate terminated polymer composition and optionally V) further additives and cross linking of the rubber composition. The present invention further relates to a filled elastomer obtainable according to said method and the use of filled elastomers according to the invention as shoe sole.

    摘要翻译: 本发明涉及一种填充弹性体的制造方法,其中通过混合I)生橡胶,II)交联剂,III)填料,IV)异氰酸酯封端的聚合物组合物和任选的V)进一步添加和交联来制备橡胶组合物 的橡胶组合物。 本发明还涉及根据所述方法可获得的填充弹性体和根据本发明的填充弹性体作为鞋底的用途。

    One-Time Programmable Memory Cell
    7.
    发明申请
    One-Time Programmable Memory Cell 有权
    一次性可编程存储单元

    公开(公告)号:US20140071731A1

    公开(公告)日:2014-03-13

    申请号:US13608595

    申请日:2012-09-10

    IPC分类号: G11C17/12 H01L27/088

    摘要: A programmable memory cell including a thick oxide spacer transistor, a programmable thin oxide anti-fuse disposed adjacent to the thick oxide spacer transistor, and first and second thick oxide access transistors. The thick oxide spacer transistor and first and second thick oxide access transistors can include an oxide layer that is thicker than an oxide layer of the programmable thin oxide anti-fuse. The programmable thin oxide anti-fuse and the thick oxide spacer transistor can be natively doped. The first and second thick oxide access transistors can be doped so as to have standard threshold voltage characteristics.

    摘要翻译: 包括厚氧化物间隔晶体管,与厚氧化物隔离晶体管相邻设置的可编程薄氧化物反熔丝以及第一和第二厚氧化物存取晶体管的可编程存储单元。 厚氧化物间隔晶体管和第一和第二厚氧化物存取晶体管可以包括比可编程薄氧化物反熔丝的氧化物层厚的氧化物层。 可编程薄氧化物反熔丝和厚氧化物间隔晶体管可以是本征掺杂的。 可以掺杂第一和第二厚氧化物存取晶体管以具有标准阈值电压特性。

    Systems and methods of cell selection in three-dimensional cross-point array memory devices
    8.
    发明授权
    Systems and methods of cell selection in three-dimensional cross-point array memory devices 有权
    三维交叉点阵列存储器件中细胞选择的系统和方法

    公开(公告)号:US08514637B2

    公开(公告)日:2013-08-20

    申请号:US12502111

    申请日:2009-07-13

    IPC分类号: G11C7/00

    摘要: Three dimensional cross-point array memory devices and selecting cells within a three dimensional cross-point array memory. In a particular embodiment, three different voltages levels are applied to bit lines of the cross point array to allow for selection of a specific cell. Series of select devices may be implemented to provide a high voltage and a low voltage to specific bit lines, while a middle voltage may also be provided. In a particular embodiment, the select devices comprise Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs).

    摘要翻译: 三维交叉点阵列存储器件,并选择三维交叉点阵列存储器内的单元。 在特定实施例中,将三个不同的电压电平施加到交叉点阵列的位线以允许选择特定单元。 可以实现一系列选择装置以向特定位线提供高电压和低电压,同时还可以提供中间电压。 在特定实施例中,选择器件包括金属氧化物半导体场效应晶体管(MOSFET)。

    Electric power source arrangement and method of how to use it
    9.
    发明授权
    Electric power source arrangement and method of how to use it 有权
    电源安排及使用方法

    公开(公告)号:US08367258B2

    公开(公告)日:2013-02-05

    申请号:US12754001

    申请日:2010-04-05

    申请人: Zhijun Gu Ke Jin Yong Lu

    发明人: Zhijun Gu Ke Jin Yong Lu

    IPC分类号: H01M8/04

    摘要: An electric power source arrangement is described, comprising a fuel cell means (2) having a nominal voltage and a specified voltage-current characteristic, to be connected to a load (1), and comprising a variable DC-DC voltage converter (3), a by-pass branch (11) by-passing the DC-DC voltage converter, a switch (13) alternatively connecting the fuel cell to the DC-DC voltage converter or to the by-pass branch, and a control unit (12) controlling the switch, which control unit (12) comprises a measuring device coupled to the fuel cell means (2) for detecting the operating point thereof and is configured to connect the by-pass branch (11) if the fuel cell means voltage is within a selected range of section (5) of the voltage-current characteristic of the fuel cell means and to disconnect the by-pass branch in the remaining range of sections (4, 6, 7) of said characteristic.

    摘要翻译: 描述了一种电源装置,其包括具有额定电压和规定的电压 - 电流特性的燃料电池装置(2),连接到负载(1),并且包括可变DC-DC电压转换器(3) ,旁路分支(11)旁路DC-DC电压转换器,将燃料电池交替地连接到DC-DC电压转换器或旁路分支的开关(13),以及控制单元(12 )控制所述开关,所述控制单元(12)包括联接到所述燃料电池单元(2)的测量装置,用于检测所述开关的工作点,并且如果所述燃料电池单元的电压为 在燃料电池装置的电压 - 电流特性的部分(5)的选定范围内,并且在所述特性的部分(4,6,7)的剩余范围内断开旁路分支。

    Floating source line architecture for non-volatile memory
    10.
    发明授权
    Floating source line architecture for non-volatile memory 有权
    用于非易失性存储器的浮动源线架构

    公开(公告)号:US08363449B2

    公开(公告)日:2013-01-29

    申请号:US13206550

    申请日:2011-08-10

    IPC分类号: G11C11/00

    摘要: A method and apparatus for writing data to a non-volatile memory cell, such as an STRAM memory cell or an RRAM memory cell. In some embodiments, a plurality of N non-volatile memory cells, where N is a greater than two, are connected to a common floating source line. A write circuit is adapted to program a selected memory cell of the plurality to a selected data state by passing a write current of selected magnitude through the selected memory cell and concurrently passing a portion of the write current in parallel through each of the remaining N−1 memory cells of the plurality via the common floating source line.

    摘要翻译: 用于将数据写入诸如STRAM存储器单元或RRAM存储器单元的非易失性存储单元的方法和装置。 在一些实施例中,其中N大于2的多个N个非易失性存储器单元连接到公共的浮动源线。 写入电路适于通过将所选择的大小的写入电流通过所选择的存储器单元来编程所选择的数据状态的所选择的存储单元,并且并行地通过所述剩余的N- 1个存储单元经由公共浮动源线。