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    Surface Coated Tool
    4.
    发明申请
    Surface Coated Tool 审中-公开
    表面涂层工具

    公开(公告)号：US20090130434A1

    公开(公告)日：2009-05-21

    申请号：US12293930

    申请日：2007-03-26

    申请人： Yaocan Zhu ,  Kenji Noda ,  Masahito Matsuzawa

    发明人： Yaocan Zhu ,  Kenji Noda ,  Masahito Matsuzawa

    IPC分类号： B32B5/16 ,  B23B27/14

    CPC分类号： C23C14/0664 ,  B23B2224/04 ,  B23B2224/24 ,  B23B2224/36 ,  B23B2228/105 ,  C04B35/58014 ,  C04B35/58021 ,  C04B35/581 ,  C04B2235/3852 ,  C04B2235/3856 ,  C04B2235/3865 ,  C04B2235/3873 ,  C04B2235/3886 ,  C23C14/0036 ,  Y10T407/27 ,  Y10T428/256

    摘要： A surface coated tool including a substrate, and stacked layers composed of two coating layers represented by the following general formula (1) on the substrate is provided. A first coating layer to be coated on the surface of the substrate, which has a thickness of 0.1 to 1 μm, is composed of a granular crystal having a mean crystal diameter of 0.01 to 0.1 μm. A second coating layer to be coated on the surface of the first coating layer, which has a thickness of 0.5 to 5 μm, is composed of columnar crystal grown in a direction perpendicular to the substrate, and the columnar crystal has a mean crystal width of 0.05 to 0.3 μm in a direction parallel to the substrate while a mean crystal width thereof is larger than the mean crystal diameter of the first coating layer. [Formula 3] M1-aAla(CbN1-b)  (1) wherein, M represents at least one metal element selected from the group consisting of the elements of Groups 4, 5 and 6 of the periodic table, Si and rare earth elements, “a” satisfies the relation of 0.25≦a≦0.75, and “b” satisfies the relation of 0≦b≦1.

    摘要翻译： 提供一种包括基板的表面涂覆工具，以及由在基板上由以下通式（1）表示的两个涂层组成的堆叠层。 涂布在基板表面上的厚度为0.1〜1μm的第一涂层由平均结晶直径为0.01〜0.1μm的粒状晶体构成。 要涂覆在第一涂层的表面上的厚度为0.5至5μm的第二涂层由在垂直于衬底的方向上生长的柱状晶体构成，柱状晶体的平均晶体宽度为 其平均晶面宽度大于第一涂层的平均晶体直径，在与基板平行的方向上为0.05〜0.3μm。 [公式3] <？in-line-formula description =“In-line Formulas”end =“lead”？> M1-aAla（CbN1-b）（1）<？in-line-formula description =“In-line 式“end =”tail“？>其中，M表示选自周期表第4,5,6族元素中的至少一种金属元素，Si和稀土元素，”a“满足关系式 为0.25 <= a <= 0.75，“b”满足0 <= b <= 1的关系。

    Cylinder apparatus
    6.
    发明授权
    Cylinder apparatus 有权
    气缸装置

    公开(公告)号：US08157276B2

    公开(公告)日：2012-04-17

    申请号：US12785671

    申请日：2010-05-24

    申请人： Kenji Noda ,  Yoshiaki Totani

    发明人： Kenji Noda ,  Yoshiaki Totani

    IPC分类号： B60G21/05

    CPC分类号： F16F9/3257 ,  B60G21/0558 ,  F16F9/3242 ,  F16F9/325

    摘要： A piston coupled to a piston rod is inserted in a cylinder, and an outer cylinder is disposed around the cylinder so as to define a reservoir therebetween. A separator tube is disposed around the cylinder so as to define an annular passage therebetween. The piston rod can be locked and unlocked by closing and opening an electromagnetic open/close valve so as to block and allow a flow of hydraulic fluid through a flow passage between the annular passage and the reservoir. The separator tube has a greater thickness. O-rings are disposed so as to provide seals between the separator tube and the cylinder. The separator tube extends to positions such that the ends of the separator tube overlap a base valve and a rod guide, thereby holding the respective ends of the cylinder. Due to this configuration, it is possible to prevent deformation of the cylinder and the separator tube due to an increase in the hydraulic pressure.

    摘要翻译： 联接到活塞杆的活塞插入到气缸中，并且外筒围绕气缸设置以在其间限定一个容器。 分隔管设置在圆筒周围，以便在它们之间限定环形通道。 活塞杆可以通过关闭和打开电磁开关阀而被锁定和解锁，以阻止和允许液压流体流过环形通道和储存器之间的流动通道。 分离管具有更大的厚度。 O形环被设置成在分离器管和气缸之间提供密封。 分离管延伸到使得分离管的端部与基座阀和杆引导件重叠的位置，从而保持气缸的相应端部。 由于这种构造，可以防止由于液压的增加而引起的气缸和分离管的变形。

    MIS-transistor-based nonvolatile memory for multilevel data storage
    8.
    发明授权
    MIS-transistor-based nonvolatile memory for multilevel data storage 有权
    用于多级数据存储的基于MIS晶体管的非易失性存储器

    公开(公告)号：US07733714B2

    公开(公告)日：2010-06-08

    申请号：US12139550

    申请日：2008-06-16

    申请人： Tadahiko Horiuchi ,  Kenji Noda

    发明人： Tadahiko Horiuchi ,  Kenji Noda

    IPC分类号： G11C7/00

    CPC分类号： G11C11/5671 ,  G11C2211/5642 ,  G11C2211/5647

    摘要： A memory circuit includes a latch having a first node and a second node to store data such that a logic level of the first node is an inverse of a logic level of the second node, a MIS transistor having a gate node, a first source/drain node, and a second source/drain node, the first source/drain node coupled to the first node of the latch, and a control circuit configured to control the gate node and second source/drain node of the MIS transistor to make an upward lingering change in a threshold voltage of the MIS transistor in a first operation in response to data stored in the latch and to make a downward lingering change in the threshold voltage in a second operation in response to data stored in the latch.

    摘要翻译： 存储器电路包括具有第一节点和第二节点的锁存器，用于存储数据，使得第一节点的逻辑电平为第二节点的逻辑电平的倒数，具有门节点的MIS晶体管，第一源/ 漏极节点和第二源极/漏极节点，耦合到锁存器的第一节点的第一源极/漏极节点以及控制电路，被配置为控制MIS晶体管的栅极节点和第二源极/漏极节点向上 响应于存储在锁存器中的数据，在第一操作中MIS晶体管的阈值电压的持续变化，并且响应于存储在锁存器中的数据，在第二操作中使阈值电压下降。

    Polybutylene terephthalate and process for producing thereof
    9.
    发明申请
    Polybutylene terephthalate and process for producing thereof 审中-公开
    聚对苯二甲酸丁二醇酯及其制造方法

    公开(公告)号：US20090054618A1

    公开(公告)日：2009-02-26

    申请号：US11990916

    申请日：2006-08-28

    申请人： Kenji Noda ,  Masanori Yamamoto ,  Shinichiro Matsuzono ,  Toshiyuki Hamano ,  Yoshio Akahane ,  Hidekazu Shouji

    发明人： Kenji Noda ,  Masanori Yamamoto ,  Shinichiro Matsuzono ,  Toshiyuki Hamano ,  Yoshio Akahane ,  Hidekazu Shouji

    IPC分类号： C08G63/183 ,  C08G63/85

    CPC分类号： C08G63/85 ,  C08G63/80

    摘要： An object of the present invention is to provide polybutylene terephthalate which has excellent color tone, hydrolysis resistance, heat stability, transparency and moldability as well as a less content of impurities, can be produced with maintaining its productivity while preventing from generation of tetrahydrofuran as a by-product, and can be suitably applied to films, monofilaments, fibers, electric and electronic parts, automobile parts, etc.In an aspect of the present invention, there is provided a process for continuously producing polybutylene terephthalate from terephthalic acid and 1,4-butanediol in a presence of a catalyst comprising a titanium compound and a compound of at least one metal selected from Group 1 and Group 2 of the Periodic Table, which process satisfies such the following requirements (a) to (c) that: (a) an oligomer is obtained by conducting a continuously esterification reaction of terephthalic acid and 1,4-butanediol in the presence of titanium catalyst in an amount of not more than 460 μmol as a titanium atom based on 1 mol of terephthalic acid unit; (b) polycondensation reaction of the said oligomer is continuously conducted in the presence of compound of at least one metal selected from Group 1 and Group 2 of the Periodic Table as the catalyst in an amount of not more than 450 μmol as the metal atom based on 1 mol of terephthalic acid unit; and (c) the said compound of at least one metal may be added to a stage before obtaining an oligomer having esterification conversion of not less than 90% in an amount of not more than 300 μmol as the metal atom based on 1 mol of terephthalic acid unit, and the said compound of at least one metal may be added to a stage on or after obtaining an oligomer having esterification conversion of not less than 90% in an amount of not less than 10 μmol as the metal atom based on 1 mol of terephthalic acid unit.

    摘要翻译： 本发明的目的是提供具有优异色调，耐水解性，热稳定性，透明性和成型性以及较少杂质含量的聚对苯二甲酸丁二醇酯，同时保持其生产率，同时防止产生四氢呋喃作为 副产物，可适用于薄膜，单丝，纤维，电气电子部件，汽车部件等。在本发明的一个方面，提供了一种从对苯二甲酸和1， 在包含钛化合物和选自元素周期表第1族和第2族中的至少一种金属的化合物的催化剂存在下，该方法满足以下要求（a）至（c）：（ a）通过在钛催化剂的存在下进行对苯二甲酸和1,4-丁二醇的连续酯化反应获得低聚物 相对于1摩尔对苯二甲酸单元，钛原子为460摩尔以下的量; （b）所述低聚物的缩聚反应在作为催化剂的至少一种选自元素周期表第1族和第2族的金属的化合物存在下连续进行，其金属原子数不超过450μmol 在1mol对苯二甲酸单元上; 和（c）所述至少一种金属的化合物可以在获得具有不低于90％的酯化转化率的低聚物之后的阶段中加入到作为金属原子的不超过300μmol的量，基于1mol对苯二甲酸 酸单元，并且所述至少一种金属的化合物可以在获得基于1摩尔的金属原子的不少于10摩尔的酯化转化率为90％以上的低聚物或其后添加 的对苯二甲酸单元。

    Nonvolatile memory device with test mechanism
    10.
    发明授权
    Nonvolatile memory device with test mechanism 有权
    具有测试机制的非易失性存储器件

    公开(公告)号：US07414903B2

    公开(公告)日：2008-08-19

    申请号：US11413987

    申请日：2006-04-28

    申请人： Kenji Noda

    发明人： Kenji Noda

    IPC分类号： G11C29/00

    CPC分类号： G11C29/50 ,  G11C16/04 ,  G11C29/50016

    摘要： A nonvolatile semiconductor memory device includes a memory cell having a MIS transistor configured to experience an irreversible change in transistor characteristics thereof to store data as the irreversible change, the MIS transistor having a gate node coupled to a word selecting line and a source/drain node coupled to a bit line, and the MIS transistor becoming conductive in response to a first state of the word selecting line and becoming nonconductive in response to a second state of the word selecting line, and a test circuit coupled to the bit line to sense a current running through the MIS transistor, the test circuit configured to indicate error in response to either a detection of presence of the current when the word selecting line is in the second state or a detection of absence of the current when the word selecting line is in the first state.

    摘要翻译： 非易失性半导体存储器件包括具有MIS晶体管的存储单元，其被配置为经历其晶体管特性的不可逆变化以将数据存储为不可逆变化，所述MIS晶体管具有耦合到字选择线和源极/漏极节点 耦合到位线，并且所述MIS晶体管响应于所述字选择线的第一状态变为导通，并且响应于所述字选择线的第二状态变为不导通，以及耦合到所述位线以感测 电流流过MIS晶体管，测试电路被配置为响应于当字选择线处于第二状态时检测到电流的存在或者当字选择线处于第二状态时检测到电流的错误 第一个状态。