公开(公告)号：US20120311244A1

公开(公告)日：2012-12-06

申请号：US13491879

申请日：2012-06-08

申请人： Yichao Huang ,  Jianmin Huang ,  Gautam Ashok Dusija ,  Oleg Kragel

发明人： Yichao Huang ,  Jianmin Huang ,  Gautam Ashok Dusija ,  Oleg Kragel

IPC分类号： G06F12/00

CPC分类号： G11C16/10 ,  G11C7/1042 ,  G11C11/5628 ,  G11C16/0483 ,  G11C2211/5641

摘要： A non-volatile memory system receives and stores host data. As the memory system receives host data, it initially writes the data in a binary format and then subsequently performs an on-chip folding operation on the data, storing the data in a multi-state format. The memory system interleaves the phases of the folding operations so that performance is made more uniform across allocation units, where the host stores data according to allocation units. The memory system also can perform the binary and subsequent on-chip folding operations on multiple memory planes in parallel, where the controller also balances the operations so that performance is made more uniform between planes with respect to allocation units as the data is received from the host. To further maintain performance, the memory system uses a free block list having a reserve portion that is only accessible for a specified set of commands.

摘要翻译： 非易失性存储器系统接收并存储主机数据。 当存储器系统接收主机数据时，它首先以二进制格式写入数据，然后对数据执行片上折叠操作，以多状态格式存储数据。 存储器系统对折叠操作的相位进行交织，使得在分配单元之间使得性能更均匀，其中主机根据分配单元存储数据。 存储器系统还可以并行地在多个存储器平面上执行二进制和随后的片上折叠操作，其中控制器还平衡操作，使得在相对于分配单元的平面之间的性能更均匀，因为从 主办。 为了进一步维持性能，内存系统使用一个空闲块列表，该列表具有一个只能用于一组指定命令的预留部分。

公开(公告)号：US08725935B2

公开(公告)日：2014-05-13

申请号：US13491879

申请日：2012-06-08

申请人： Yichao Huang ,  Jianmin Huang ,  Gautam Ashok Dusija ,  Oleg Kragel

发明人： Yichao Huang ,  Jianmin Huang ,  Gautam Ashok Dusija ,  Oleg Kragel

IPC分类号： G06F12/00

CPC分类号： G11C16/10 ,  G11C7/1042 ,  G11C11/5628 ,  G11C16/0483 ,  G11C2211/5641

摘要： A non-volatile memory system receives and stores host data. As the memory system receives host data, it initially writes the data in a binary format and then subsequently performs an on-chip folding operation on the data, storing the data in a multi-state format. The memory system interleaves the phases of the folding operations, where the host stores data according to allocation units. The memory system also can perform the binary and subsequent on-chip folding operations on multiple memory planes in parallel, where the controller also balances the operations. When the memory system needs a memory block for the writing of data, it selects blocks from a free block list, where the free block list includes a reserve portion that is only accessible for a specified set of commands.

摘要翻译： 非易失性存储器系统接收并存储主机数据。 当存储器系统接收主机数据时，它首先以二进制格式写入数据，然后对数据执行片上折叠操作，以多状态格式存储数据。 存储器系统交织折叠操作的阶段，其中主机根据分配单元存储数据。 存储器系统还可以并行地在多个存储器平面上执行二进制和随后的片上折叠操作，其中控制器还平衡操作。 当存储器系统需要用于写入数据的存储器块时，它从空闲块列表中选择块，其中空闲块列表包括仅可用于指定的一组命令的预留部分。

公开(公告)号：US20110099460A1

公开(公告)日：2011-04-28

申请号：US12642728

申请日：2009-12-18

申请人： Gautam Ashok Dusija ,  Jian Chen ,  Chris Avila ,  Jianmin Huang ,  Lee M. Gavens

发明人： Gautam Ashok Dusija ,  Jian Chen ,  Chris Avila ,  Jianmin Huang ,  Lee M. Gavens

IPC分类号： G11C29/52 ,  G06F11/10 ,  G06F12/16 ,  G06F12/00

CPC分类号： G11C11/5621 ,  G11C16/10 ,  G11C16/349 ,  G11C16/3495 ,  G11C29/00 ,  G11C2211/5641

摘要： Data errors in non-volatile memory inevitably increase with usage and with higher density of bits stored per cell. The memory is configured to have a first portion operating with less error but of lower density storage, and a second portion operating with a higher density but less robust storage. Input data is written and staged in the first portion before being copied to the second portion. An error management provides checking the quality of the copied data for excessive error bits. The copying and checking are repeated on a different location in the second portion until either a predetermined quality is satisfied or the number or repeats exceeds a predetermined limit. The error management is not started when a memory is new with little or no errors, but started after the memory has aged to a predetermined amount as determined by the number of erase/program cycling its has experienced.

摘要翻译： 非易失性存储器中的数据错误不可避免地随着使用而增加，并且每个单元存储更高密度的位。 存储器被配置为具有以较小误差但是较低密度存储器操作的第一部分，以及以较高密度但较不牢固的存储器操作的第二部分。 在将第一部分复制到第二部分之前，输入数据被写入并分级。 错误管理提供检查复制数据的质量是否存在过多的错误位。 在第二部分中的不同位置重复复印和检查，直到满足预定质量或者数量或重复超过预定限度。 当存储器是新的，几乎没有或没有错误时，错误管理不开始，但是在内存已经老化到由其经历的擦除/程序循环的数量确定的预定量之后开始。

公开(公告)号：US08750045B2

公开(公告)日：2014-06-10

申请号：US13560896

申请日：2012-07-27

申请人： Jianmin Huang ,  Kulachet Tanpairoj ,  Chris Nga Yee Avila ,  Gautam Ashok Dusija

发明人： Jianmin Huang ,  Kulachet Tanpairoj ,  Chris Nga Yee Avila ,  Gautam Ashok Dusija

IPC分类号： G11C16/06 ,  G11C16/10

CPC分类号： G11C16/10 ,  G11C16/0483 ,  G11C16/3481 ,  G11C16/3495

摘要： In a non-volatile memory device, the parameters used in write and erase operation are varied based upon device age. For example, in a programming operation using a staircase waveform, the amplitude of the initial pulse can be adjusted based upon the number of erase-program cycles (hot count) of the block containing the selected physical page for the write. This arrangement can preserve performance for relatively fresh devices, while extending life as a devices ages by using gentler waveforms as the device ages.

摘要翻译： 在非易失性存储器件中，用于写入和擦除操作的参数根据器件寿命而变化。 例如，在使用阶梯波形的编程操作中，可以根据包含所选择的用于写入的物理页的块的擦除程序周期（热计数）的次数来调整初始脉冲的幅度。 这种布置可以保持相对新鲜的设备的性能，同时通过在设备老化时通过使用温和波形来延长设备的使用寿命。

公开(公告)号：US08423866B2

公开(公告)日：2013-04-16

申请号：US12642728

申请日：2009-12-18

申请人： Gautam Ashok Dusija ,  Jian Chen ,  Chris Avila ,  Jianmin Huang ,  Lee M. Gavens

发明人： Gautam Ashok Dusija ,  Jian Chen ,  Chris Avila ,  Jianmin Huang ,  Lee M. Gavens

IPC分类号： G06F11/00

CPC分类号： G11C11/5621 ,  G11C16/10 ,  G11C16/349 ,  G11C16/3495 ,  G11C29/00 ,  G11C2211/5641

摘要： Data errors in non-volatile memory inevitably increase with usage and with higher density of bits stored per cell. The memory is configured to have a first portion operating with less error but of lower density storage, and a second portion operating with a higher density but less robust storage. Input data is written and staged in the first portion before being copied to the second portion. An error management provides checking the quality of the copied data for excessive error bits. The copying and checking are repeated on a different location in the second portion until either a predetermined quality is satisfied or the number or repeats exceeds a predetermined limit. The error management is not started when a memory is new with little or no errors, but started after the memory has aged to a predetermined amount as determined by the number of erase/program cycling its has experienced.

摘要翻译： 非易失性存储器中的数据错误不可避免地随着使用而增加，并且每个单元存储更高密度的位。 存储器被配置为具有以较小误差但是较低密度存储器操作的第一部分，以及以较高密度但较不牢固的存储器操作的第二部分。 在将第一部分复制到第二部分之前，输入数据被写入并分级。 错误管理提供检查复制数据的质量是否存在过多的错误位。 在第二部分中的不同位置重复复印和检查，直到满足预定质量或者数量或重复超过预定限度。 当存储器是新的，几乎没有或没有错误时，错误管理不开始，但是在内存已经老化到由其经历的擦除/程序循环的数量确定的预定量之后开始。

公开(公告)号：US09053808B2

公开(公告)日：2015-06-09

申请号：US13529522

申请日：2012-06-21

申请人： Steven T. Sprouse ,  Alexandra Bauche ,  Yichao Huang ,  Jian Chen ,  Jianmin Huang ,  Dana Lee

发明人： Steven T. Sprouse ,  Alexandra Bauche ,  Yichao Huang ,  Jian Chen ,  Jianmin Huang ,  Dana Lee

IPC分类号： G06F11/00 ,  G11C16/34 ,  G11B20/18

CPC分类号： G11C16/3418 ,  G11B20/18 ,  G11B20/1883 ,  G11C16/3427 ,  G11C16/3431

摘要： A method and system have been described for counteracting and correcting for read disturb effects in blocks of flash memory. The method may include the step of a controller of the memory system performing a read scrub scan on only a portion of one targeted word line in a block at desired intervals. The controller may calculate whether a read scrub scan is necessary based on a probabilistic determination that is calculated in response to each received host read command. The controller may then place a block associated with the targeted word line into a refresh queue if a number of errors are detected in the targeted word line that meets or exceeds a predetermined threshold. The block refresh process may include copying the data from the block into a new block during a background operation.

摘要翻译： 已经描述了用于抵消和校正闪速存储器块中的读取干扰效应的方法和系统。 该方法可以包括存储器系统的控制器的步骤，其以期望的间隔仅在块中的一个目标字线的一部分上执行读取擦除扫描。 控制器可以基于响应于每个接收的主机读取命令而计算的概率确定来计算是否需要读取擦除扫描。 然后，如果在满足或超过预定阈值的目标字线中检测到多个错误，则控制器然后可以将与目标字线相关联的块放置到刷新队列中。 块刷新过程可以包括在后台操作期间将数据从块复制到新块中。

公开(公告)号：US20110010484A1

公开(公告)日：2011-01-13

申请号：US12499219

申请日：2009-07-08

申请人： Steven Sprouse ,  Jianmin Huang ,  Chris Avila ,  Yichao Huang ,  Emilio Yero

发明人： Steven Sprouse ,  Jianmin Huang ,  Chris Avila ,  Yichao Huang ,  Emilio Yero

IPC分类号： G06F12/02 ,  G06F12/00

CPC分类号： G11C11/5628 ,  G11C2211/5648

摘要： During a programming data transfer process in a non-volatile storage system, recording units of data are transferred from a host to a memory device, such as a memory card. For each recording unit, pages of data are arranged in an order such that a page which takes longer to write to a memory array of the memory device is provided before a page which takes less time to write. Overall programming time for the recording unit is reduced since a greater degree of parallel processing occurs. While the page which takes longer to program is being programmed to the memory array, the page which takes less time to program is being transferred to the memory device. After programming is completed, the memory device signals the host to transfer a next recording unit. The pages of data may include lower, middle and upper pages.

摘要翻译： 在非易失性存储系统中的编程数据传输过程中，数据的记录单元从主机传送到诸如存储卡的存储设备。 对于每个记录单元，数据页按照这样的顺序排列，使得在写入时间较少的页面之前提供需要更长时间写入存储器件的存储器阵列的页面。 由于发生更大程度的并行处理，记录单元的整体编程时间减少。 当将编程所需的时间更长的页面编程到存储器阵列时，将编程所需的较少时间的页面传送到存储器件。 编程完成后，存储器信号通知主机传送下一个记录单元。 数据页可以包括下页，中页和上页。

公开(公告)号：US20130346805A1

公开(公告)日：2013-12-26

申请号：US13529522

申请日：2012-06-21

申请人： Steven T. Sprouse ,  Alexandra Bauche ,  Yichao Huang ,  Jian Chen ,  Jianmin Huang ,  Dana Lee

发明人： Steven T. Sprouse ,  Alexandra Bauche ,  Yichao Huang ,  Jian Chen ,  Jianmin Huang ,  Dana Lee

IPC分类号： G06F11/28

CPC分类号： G11C16/3418 ,  G11B20/18 ,  G11B20/1883 ,  G11C16/3427 ,  G11C16/3431

摘要： A method and system have been described for counteracting and correcting for read disturb effects in blocks of flash memory. The method may include the step of a controller of the memory system performing a read scrub scan on only a portion of one targeted word line in a block at desired intervals. The controller may calculate whether a read scrub scan is necessary based on a probabilistic determination that is calculated in response to each received host read command. The controller may then place a block associated with the targeted word line into a refresh queue if a number of errors are detected in the targeted word line that meets or exceeds a predetermined threshold. The block refresh process may include copying the data from the block into a new block during a background operation.

摘要翻译： 已经描述了用于抵消和校正闪速存储器块中的读取干扰效应的方法和系统。 该方法可以包括存储器系统的控制器的步骤，其以期望的间隔仅在块中的一个目标字线的一部分上执行读取擦除扫描。 控制器可以基于响应于每个接收的主机读取命令而计算的概率确定来计算是否需要读取擦除扫描。 然后，如果在满足或超过预定阈值的目标字线中检测到多个错误，则控制器然后可以将与目标字线相关联的块放置到刷新队列中。 块刷新过程可以包括在后台操作期间将数据从块复制到新块中。

公开(公告)号：US08180994B2

公开(公告)日：2012-05-15

申请号：US12499219

申请日：2009-07-08

申请人： Steven Sprouse ,  Jianmin Huang ,  Chris Avila ,  Yichao Huang ,  Emilio Yero

发明人： Steven Sprouse ,  Jianmin Huang ,  Chris Avila ,  Yichao Huang ,  Emilio Yero

IPC分类号： G06F12/00

CPC分类号： G11C11/5628 ,  G11C2211/5648

摘要： During a programming data transfer process in a non-volatile storage system, recording units of data are transferred from a host to a memory device, such as a memory card. For each recording unit, pages of data are arranged in an order such that a page which takes longer to write to a memory array of the memory device is provided before a page which takes less time to write. Overall programming time for the recording unit is reduced since a greater degree of parallel processing occurs. While the page which takes longer to program is being programmed to the memory array, the page which takes less time to program is being transferred to the memory device. After programming is completed, the memory device signals the host to transfer a next recording unit. The pages of data may include lower, middle and upper pages.

摘要翻译： 在非易失性存储系统中的编程数据传输过程中，数据的记录单元从主机传送到诸如存储卡的存储设备。 对于每个记录单元，数据页按照这样的顺序排列，使得在写入时间较少的页面之前提供需要更长时间写入存储器件的存储器阵列的页面。 由于发生更大程度的并行处理，记录单元的整体编程时间减少。 当将编程所需的时间更长的页面编程到存储器阵列时，将编程所需的较少时间的页面传送到存储器件。 编程完成后，存储器信号通知主机传送下一个记录单元。 数据页可以包括下页，中页和上页。

公开(公告)号：US20210200700A1

公开(公告)日：2021-07-01

申请号：US17138082

申请日：2020-12-30

申请人： Kulachet Tanpairoj ,  Jianmin Huang

发明人： Kulachet Tanpairoj ,  Jianmin Huang

IPC分类号： G06F13/16 ,  G06F11/30 ,  G06F12/02 ,  G06F12/0868 ,  G06F13/24

摘要： Methods for operating a memory device can include monitoring communications from a host device for a notification that a battery of the host device has entered a charging state and performing a background operation of the memory device responsive to receiving this notification. The notification can be an added functionality incorporated into a standardized interface.