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    Methods of operating a non-volatile memory device
    1.
    发明授权
    Methods of operating a non-volatile memory device 有权
    操作非易失性存储器件的方法

    公开(公告)号：US07636251B2

    公开(公告)日：2009-12-22

    申请号：US11826059

    申请日：2007-07-12

    申请人： Yoon-dong Park ,  Kyoung-lee Cho ,  Jae-woong Hyun ,  Sung-jae Byun

    发明人： Yoon-dong Park ,  Kyoung-lee Cho ,  Jae-woong Hyun ,  Sung-jae Byun

    IPC分类号： G11C11/00

    CPC分类号： G11C11/5685 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/31

    摘要： A nonvolatile memory device may be operated in a multi-bit mode at a lower operating current and with higher integrated of the memory device. A first buried electrode may be used as a first bit line, a second buried electrode may be used as a second bit line, and/or a gate electrode may be used as a word line. First and second resistance layers may be programmed with 2-bit data and the 2-bit data may be read from the first and second resistance layers. More than 2-bit data may be programmed and read using more than 2 buried electrodes.

    摘要翻译： 非易失性存储器件可以在较低工作电流下以多位模式操作，并且可以与存储器件的更高集成度一起操作。 第一掩埋电极可以用作第一位线，第二埋电极可以用作第二位线，和/或栅电极可以用作字线。 第一和第二电阻层可以用2位数据编程，并且可以从第一和第二电阻层读取2位数据。 可以使用多于2个埋置的电极对2位以上的数据进行编程和读取。

    Methods of operating a non-volatile memory device
    2.
    发明申请
    Methods of operating a non-volatile memory device 有权
    操作非易失性存储器件的方法

    公开(公告)号：US20080013373A1

    公开(公告)日：2008-01-17

    申请号：US11826059

    申请日：2007-07-12

    申请人： Yoon-dong Park ,  Kyoung-lee Cho ,  Jae-woong Hyun ,  Sung-jae Byun

    发明人： Yoon-dong Park ,  Kyoung-lee Cho ,  Jae-woong Hyun ,  Sung-jae Byun

    IPC分类号： G11C11/56

    CPC分类号： G11C11/5685 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/31

    摘要： Example embodiments provide a method of operating a nonvolatile memory device in a multi-bit mode, which may operate at a low operating current and may be more integrated. In example embodiments, a first buried electrode may be used as a first bit line and a second buried electrode may be used as a second bit line, and a gate electrode may be used as a word line. Example methods may include programming 2-bit data to first and second resistance layers and reading the 2-bit data programmed in the first and second resistance layers. Example methods may include programming and reading more than 2-bit data using more than 2 buried electrodes.

    摘要翻译： 示例性实施例提供了以多位模式操作非易失性存储器件的方法，其可以在低工作电流下操作并且可以更加集成。 在示例性实施例中，第一掩埋电极可以用作第一位线，并且第二掩埋电极可以用作第二位线，并且栅电极可以用作字线。 示例性方法可以包括将2位数据编程到第一和第二电阻层并读取在第一和第二电阻层中编程的2位数据。 示例性方法可以包括使用多于2个掩埋电极编程和读取多于2位的数据。

    Memory cell programming method and semiconductor device for simultaneously programming a plurality of memory block groups
    4.
    发明授权
    Memory cell programming method and semiconductor device for simultaneously programming a plurality of memory block groups 有权
    用于同时编程多个存储块组的存储单元编程方法和半导体器件

    公开(公告)号：US07911842B2

    公开(公告)日：2011-03-22

    申请号：US12081568

    申请日：2008-04-17

    申请人： Ju-hee Park ,  Jae-woong Hyun ,  Yoon-dong Park ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song ,  Jun-jin Kong ,  Sung-chung Park

    发明人： Ju-hee Park ,  Jae-woong Hyun ,  Yoon-dong Park ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song ,  Jun-jin Kong ,  Sung-chung Park

    IPC分类号： G11C16/04

    CPC分类号： H01L29/7883 ,  G11C16/10

    摘要： Provided are a memory cell programming method and a semiconductor device which may be capable of simultaneously writing a bit of data and then another bit of the data to a plurality of memory blocks. The memory programming method, in which M bits of data are written to a plurality of memory blocks, may include a data division operation and a data writing operation where M may be a natural number. In the data division operation, the plurality of memory blocks may be divided into a plurality of memory block groups. In the data writing operation, an ith bit of the data may be simultaneously written to two or more memory block groups from among the plurality memory block groups, and then an i+1th bit of the data may be simultaneously written to the two or more memory block groups from among the plurality memory block groups, where i is a natural number less than M.

    摘要翻译： 提供了一种存储器单元编程方法和半导体器件，其可以能够同时将数据位和数据的另一位写入多个存储块。 其中将M位数据写入多个存储块的存储器编程方法可以包括数据分割操作和数据写入操作，其中M可以是自然数。 在数据划分操作中，多个存储块可以被划分为多个存储块组。 在数据写入操作中，数据的第i位可以从多个存储器块组中同时写入两个或更多个存储块组，然后数据的第i + 1位可以被同时写入两个或更多个 多个存储块组中的存储块组，其中i是小于M的自然数。

    Method of writing/reading data into/from memory cell and page buffer using different codes for writing and reading operations
    5.
    发明授权
    Method of writing/reading data into/from memory cell and page buffer using different codes for writing and reading operations 有权
    使用不同的代码进行写入和读取操作，从存储单元和页面缓冲区写入/读取数据的方法

    公开(公告)号：US07729175B2

    公开(公告)日：2010-06-01

    申请号：US12010481

    申请日：2008-01-25

    申请人： Kyoung-lae Cho ,  Yoon-dong Park ,  Jun-jin Kong ,  Seung-hoon Lee ,  Jae-woong Hyun ,  Sung-jae Byun ,  Ju-hee Park ,  Seung-hwan Song

    发明人： Kyoung-lae Cho ,  Yoon-dong Park ,  Jun-jin Kong ,  Seung-hoon Lee ,  Jae-woong Hyun ,  Sung-jae Byun ,  Ju-hee Park ,  Seung-hwan Song

    IPC分类号： G11C11/34

    CPC分类号： G11C16/10 ,  G11C7/1006 ,  G11C11/5628 ,  G11C11/5642 ,  G11C2211/5642

    摘要： Provided are a method of writing/reading data into/from a memory cell and a page buffer using different codes for the writing and reading operations. The method of writing/reading data into/from a memory cell that has a plurality of threshold voltage distributions includes a data writing operation and a data reading operation. In the data writing operation, data having a plurality of bits is written into the memory cell by using a plurality of writing codes corresponding to threshold voltage distributions. In the data reading operation, the data having a plurality of bits is read from the memory cell by using reading codes corresponding to the threshold voltage distributions from among the threshold voltage distributions. In the method of writing/reading data into/from a memory cell, a part of the writing codes is different from a corresponding part of the reading codes.

    摘要翻译： 提供了一种将数据写入/从存储单元读取数据的方法和使用不同代码进行写入和读取操作的页面缓冲器。 对具有多个阈值电压分布的存储单元写入/读取数据的方法包括数据写入操作和数据读取操作。 在数据写入操作中，通过使用与阈值电压分布对应的多个写入代码，将具有多个位的数据写入存储单元。 在数据读取操作中，通过使用与阈值电压分布中的阈值电压分布相对应的读取代码，从存储单元读取具有多个位的数据。 在将数据写入/从存储单元读取的方法中，写入代码的一部分与读取代码的相应部分不同。

    Memory cell programming methods capable of reducing coupling effects
    8.
    发明授权
    Memory cell programming methods capable of reducing coupling effects 失效
    能够减少耦合效应的存储单元编程方法

    公开(公告)号：US07649784B2

    公开(公告)日：2010-01-19

    申请号：US12000493

    申请日：2007-12-13

    申请人： Kyoung-Iae Cho ,  Jae-woong Hyun ,  Sung-jae Byun ,  Kyu-charn Park ,  Yoon-dong Park ,  Choong-ho Lee

    发明人： Kyoung-Iae Cho ,  Jae-woong Hyun ,  Sung-jae Byun ,  Kyu-charn Park ,  Yoon-dong Park ,  Choong-ho Lee

    IPC分类号： G11C11/03

    CPC分类号： G11C16/0483 ,  G11C11/5628 ,  G11C2211/5648

    摘要： In a memory cell programming method, first through n-th programming operations are performed to program first through n-th bits of the n bits of data using the plurality of threshold voltage distributions. The first through n-th programming operations are performed sequentially. A threshold voltage difference between threshold voltage distributions used in the n-th programming operation is less than or equal to at least one threshold voltage difference between threshold voltage distributions used in the first through (n−1)-th programming operations.

    摘要翻译： 在存储单元编程方法中，执行第一至第n编程操作，以使用多个阈值电压分布对n位数据的第一至第n位进行编程。 顺序执行第一至第n编程操作。 在第n编程操作中使用的阈值电压分布之间的阈值电压差小于或等于在第一至第（n-1）编程操作中使用的阈值电压分布之间的至少一个阈值电压差。

    Method of writing/reading data into/from memory cell and page buffer using different codes for writing and reading operations
    9.
    发明申请
    Method of writing/reading data into/from memory cell and page buffer using different codes for writing and reading operations 有权
    使用不同的代码进行写入和读取操作，从存储单元和页面缓冲区写入/读取数据的方法

    公开(公告)号：US20080285352A1

    公开(公告)日：2008-11-20

    申请号：US12010481

    申请日：2008-01-25

    申请人： Kyoung-lae Cho ,  Yoon-dong Park ,  Jun-jin Kong ,  Seung-hoon Lee ,  Jae-woong Hyun ,  Sung-jae Byun ,  Ju-hee Park ,  Seung-hwan Song

    发明人： Kyoung-lae Cho ,  Yoon-dong Park ,  Jun-jin Kong ,  Seung-hoon Lee ,  Jae-woong Hyun ,  Sung-jae Byun ,  Ju-hee Park ,  Seung-hwan Song

    IPC分类号： G11C16/06

    CPC分类号： G11C16/10 ,  G11C7/1006 ,  G11C11/5628 ,  G11C11/5642 ,  G11C2211/5642

    摘要： Provided are a method of writing/reading data into/from a memory cell and a page buffer using different codes for the writing and reading operations. The method of writing/reading data into/from a memory cell that has a plurality of threshold voltage distributions includes a data writing operation and a data reading operation. In the data writing operation, data having a plurality of bits is written into the memory cell by using a plurality of writing codes corresponding to threshold voltage distributions. In the data reading operation, the data having a plurality of bits is read from the memory cell by using reading codes corresponding to the threshold voltage distributions from among the threshold voltage distributions. In the method of writing/reading data into/from a memory cell, a part of the writing codes is different from a corresponding part of the reading codes.

    摘要翻译： 提供了一种将数据写入/从存储单元读取数据的方法和使用不同代码进行写入和读取操作的页面缓冲器。 对具有多个阈值电压分布的存储单元写入/读取数据的方法包括数据写入操作和数据读取操作。 在数据写入操作中，通过使用与阈值电压分布对应的多个写入代码，将具有多个位的数据写入存储单元。 在数据读取操作中，通过使用与阈值电压分布中的阈值电压分布相对应的读取代码，从存储单元读取具有多个位的数据。 在将数据写入/从存储单元读取的方法中，写入代码的一部分与读取代码的相应部分不同。

    Memory cell programming method and semiconductor device for simultaneously programming a plurality of memory block groups
    10.
    发明申请
    Memory cell programming method and semiconductor device for simultaneously programming a plurality of memory block groups 有权
    用于同时编程多个存储块组的存储单元编程方法和半导体器件

    公开(公告)号：US20080285343A1

    公开(公告)日：2008-11-20

    申请号：US12081568

    申请日：2008-04-17

    申请人： Ju-hee Park ,  Jae-woong Hyun ,  Yoon-dong Park ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song ,  Jun-jin Kong ,  Sung-chung Park

    发明人： Ju-hee Park ,  Jae-woong Hyun ,  Yoon-dong Park ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song ,  Jun-jin Kong ,  Sung-chung Park

    IPC分类号： G11C16/04 ,  G11C8/00

    CPC分类号： H01L29/7883 ,  G11C16/10

    摘要： Provided are a memory cell programming method and a semiconductor device which may be capable of simultaneously writing a bit of data and then another bit of the data to a plurality of memory blocks. The memory programming method, in which M bits of data are written to a plurality of memory blocks, may include a data division operation and a data writing operation where M may be a natural number. In the data division operation, the plurality of memory blocks may be divided into a plurality of memory block groups. In the data writing operation, an ith bit of the data may be simultaneously written to two or more memory block groups from among the plurality memory block groups, and then an i+1th bit of the data may be simultaneously written to the two or more memory block groups from among the plurality memory block groups, where i is a natural number less than M.

    摘要翻译： 提供了一种存储器单元编程方法和半导体器件，其可以能够同时将数据位和数据的另一位写入多个存储块。 其中将M位数据写入多个存储块的存储器编程方法可以包括数据分割操作和数据写入操作，其中M可以是自然数。 在数据划分操作中，多个存储块可以被划分为多个存储块组。 在数据写入操作中，数据的第i / O位可以被同时写入到多个存储块组之中的两个或更多个存储块组，然后i + 1＆lt; / SUP>位可以从多个存储块组中的两个或更多个存储块组同时写入，其中i是小于M的自然数。