Sound-absorbing material, production method of the same, and sound-absorbing panel
    3.
    发明申请
    Sound-absorbing material, production method of the same, and sound-absorbing panel 审中-公开
    吸声材料,制作方法和吸声板

    公开(公告)号:US20070235253A1

    公开(公告)日:2007-10-11

    申请号:US11723850

    申请日:2007-03-22

    IPC分类号: E04B1/82

    CPC分类号: G10K11/172

    摘要: In order to provide a sound-absorbing material and a sound-absorbing panel which can be produce at a low-cost and have excellent beauty or appearance and excellent sound-absorbing characteristics, the sound-absorbing material is applied which is made from a metallic plate member (2), and multiple pierced apertures of 200 μm or smaller diameter are arranged along a board thickness on the plate-shaped member (2).

    摘要翻译: 为了提供能够以低成本生产并且具有优异的美观或外观以及优异的吸音特性的吸音材料和吸声板,应用吸音材料,其由金属制成 板构件(2),并且沿着板状构件(2)上的板厚布置具有200μm或更小直径的多个穿孔。

    Ferroelectric memory device and method of reducing imprint effect thereof
    4.
    发明授权
    Ferroelectric memory device and method of reducing imprint effect thereof 失效
    铁电存储器件及其压印效果的降低方法

    公开(公告)号:US5986920A

    公开(公告)日:1999-11-16

    申请号:US197347

    申请日:1998-11-19

    申请人: Yoshihiro Tada

    发明人: Yoshihiro Tada

    IPC分类号: G11C14/00 G11C11/22 G11C11/24

    CPC分类号: G11C11/22

    摘要: A ferroelectric memory device which is less likely to be affected with imprint effect and a highly effective method for reducing the imprint effect of the ferroelectric memory cell. A data reversing latch circuit is disposed between a pair of bit lines BL0 and /BL0 and has capacitors C1 and C2. When data is read, it is possible to store the potentials on the pair of bit lines BL0 and /BL0 as charges in the capacitors C1 and C2, and to reverse the high-low relationship between the potentials on the bit lines BL0 and /BL0 and then back to the original relationship according to stored charges in the capacitors C1 and C2. In this way, the imprint effect of the memory cell MO may be automatically reduced when data is read by reversing the data in the memory MO connected to the bit lines BL0 and /BL0 and again reversing the data back to normal.

    摘要翻译: 不易受印记效应影响的铁电存储器件和用于降低铁电存储单元的印记效应的高效方法。 数据反转锁存电路设置在一对位线BL0和/ BL0之间,并具有电容器C1和C2。 当读取数据时,可以将位线对BL0和/ BL0上的电位作为电荷存储在电容器C1和C2中,并且使位线BL0和/ BL0上的电位之间的高低关系反转 然后根据电容器C1和C2中存储的电荷回到原始关系。 以这种方式,当通过反转连接到位线BL0和/ BL0的存储器MO中的数据并再次将数据反向恢复来读取数据时,可以自动缩小存储单元MO的印记效果。

    Trackball units
    5.
    发明授权
    Trackball units 有权
    轨迹球单位

    公开(公告)号:US06791534B2

    公开(公告)日:2004-09-14

    申请号:US10067855

    申请日:2002-02-08

    IPC分类号: G09G500

    CPC分类号: G06F3/03549 H01H2223/004

    摘要: The invention provides a trackball unit featuring good water resistance and user maintenance capabilities. A case (3) of the trackball unit has a drain pipe (32) connecting a cavity (33) formed inside the case (3) for accommodating a ball (2) to the exterior of the case (3). A case cover (6) has a ring-shaped projecting part (62) while a ball cover (7) has a pair of locking tabs (72, 73) which engage with the projecting part (62) of the case cover (6), so that the ball cover (7) can be detachably fitted to the case cover (6).

    摘要翻译: 本发明提供了具有良好耐水性和用户维护能力的轨迹球单元。 轨迹球单元的壳体(3)具有排出管(32),该排水管将形成在壳体(3)内部的用于容纳球(2)的空腔(33)连接到壳体(3)的外部。 壳体盖(6)具有环形突出部分(62),而球罩(7)具有与壳盖(6)的突出部分(62)接合的一对锁定突片(72,73) ,使得球罩(7)能够可拆卸地装配到壳体盖(6)。

    Semiconductor storage device and method of driving thereof

    公开(公告)号:US06272044B1

    公开(公告)日:2001-08-07

    申请号:US09425196

    申请日:1999-10-22

    IPC分类号: G11C1604

    摘要: In a semiconductor storage device comprising a plurality of memory cells P formed in a matrix form in a semiconductor substrate, write and read for each of which is carried out through a word line and bit line, wherein each said memory cells includes a first and a second memory transistor MT1 and MT2 connected in series. In this configuration, the semiconductor storage device with high reliability which produces abnormality in operation can be provided.

    EEPROM device having a constant data writing duration
    7.
    发明授权
    EEPROM device having a constant data writing duration 有权
    EEPROM器件具有恒定的数据写入持续时间

    公开(公告)号:US06195285B1

    公开(公告)日:2001-02-27

    申请号:US09137100

    申请日:1998-08-20

    IPC分类号: G11C1604

    CPC分类号: G11C16/12 G11C16/0433

    摘要: An EEPROM device has memory cells each including of a memory transistor and a selection transistor. The memory transistor has a floating gate between a control gate and a conducting channel formed between a drain and a source. The selection transistor has its source connected to the drain of the memory transistor. During writing of data, the control gate of the memory transistor is grounded, the source of the memory transistor is kept in an open state, and a voltage corresponding to the data to be written in is applied to the gate and the drain of the selection transistor.

    摘要翻译: EEPROM器件具有各自包括存储晶体管和选择晶体管的存储单元。 存储晶体管在控制栅极和形成在漏极和源极之间的导电沟道之间具有浮动栅极。 选择晶体管的源极连接到存储晶体管的漏极。 在写入数据期间,存储晶体管的控制栅极接地,存储晶体管的源保持在打开状态,并且与要写入的数据相对应的电压被施加到选择的栅极和漏极 晶体管。

    Ferroelectric memory
    8.
    发明授权
    Ferroelectric memory 失效
    铁电存储器

    公开(公告)号:US6058040A

    公开(公告)日:2000-05-02

    申请号:US80398

    申请日:1998-05-18

    申请人: Yoshihiro Tada

    发明人: Yoshihiro Tada

    CPC分类号: G11C11/22

    摘要: A ferroelectric memory has a smaller circuit area and offers lower current consumption, higher reliability, and a longer working life than ever. In this ferroelectric memory, one end of a capacitor is connected, through a switching device that is provided for achieving connection to a divided plate line and is turned on and off by a word line, to the divided plate line, and the divided plate line is connected, through another switching device that is provided for achieving connection to a plate line and is turned on and off by a column line, to the plate line for controlling the writing and reading of data. The other end of the capacitor is connected, through another switching device that is turned on and off by the word line, to a bit line, and the bit line is connected, through another switching device that is turned on and off by the column line, to an input/output line for controlling the writing and reading of data.

    摘要翻译: 铁电存储器具有较小的电路面积,并且具有比以往更低的电流消耗,更高的可靠性和更长的工作寿命。 在这种铁电存储器中,电容器的一端通过开关装置连接,该开关装置用于实现与分割板线的连接,并被字线接通和断开到分割板线,并且分割板线 通过用于实现与板线的连接并且被列线导通和断开的另一开关装置连接到用于控制数据的写入和读取的板线。 电容器的另一端通过由字线导通和断开的另一个开关器件连接到位线,并且位线通过另一个通过列线导通和断开的开关器件连接 到用于控制数据的写入和读取的输入/输出线。

    Semiconductor device
    9.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US07460414B2

    公开(公告)日:2008-12-02

    申请号:US10596558

    申请日:2004-12-14

    IPC分类号: G11C5/14

    摘要: A nonvolatile memory device improves the accuracy of screening testing while applying a voltage at or lower than the limit of the withstand voltage of an element for high voltage in the screening testing. The nonvolatile memory device includes a high voltage production circuit that produces a high voltage, a high voltage waveform conversion circuit to which the high voltage is input and which converts the voltage waveform, and a memory cell section provided with memory cells in which data rewriting is performed as a result of applying the converted high voltage. The high voltage waveform conversion circuit includes a test signal input section TEST and applies the high voltage input from the high voltage production circuit to the memory cell section without converting the voltage waveform when a test signal is input to the test signal input section.

    摘要翻译: 非易失性存储器件在筛选测试中施加高于或等于高电压元件的耐受电压极限的电压时,提高了筛选测试的准确性。 非易失性存储器件包括产生高电压的高压生产电路,输入高电压的高电压波形转换电路,并转换电压波形;以及存储单元部分,其中存储单元包括数据重写为 作为施加转换的高电压的结果执行。 高电压波形转换电路包括测试信号输入部分TEST,并且当将测试信号输入到测试信号输入部分时,将来自高压生成电路的高电压输入施加到存储单元部分而不转换电压波形。

    SEMICONDUCTOR DEVICE
    10.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20070206412A1

    公开(公告)日:2007-09-06

    申请号:US10596558

    申请日:2004-12-14

    IPC分类号: G11C11/40

    摘要: A nonvolatile memory device improves the accuracy of screening testing while applying a voltage at or lower than the limit of the withstand voltage of an element for high voltage in the screening testing. The nonvolatile memory device includes a high voltage production circuit that produces a high voltage, a high voltage waveform conversion circuit to which the high voltage is input and which converts the voltage waveform, and a memory cell section provided with memory cells in which data rewriting is performed as a result of applying the converted high voltage. The high voltage waveform conversion circuit includes a test signal input section TEST and applies the high voltage input from the high voltage production circuit to the memory cell section without converting the voltage waveform when a test signal is input to the test signal input section.

    摘要翻译: 非易失性存储器件在筛选测试中施加高于或等于高电压元件的耐受电压极限的电压时,提高了筛选测试的准确性。 非易失性存储器件包括产生高电压的高压生产电路,输入高电压的高电压波形转换电路,并转换电压波形;以及存储单元部分,其中存储单元包括数据重写为 作为施加转换的高电压的结果执行。 高电压波形转换电路包括测试信号输入部分TEST,并且当将测试信号输入到测试信号输入部分时,将来自高压生成电路的高电压输入施加到存储单元部分而不转换电压波形。