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    NONVOLATILE MEMORY DEVICE AND METHOD OF WRITING DATA TO NONVOLATILE MEMORY DEVICE
    1.
    发明申请
    NONVOLATILE MEMORY DEVICE AND METHOD OF WRITING DATA TO NONVOLATILE MEMORY DEVICE 有权
    非易失性存储器件和将数据写入非易失性存储器件的方法

    公开(公告)号：US20110128776A1

    公开(公告)日：2011-06-02

    申请号：US13056925

    申请日：2010-05-14

    申请人： Yoshikazu Katoh ,  Shunsaku Muraoka ,  Takeshi Takagi

    发明人： Yoshikazu Katoh ,  Shunsaku Muraoka ,  Takeshi Takagi

    IPC分类号： G11C11/00 ,  G11C7/00

    CPC分类号： G11C13/0069 ,  G11C11/14 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0038 ,  G11C2013/0073 ,  G11C2013/009 ,  G11C2213/15 ,  G11C2213/34 ,  G11C2213/79 ,  G11C2213/82

    摘要： A resistance variable layer has a characteristic in which the resistance variable layer changes to a second resistance state (RL) in such a manner that its resistance value stops decreasing when an interelectrode voltage reaches a first voltage (V1) which is a negative voltage, the resistance variable layer changes to a first resistance state (RH) in such a manner that its resistance value starts increasing when the interelectrode voltage reaches a second voltage (V2) which is a positive voltage which is equal in absolute value to the first voltage, the resistance variable layer changes to the first resistance state in such a manner that the resistance variable layer flows an interelectrode current such that the interelectrode voltage is maintained at a third voltage (V3) higher than the second voltage, when the interelectrode voltage reaches the third voltage, and the resistance variable layer changes to the first resistance state in such a manner that its resistance value stops increasing when the interelectrode current reaches a first current (Ilim) in a state where the interelectrode voltage is not lower than the second voltage and lower than the third voltage, and the load resistor has a characteristic in which when the electric pulse application device outputs an electric pulse of a second application voltage (VP2), a current flowing by applying to the load resistor, a voltage obtained by subtracting the third voltage from the second application voltage, is not higher than a first current value.

    摘要翻译： 电阻变化层具有电阻变化层变为第二电阻状态（RL）的特性，使得当电极间电压达到作为负电压的第一电压（V1）时，其电阻值停止减小， 电阻变化层以这样的方式改变为第一电阻状态（RH），使得当电极间电压达到作为与第一电压的绝对值相等的正电压的第二电压（V2）时，其电阻值开始增加， 电阻变化层以这样的方式变化为电阻变化层流动电极间电流，使得当电极间电压达到第三电压时，电极间电压保持在高于第二电压的第三电压（V3） ，并且电阻变化层以其电阻值停止增加的方式变为第一电阻状态 当所述电极间电流在所述电极间电压不低于所述第二电压且低于所述第三电压的状态下达到第一电流（Ilim）时，并且所述负载电阻器具有当所述电脉冲施加装置输出 第二施加电压（VP2）的电脉冲，通过施加到负载电阻器流动的电流，从第二施加电压减去第三电压获得的电压不高于第一电流值。

    Nonvolatile memory device and method of writing data to nonvolatile memory device
    2.
    发明授权
    Nonvolatile memory device and method of writing data to nonvolatile memory device 有权
    非易失性存储器件和将数据写入非易失性存储器件的方法

    公开(公告)号：US08406035B2

    公开(公告)日：2013-03-26

    申请号：US13056925

    申请日：2010-05-14

    申请人： Yoshikazu Katoh ,  Shunsaku Muraoka ,  Takeshi Takagi

    发明人： Yoshikazu Katoh ,  Shunsaku Muraoka ,  Takeshi Takagi

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0069 ,  G11C11/14 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0038 ,  G11C2013/0073 ,  G11C2013/009 ,  G11C2213/15 ,  G11C2213/34 ,  G11C2213/79 ,  G11C2213/82

    摘要： A resistance variable layer has a characteristic in which the resistance variable layer changes to a second resistance state (RL) in such a manner that its resistance value stops decreasing when an interelectrode voltage reaches a first voltage (V1) which is a negative voltage, the resistance variable layer changes to a first resistance state (RH) in such a manner that its resistance value starts increasing when the interelectrode voltage reaches a second voltage (V2) which is a positive voltage which is equal in absolute value to the first voltage, the resistance variable layer changes to the first resistance state in such a manner that the resistance variable layer flows an interelectrode current such that the interelectrode voltage is maintained at a third voltage (V3) higher than the second voltage, when the interelectrode voltage reaches the third voltage, and the resistance variable layer changes to the first resistance state in such a manner that its resistance value stops increasing when the interelectrode current reaches a first current (Ilim) in a state where the interelectrode voltage is not lower than the second voltage and lower than the third voltage, and the load resistor has a characteristic in which when the electric pulse application device outputs an electric pulse of a second application voltage (VP2), a current flowing by applying to the load resistor, a voltage obtained by subtracting the third voltage from the second application voltage, is not higher than a first current value.

    摘要翻译： 电阻变化层具有电阻变化层变为第二电阻状态（RL）的特性，使得当电极间电压达到作为负电压的第一电压（V1）时，其电阻值停止减小， 电阻变化层以这样的方式改变为第一电阻状态（RH），使得当电极间电压达到作为与第一电压的绝对值相等的正电压的第二电压（V2）时，其电阻值开始增加， 电阻变化层以这样的方式变化为电阻变化层流动电极间电流，使得当电极间电压达到第三电压时，电极间电压保持在高于第二电压的第三电压（V3） ，并且电阻变化层以其电阻值停止增加的方式变为第一电阻状态 当所述电极间电流在所述电极间电压不低于所述第二电压且低于所述第三电压的状态下达到第一电流（Ilim）时，并且所述负载电阻器具有当所述电脉冲施加装置输出 第二施加电压（VP2）的电脉冲，通过施加到负载电阻器流动的电流，从第二施加电压减去第三电压获得的电压不高于第一电流值。

    NONVOLATILE MEMORY ELEMENT AND NONVOLATILE MEMORY DEVICE
    3.
    发明申请
    NONVOLATILE MEMORY ELEMENT AND NONVOLATILE MEMORY DEVICE 有权
    非易失性存储元件和非易失性存储器件

    公开(公告)号：US20120327702A1

    公开(公告)日：2012-12-27

    申请号：US13599286

    申请日：2012-08-30

    申请人： Takeshi Takagi ,  Zhiqiang Wei ,  Takeki Ninomiya ,  Shunsaku Muraoka ,  Yoshihiko Kanzawa

    发明人： Takeshi Takagi ,  Zhiqiang Wei ,  Takeki Ninomiya ,  Shunsaku Muraoka ,  Yoshihiko Kanzawa

    IPC分类号： H01L45/00 ,  G11C11/21

    CPC分类号： H01L27/101 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2013/0083 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/56 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1675

    摘要： A nonvolatile memory element includes: a first electrode layer; a second electrode layer; and a variable resistance layer which is placed between the electrode layers, and whose resistance state reversibly changes between a high resistance state and a low resistance state based on a polarity of a voltage applied between the electrode layers. The variable resistance layer is formed by stacking a first oxide layer including an oxide of a first transition metal and a second oxide layer including an oxide of a second transition metal which is different from the first transition metal. At least one of the following conditions is satisfied: (1) a dielectric constant of the second oxide layer is larger than a dielectric constant of the first oxide layer; and (2) a band gap of the second oxide layer is smaller than a band gap of the first oxide layer.

    摘要翻译： 非易失性存储元件包括：第一电极层; 第二电极层; 以及可变电阻层，其设置在电极层之间，并且其电阻状态基于施加在电极层之间的电压的极性而在高电阻状态和低电阻状态之间可逆地变化。 可变电阻层通过堆叠包括第一过渡金属的氧化物的第一氧化物层和包含与第一过渡金属不同的第二过渡金属的氧化物的第二氧化物层而形成。 满足以下条件中的至少一个：（1）第二氧化物层的介电常数大于第一氧化物层的介电常数; 和（2）第二氧化物层的带隙小于第一氧化物层的带隙。

    METHOD OF PROGRAMMING VARIABLE RESISTANCE ELEMENT AND NONVOLATILE STORAGE DEVICE
    4.
    发明申请
    METHOD OF PROGRAMMING VARIABLE RESISTANCE ELEMENT AND NONVOLATILE STORAGE DEVICE 有权
    可变电阻元件和非易失性存储器件的编程方法

    公开(公告)号：US20120320661A1

    公开(公告)日：2012-12-20

    申请号：US13596154

    申请日：2012-08-28

    申请人： Shunsaku MURAOKA ,  Takeshi Takagi ,  Satoru Mitani ,  Koji Katayama

    发明人： Shunsaku MURAOKA ,  Takeshi Takagi ,  Satoru Mitani ,  Koji Katayama

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0007 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/72 ,  G11C2213/79 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625

    摘要： A method includes applying a first polarity writing voltage pulse to a metal oxide layer to change its resistance state from high to low into a write state, applying a second polarity erasing voltage pulse different from the first polarity to the metal oxide layer to change its resistance state from low to high into an erase state, and applying an initial voltage pulse having the second polarity to the metal oxide layer before first application of the writing voltage pulse, to change an initial resistance value of the metal oxide layer. R0>RH>RL and |V0|>|Ve|≧|Vw| are satisfied where R0, RL, and RH are the resistance values of the initial, write, and erase states, respectively, of the metal oxide layer, and V0, Vw, and Ve are voltage values of the initial, writing, and erasing voltage pulses, respectively.

    摘要翻译： 一种方法包括：将第一极性写入电压脉冲施加到金属氧化物层，以将其电阻状态从高变为低电平变为写入状态，将不同于第一极性的第二极性擦除电压脉冲施加到金属氧化物层以改变其电阻 状态从低到高进入擦除状态，以及在首次施加写入电压脉冲之前将具有第二极性的初始电压脉冲施加到金属氧化物层，以改变金属氧化物层的初始电阻值。 R0> RH> RL和| V0 |> | Ve |≥| Vw | 满足R0，RL和RH分别是金属氧化物层的初始，写入和擦除状态的电阻值，V0，Vw和Ve是初始，写入和擦除电压的电压值 脉冲。

    METHOD FOR DRIVING NONVOLATILE MEMORY ELEMENT, AND NONVOLATILE MEMORY DEVICE
    6.
    发明申请
    METHOD FOR DRIVING NONVOLATILE MEMORY ELEMENT, AND NONVOLATILE MEMORY DEVICE 有权
    用于驱动非易失性存储器元件的方法和非易失性存储器件

    公开(公告)号：US20140029330A1

    公开(公告)日：2014-01-30

    申请号：US14004447

    申请日：2012-03-13

    申请人： Shunsaku Muraoka ,  Satoru Mitani ,  Takeshi Takagi

    发明人： Shunsaku Muraoka ,  Satoru Mitani ,  Takeshi Takagi

    IPC分类号： G11C13/00

    CPC分类号： G11C13/0069 ,  G11C13/0007 ,  G11C2013/0073 ,  G11C2013/0092 ,  G11C2213/32 ,  G11C2213/79 ,  H01L27/101 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146

    摘要： A method for driving a nonvolatile memory element includes: a writing step of changing a variable resistance layer to a low resistance state, by applying a writing voltage pulse having a first polarity; and an erasing step of changing the variable resistance layer to a high resistance state, by applying an erasing voltage pulse having a second polarity different from the first polarity, wherein in the writing step, a first input and output terminal of a field effect transistor is a source terminal of the transistor, and when a pulse width of the writing voltage pulse is PWLR and a pulse width of the erasing voltage pulse is PWHR, PWLR and PWHR satisfy a relationship of PWLR

    摘要翻译： 一种用于驱动非易失性存储元件的方法包括：通过施加具有第一极性的写入电压脉冲将可变电阻层改变为低电阻状态的写入步骤; 以及通过施加具有与第一极性不同的第二极性的擦除电压脉冲将可变电阻层改变为高电阻状态的擦除步骤，其中在写入步骤中，场效应晶体管的第一输入和输出端子是 晶体管的源极端子，并且当写入电压脉冲的脉冲宽度为PWLR且擦除电压脉冲的脉冲宽度为PWHR时，PWLR和PWHR满足PWLR

    Nonvolatile storage device and method for writing into memory cell of the same
    9.
    发明授权
    Nonvolatile storage device and method for writing into memory cell of the same 有权
    非易失性存储装置和写入其中的存储单元的方法

    公开(公告)号：US08179714B2

    公开(公告)日：2012-05-15

    申请号：US12865193

    申请日：2009-10-16

    申请人： Takeshi Takagi ,  Shunsaku Muraoka ,  Mitsuteru Iijima ,  Ken Kawai ,  Kazuhiko Shimakawa

    发明人： Takeshi Takagi ,  Shunsaku Muraoka ,  Mitsuteru Iijima ,  Ken Kawai ,  Kazuhiko Shimakawa

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0069 ,  G11C13/0007 ,  G11C13/0064 ,  G11C2013/0083 ,  G11C2013/009 ,  G11C2213/32 ,  G11C2213/56 ,  G11C2213/79

    摘要： Provided is a nonvolatile storage device (200) capable of stably operating without increasing a size of a selection transistor included in each of memory cells. The nonvolatile storage device (200) includes: a semiconductor substrate (301) which has a P-type well (301a) of a first conductivity type; a memory cell array (202) which includes memory cells (M11) or the like each of which includes a variable resistance element (R11) and a transistor (N11) that are formed above the semiconductor substrate (301) and connected in series; and a substrate bias circuit (220) which applies, to the P-type well (301a), a bias voltage in a forward direction with respect to a source and a drain of the transistor (N11), when a voltage pulse for writing is applied to the variable resistance element (R11) included in the selected memory cell (M11) or the like.

    摘要翻译： 提供一种能够在不增加包含在每个存储单元中的选择晶体管的尺寸的情况下稳定地工作的非易失性存储装置（200）。 非易失性存储装置（200）包括：具有第一导电型的P型阱（301a）的半导体基板（301） 存储单元阵列（202），其包括存储单元（M11）等，每个存储单元包括形成在半导体衬底（301）上并串联连接的可变电阻元件（R11）和晶体管（N11）; 以及衬底偏置电路（220），当用于写入的电压脉冲为写入电压脉冲时，向P型阱（301a）施加相对于晶体管（N11）的源极和漏极的正向偏置电压 应用于所选择的存储单元（M11）等中包含的可变电阻元件（R11）。