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公开(公告)号：US4415882A
公开(公告)日：1983-11-15
申请号：US299121
申请日：1981-09-03
申请人： Yukio Akazawa , Yasuyuki Matsuya , Atsushi Iwata
发明人： Yukio Akazawa , Yasuyuki Matsuya , Atsushi Iwata
摘要： The analog output from a local DAC comprising an LDAC and an MDAC, in which the full scale of the LDAC is always larger than the quantized level of the MDAC, is compared with an input analog signal which is sampled and held. A digital code obtained by successive approximation in accordance with the result of the comparison is stored in a successive approximation register. A shift code for calibrating the D/A conversion in the local DAC by shifting the digital code which is previously allotted to each digital code is stored in a shift code generating circuit (ROM). The digital code from the successive approximation register is digitally shifted in accordance with the shift code by a code shift circuit such as a digital adder/subtractor to obtain an A/D conversion output. An analog to digital converter with a high accuracy and an improved conversion speed is inexpensively fabricated in the form of a one chip LSI by a usual CMOS process.
摘要翻译： 来自包括LDAC和MDAC的本地DAC的模拟输出与其中采样和保持的输入模拟信号进行比较，其中LDAC的满量程总是大于MDAC的量化电平。 通过根据比较结果逐次逼近获得的数字码被存储在逐次逼近寄存器中。 用于通过将预先分配给每个数字代码的数字代码移位来校准本地DAC中的D / A转换的移位代码被存储在移位代码产生电路（ROM）中。 来自逐次逼近寄存器的数字代码通过诸如数字加法器/减法器之类的代码移位电路根据移位代码进行数字移位，以获得A / D转换输出。 具有高精度和高转换速度的模数转换器通过通常的CMOS工艺以单芯片LSI的形式被廉价地制造。
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公开(公告)号：US4412208A
公开(公告)日：1983-10-25
申请号：US299120
申请日：1981-09-03
申请人： Yukio Akazawa , Yasuyuki Matsuya , Atsushi Iwata
发明人： Yukio Akazawa , Yasuyuki Matsuya , Atsushi Iwata
CPC分类号： H03M1/68
摘要： A digital to analog converter comprising a first digital to analog converter for generating an output signal of higher order bits; a second digital to analog converter for generating a full scale output as an output signal of lower order bits which is always larger than the output value (1 LSB) corresponding to one bit of a digital input at the least significant bit of the first digital to analog converter; adding means for adding the output signal from the first digital to analog converter to the output signal from the second digital to analog converter to form an analog output signal; and a code converter for applying to the first and second digital to analog converters an input code obtained by shifting a digital input signal applied to the first and second digital to analog converters by a given value such that the relationship between the digital input signal and the analog output signal is made substantially linear.
摘要翻译： 一种数模转换器，包括用于产生高阶位的输出信号的第一数模转换器; 第二数模转换器，用于产生满量程输出作为较低位的输出信号，其总是大于对应于第一数字至低位的最低有效位的数字输入的一位的输出值（1 LSB） 模拟转换器 添加装置，用于将来自第一数模转换器的输出信号与来自第二数模转换器的输出信号相加以形成模拟输出信号; 以及代码转换器，用于向第一和第二数模转换器施加通过将施加到第一和第二数模转换器的数字输入信号移位给定值而获得的输入代码，使得数字输入信号和 模拟输出信号基本上是线性的。
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3.发明授权
公开(公告)号：US4542350A
公开(公告)日：1985-09-17
申请号：US515280
申请日：1983-07-19
申请人： Yukio Akazawa , Noboru Ishihara , Mamoru Ohara
发明人： Yukio Akazawa , Noboru Ishihara , Mamoru Ohara
CPC分类号： H03F3/45071 , H03F1/48 , H03F3/19
摘要： A monolithic integrated circuit device is formed on a substrate and made up of an AC negative feedback circuit for a high frequency amplifier circuit. The AC negative feedback circuit includes a semiconductor impedance element and connected to an external terminal on the substrate, and variable control means for adjusting an amount of the AC feedback of the high frequency amplifier circuit. As the semiconductor impedance element is used the junction capacitance of a diode under negative bias, diffusion capacitance between the base and emitter electrodes or between the base and collector electrodes of a transistor or a differentiated resistance of a diode.
摘要翻译： 单片集成电路器件形成在基板上，由用于高频放大器电路的AC负反馈电路构成。 AC负反馈电路包括半导体阻抗元件并连接到基板上的外部端子，以及用于调整高频放大器电路的AC反馈量的可变控制装置。 由于使用半导体阻抗元件，二极管在负偏压下的结电容，基极和发射极之间的扩散电容或晶体管的基极和集电极之间的扩散电容或二极管的微分电阻。
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公开(公告)号：US06888379B2
公开(公告)日：2005-05-03
申请号：US10088205
申请日：2001-10-11
CPC分类号： H03L7/085 , H03D13/008 , H04L7/0331
摘要： A phase detector circuit that prevents a significant loss of lock during input of CIDs (Consecutive Identical Digits) and has a high linearity of a phase to voltage conversion characteristic around a phase-locked point in an operation of comparing phases of random NRZ signals in a phase. By using the phase detector circuit having a circuit configuration containing a delay circuit and a combination of leapt a multiplier circuit and a subtractor circuit, a capability as the PLL circuit of preventing the significant loss of lock can be realized. In addition, since a duty cycle of a pulse appearing at an output terminal 3 of a multiplier circuit 62 approaches 50% as a phase-locked state is approached, a distortion in the phase to voltage conversion characteristic does not appear, and thus high linearity of the phase to voltage conversion characteristic around thus phase-locked point can be realized.
摘要翻译： 一种相位检测器电路，其防止在输入CID（连续相同位）期间显着的锁定损失，并且在比较相位锁定点周围的随机NRZ信号的相位的操作中具有高线性度的相位 - 电压转换特性 相。 通过使用具有包含延迟电路的电路结构的相位检测器电路和倍增乘法器电路和减法器电路的组合，可以实现防止锁定显着损失的PLL电路的能力。 此外，由于接近乘法器电路62的输出端3处的脉冲的占空比接近50％，因此不会出现相电压转换特性的失真，因此高线性 的相位锁定点之间的相电压转换特性可以实现。
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公开(公告)号：US06229165B1
公开(公告)日：2001-05-08
申请号：US09143510
申请日：1998-08-28
申请人： Tetsushi Sakai , Nobuaki Ieda , Masayuki Ino , Shigeru Nakajima , Yukio Akazawa , Tsuneo Mano , Hiroshi Inokawa
发明人： Tetsushi Sakai , Nobuaki Ieda , Masayuki Ino , Shigeru Nakajima , Yukio Akazawa , Tsuneo Mano , Hiroshi Inokawa
IPC分类号： H01L31062
CPC分类号： H01L27/1443 , H01L27/14812 , H01L31/101
摘要： This invention provides a semiconductor device including a silicon layer, an insulating layer formed on the silicon layer, a first semiconductor device formed on the insulating film to convert light into an electric signal, and a second semiconductor device formed on the insulating film, wherein a silicon region is formed in the silicon layer to shield the second semiconductor device from light, and a through hole extending through the silicon layer except for the silicon region to input light to the first semiconductor device is formed in that portion of the silicon layer corresponding to the lower portions of the first and second semiconductor devices.
摘要翻译： 本发明提供一种半导体器件，包括硅层，形成在硅层上的绝缘层，形成在绝缘膜上以将光转换为电信号的第一半导体器件，以及形成在绝缘膜上的第二半导体器件，其中， 在硅层中形成硅区域以遮蔽第二半导体器件，并且在对应于第一半导体器件的硅层的部分中形成有通过除了硅区域之外的硅层延伸到第一半导体器件的光的通孔， 第一和第二半导体器件的下部。
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公开(公告)号：US5475342A
公开(公告)日：1995-12-12
申请号：US227886
申请日：1994-04-15
CPC分类号： H03G11/00 , H03G1/007 , H03G3/3084
摘要： An amplifier having an automatic threshold control circuit (ATC) and a limiting amplifier. The ATC detects and holds a top value (peak value) and bottom value of an input signal, and outputs the middle value between the top and bottom values as a reference voltage. The limiting amplifier amplifies the input signal in a linear operating region whose center is set at the reference voltage, thereby maintaining the output amplitude at a constant value. Even if the amplitude and the level of the input signals instantaneously changes by a large amount, the ATC can follow the change, so that the offset compensation and gain compensation of the amplifier can be achieved instantaneously. This makes it possible to continue producing the output of a constant amplitude with little phase deviations.
摘要翻译： 具有自动阈值控制电路（ATC）和限幅放大器的放大器。 ATC检测并保持输入信号的上限值（峰值）和底部值，并将顶部和底部值之间的中间值作为参考电压输出。 限幅放大器将其中心设置在参考电压的线性工作区域中的输入信号放大，从而将输出幅度保持在恒定值。 即使输入信号的振幅和电平瞬时变化较大，ATC也可以跟随变化，从而可以瞬间实现放大器的偏移补偿和增益补偿。 这使得可以继续产生具有很小相位偏差的恒定幅度的输出。
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公开(公告)号：US4885548A
公开(公告)日：1989-12-05
申请号：US221937
申请日：1988-07-20
申请人： Tsutomu Wakimoto , Yukio Akazawa
发明人： Tsutomu Wakimoto , Yukio Akazawa
IPC分类号： H03F1/48
CPC分类号： H03F1/48
摘要： Wideband amplifier having a differential amplifier or single-ended amplifier and having a capacitaqnce compensation circuit is disclosed. The amplifier detects the voltage variations of a signal input node or a signal output node, generates a compensation current equal in magnitude and opposite in direction to a current flowing in a parasitic capacitance such as a transistor junction capacitance, and cancels the parasitic capacitance associated with a node by supplying the compensation current in a reverse phase to the node to which the parasitic capacitance is attached. As a result, a wideband amplifier is achieved, and it can also be used as a high-speed comparator. Further, harmonic distortions causing from the voltage dependency of the parasitic capacitance can be reduced by flowing the compensation current corresponding to a voltage impressed to the junction capacitance.
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