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    Deterministic shut down of memory devices in response to a system warm reset
    1.
    发明授权
    Deterministic shut down of memory devices in response to a system warm reset 有权
    响应于系统热复位，确定性地关闭存储器件

    公开(公告)号：US07181605B2

    公开(公告)日：2007-02-20

    申请号：US10693226

    申请日：2003-10-24

    申请人： Zohar Bogin ,  Surya Kareenahalli ,  Anoop Mukker ,  David Sastry ,  Tuong Trieu

    发明人： Zohar Bogin ,  Surya Kareenahalli ,  Anoop Mukker ,  David Sastry ,  Tuong Trieu

    IPC分类号： G06F9/00

    CPC分类号： G06F1/24

    摘要： A method to deterministically shut down memory devices in response to a system warm reset has been disclosed. One embodiment of the method includes causing a first type of reset in a number of memory devices in a system in response to a second type of reset in the system being initiated if the memory devices are not initialized and enabling a deterministic shutdown mode in a memory controller, which is coupled to the memory devices, after the memory devices have been initialized. Other embodiments are described and claimed.

    摘要翻译： 已经公开了响应于系统热复位来确定地关闭存储器件的方法。 该方法的一个实施例包括在系统中响应于系统中的第二类型的复位而引起系统中的多个存储器件中的第一类型的复位，如果存储器件未被初始化并且使能存储器中的确定性关断模式 控制器，其在存储器件初始化之后耦合到存储器件。 描述和要求保护其他实施例。

    Deterministic shut down of memory devices in response to a system warm reset
    2.
    发明申请
    Deterministic shut down of memory devices in response to a system warm reset 有权
    响应于系统热复位，确定性地关闭存储器件

    公开(公告)号：US20050091481A1

    公开(公告)日：2005-04-28

    申请号：US10693226

    申请日：2003-10-24

    申请人： Zohar Bogin ,  Surya Kareenahalli ,  Anoop Mukker ,  David Sastry ,  Tuong Trieu

    发明人： Zohar Bogin ,  Surya Kareenahalli ,  Anoop Mukker ,  David Sastry ,  Tuong Trieu

    IPC分类号： G06F1/24 ,  G06F15/177

    CPC分类号： G06F1/24

    摘要： A method to deterministically shut down memory devices in response to a system warm reset has been disclosed. One embodiment of the method includes causing a first type of reset in a number of memory devices in a system in response to a second type of reset in the system being initiated if the memory devices are not initialized and enabling a deterministic shutdown mode in a memory controller, which is coupled to the memory devices, after the memory devices have been initialized. Other embodiments are described and claimed.

    摘要翻译： 已经公开了响应于系统热复位来确定地关闭存储器件的方法。 该方法的一个实施例包括在系统中响应于系统中的第二类型的复位而引起系统中的多个存储器件中的第一类型的复位，如果存储器件未被初始化并且使能存储器中的确定性关断模式 控制器，其在存储器件初始化之后耦合到存储器件。 描述和要求保护其他实施例。

    Apparatus and a method to adjust signal timing on a memory interface
    6.
    发明申请
    Apparatus and a method to adjust signal timing on a memory interface 审中-公开
    用于调整存储器接口上的信号定时的装置和方法

    公开(公告)号：US20050190193A1

    公开(公告)日：2005-09-01

    申请号：US10791180

    申请日：2004-03-01

    申请人： David Freker ,  Zohar Bogin ,  Dour Navneet ,  Anoop Mukker ,  Tuong Trieu

    发明人： David Freker ,  Zohar Bogin ,  Dour Navneet ,  Anoop Mukker ,  Tuong Trieu

    IPC分类号： G06F13/00 ,  G06F13/16 ,  G06F13/372

    CPC分类号： G06F13/1689

    摘要： An apparatus and a method for adjusting signal timing in a memory interface have been disclosed. One embodiment of the apparatus includes a number of slave delay lock loops (DLLs) in a memory interface to adjust timing between a number of signals to compensate for timing skew, and a number of input/output (I/O) buffers to output the adjusted signals to one or more memory devices coupled to the memory interface. Other embodiments are described and claimed.

    摘要翻译： 已经公开了一种用于调整存储器接口中的信号定时的装置和方法。 该装置的一个实施例包括在存储器接口中的多个从属延迟锁定环（DLL），用于调整多个信号之间的定时以补偿定时偏差，以及多个输入/输出（I / O）缓冲器，以输出 调整的信号到耦合到存储器接口的一个或多个存储器件。 描述和要求保护其他实施例。